Framing, Synchronization, and Error Detection

Size: px
Start display at page:

Download "Framing, Synchronization, and Error Detection"

Transcription

1 Exercise 4 Framing, Synchronization, and Error Detection EXERCISE OBJECTIVE When you have completed this exercise, you will be familiar with the ADSL superframe structure. You will be able to demonstrate how frame synchronization and superframe synchronization are achieved. You will be able to explain how errors occurring during the transmission of an ADSL signal are detected. DISCUSSION OUTLINE The Discussion of this Exercise covers the following points: ADSL Superframe Structure Frame Synchronization Superframe Synchronization Error Detection Net Data Rate versus Aggregate Data Rate DISCUSSION The explanations given in this discussion apply to both the ATU-R and the ATU-C. However, certain aspects of these explanations are specific to the ATU-R. Complementary information in yellow boxes like this one highlights differences between an ATU-R and an ATU-C. ADSL Superframe Structure In an ATU transmitter, the data to be transmitted is divided into frames, as mentioned previously in this manual. Each frame consists of a certain number of data bytes. Every symbol interval, the data bytes in a frame are used to apply QAM to the various tones in the transmitted ADSL signal. In other words, the data in each frame defines the frequency contents of the ADSL signal transmitted during a particular symbol interval. An IFFT is then performed to convert this frequency-domain information into a certain number of time-domain samples that are converted to analog format and transmitted during the symbol interval. This is illustrated in Figure 54. Figure 54. Relationship between the data frames and the ADSL signal transmitted every symbol interval. Festo Didactic

2 Exercise 4 Framing, Synchronization, and Error Detection Discussion At the ATU receiver, the analog ADSL signal is sampled and converted to digital format. This results in a continuous flow of time-domain samples. The timedomain samples related to a particular symbol interval must be processed together to allow the ADSL signal to be demodulated properly, i.e., to ensure that each data frame is recovered properly. The process that ensures that all samples in each group of time-domain samples processed in the ATU receiver are related to the same symbol interval is referred to as the frame synchronization. This process is explained later in this discussion. Checks on the data recovered in the ATU receiver are performed cyclically to detect errors that may occur during data transmission. This process, which is commonly referred to as the error detection, is covered in detail later in this discussion. In ADSL, 69 consecutive data frames form what is called a superframe. The superframe defines the time interval between each check which the ATU receiver performs on the recovered data to detect errors that may occur during transmission. Figure 55 shows the ADSL superframe structure. The data frames in a superframe are numbered 0 to 68. The first 68 frames (frames 0 to 67) carry user data. The last frame (68) does not carry user data because it is reserved for superframe synchronization, which is covered later in this discussion. Figure 55. ADSL superframe structure. 86 Festo Didactic

3 Exercise 4 Framing, Synchronization, and Error Detection Discussion Due to technical constraints, the ATU-R Transmitter in our ADSL application operates at a rate of ksample/s. The duration of each timedomain sample is thus equal to 3.52 s. This results in a symbol interval duration of ms, an actual symbol rate of kbaud, and a superframe duration of 16.5 ms. The duration of each superframe is 17 ms. Therefore, each data frame has a duration of ms. This is also the duration of the symbol interval because the data in each frame (whether it is user data or data dedicated to superframe synchronization) is used to define the ADSL signal for one complete symbol interval. The actual symbol rate, that is, the rate at which the tones in the ADSL signal are modulated, is thereby equal to kbaud (1 / ms = kbaud). However, since 68 of the 69 frames in each superframe are used to carry user data, the nominal ADSL symbol rate is 4 kbaud [(68 / 69) x kbaud = 4 kbaud]. Note that the duration of each time-domain sample of the ADSL signal at the output of an ATU-R transmitter is equal to the symbol interval duration ( ms) divided by the number of samples per symbol interval (68), i.e., 3.62 s. This corresponds to a rate of 276 ksample/s. This explains why the P/S converter in an ATU-R transmitter operates at this rate. In an ATU-C transmitter, the duration of each time-domain sample of the ADSL signal is equal to the symbol interval duration ( ms) divided by number of samples per symbol interval (544), i.e., s. This corresponds to a rate of Msample/s. Figure 55 shows that each data frame is separated into two data buffers. However, if only one of the two buffers is used to carry user data, then the complete data frame is dedicated to that buffer. The ADSL superframe structure in Figure 55 also shows the data structure of each frame except frame 68 which is used for superframe synchronization. Each data frame is separated into two buffers: the fast data buffer and the interleaved data buffer. The fast data buffer contains user data that has not been interleaved, and can contain a certain number of additional bytes that allow forward error correction (FEC). Note that data interleaving and FEC are discussed later in this manual. On the other hand, the interleaved data buffer contains user data, and possibly FEC bytes, that have been interleaved. The first byte in the fast data buffer, which is referred to as the fast byte, is reserved for various functions depending on the frame number. These functions are listed in the following table. Table 3. Functions related to the fast byte. FIRST BYTE IN FAST DATA BUFFER (FAST BYTE) Frame 0 Frames 1, 34, and 35 All other frames except frame 68 Contains information used for error detection (CRC). Contains indicator bits for operation, administration, and maintenance (OAM) functions. Used for the embedded operation channel (EOC) or synchronization control of the bearer channels. Similarly, the first byte in the interleaved data buffer, which is referred to as the synchronization byte, is reserved for various functions depending on the frame number. These functions are listed in the following table. Festo Didactic

4 Exercise 4 Framing, Synchronization, and Error Detection Discussion Table 4. Functions related to the synchronization byte. FIRST BYTE IN INTERLEAVED DATA BUFFER (SYNC. BYTE) Frame 0 All other frames except frame 68 Contains information used for error detection (CRC). Used for the ADSL overhead control (AOC) channel or synchronization control of the bearer channels. Among these functions, it is important to note that for both the fast and interleaved data buffers, the first byte of frame 0 contains the information (CRC) used to perform error detection. Frame Synchronization In an ATU receiver, the time-domain samples related to a particular symbol interval must be processed together to allow the ADSL signal to be demodulated properly, i.e., to ensure that each data frame is recovered properly, as mentioned earlier in the discussion. Frame synchronization is the process used in ADSL to ensure that all samples in each group of time-domain samples processed in the ATU receiver are related to the same symbol interval. Frame synchronization is achieved in ADSL by adding a cyclic prefix to the timedomain samples of the ADSL signal generated every symbol interval, before the samples are converted to analog format. Figure 56 illustrates how the cyclic prefix is added in an ATU-R transmitter. Every symbol interval, the IFFT block in the ATU-R transmitter produces 64 time-domain samples that represent the ADSL signal. The cyclic prefix is added by copying the last 4 time-domain samples produced by the IFFT block and adding these time-domain samples at the beginning of the group of 64 time-domain samples produced every symbol interval. The repetition of 4 time-domain samples provides two recognizable marks in the continuous stream of time-domain samples produced by the ATU-R transmitter that allow the symbol interval boundaries to be easily recovered in the ATU-C receiver. In an ATU-C transmitter, the cyclic prefix is added by copying the last 32 timedomain samples produced by the IFFT block and adding these time-domain samples at the beginning of the group of 512 time-domain samples produced every symbol interval. 88 Festo Didactic

5 Exercise 4 Framing, Synchronization, and Error Detection Discussion Figure 56. Addition of the cyclic prefix in an ATU-R transmitter. At the ATU-C receiver, the cyclic prefix needs only be detected to recover the symbol interval boundaries. This task is performed by the frame synchronizer which analyzes the time-domain samples received to find two identical sequences of 4 time-domain samples separated by 60 time-domain samples. This allows the time-domain samples of the ADSL signal received to be separated into groups that pertain to the same symbol interval, thereby meeting the condition required for proper demodulation of the ADSL signal. Note that every symbol interval, the cyclic prefix remover discards the extra time-domain samples after the frame synchronizer has achieved frame synchronization. Then, the rest of the demodulation process takes place. In an ATU-R receiver, the frame synchronizer analyzes the time-domain samples received to find two identical sequences of 32 time-domain samples separated by 480 time-domain samples. Superframe Synchronization In order for an ATU receiver to be able to perform error detection, it must be able to recover the error detection information (CRC) included in frame 0 of each superframe. In other words, the ATU receiver must be able to recognize the superframe boundaries. This process is referred to as the superframe synchronization. Superframe synchronization is achieved in ADSL by using a predetermined DMT symbol, called synchronization symbol, once every superframe to generate the ADSL signal. This produces a known ADSL signal during one symbol interval every superframe. Then, the ATU receiver only has to recognize this known ADSL signal to recover the superframe boundaries. Festo Didactic

6 Exercise 4 Framing, Synchronization, and Error Detection Discussion Figure 57 illustrates how a known ADSL signal is generated once every superframe. During the first 68 frames (frames 0 to 67) of each superframe, complex numbers Z0 to Z31 coming from the constellation encoder are used to generate the DMT symbols. This results in a random ADSL signal during the corresponding symbol intervals. However, during the last frame (frame 68) of each superframe, a set of 32 predetermined known complex numbers coming from the synchronization symbol source is used to generate the synchronization symbol. This results in the transmission of a known ADSL signal during the symbol interval associated with frame 68 of each superframe. Figure 57. Superframe synchronization in an ATU transmitter. Figure 58 illustrates how superframe synchronization is achieved in an ATU receiver. The known ADSL signal is received during the symbol interval associated with frame 68. Demodulation of this signal causes the synchronization symbol to be recovered at the FFT block output. The synchronization symbol detector in the ATU receiver recognizes this DMT symbol and generates a pulse signal that resets the frame counter at the next symbol interval (i.e., at frame 0). Figure 58. Superframe synchronization in an ATU receiver. Error Detection ADSL is provided with the capability of detecting errors that may occur during transmission. In brief, the ATU transmitter calculates a cyclic redundancy check (CRC) code using the data transmitted during frames 0 to 67 of a superframe. Similarly, the ATU receiver calculates the CRC code using the data received during frames 0 to 67 of the same superframe. Then, at the beginning of 90 Festo Didactic

7 Exercise 4 Framing, Synchronization, and Error Detection Discussion the next superframe (i.e., during frame 0), the ATU transmitter includes the CRC code it calculated with the data transmitted during the previous superframe. At the other end of the transmission path, the ATU receiver recovers the CRC code transmitted by the ATU transmitter during frame 0. The ATU receiver compares the value of the recovered CRC code with the value of the CRC code it has calculated with the data received during the previous superframe. When both values match, this confirms that no errors occurred during the transmission of the previous superframe. On the other hand, when both values differ, this confirms that one or several errors occurred during the transmission of this superframe. In this case, the ATU receiver sets a flag to indicate that a transmission error occurred. The system s high-level control software will then handle the situation by requesting retransmission of the corrupted superframe. The CRC code is a numerical value expressed with a fixed number of digits. In brief, the CRC computation consists of a recursive division process in which the data to be transmitted during a superframe is the dividend and a predetermined polynomial is the divisor. The quotient of the division process is discarded and the remainder is kept and used as the CRC code. According to ITU-T Recommendation G.992.1, the following polynomial of degree 8 should be used as the divisor for CRC computation in ADSL applications: x 8 + x 4 + x 3 + x The remainder of the division process (i.e., the CRC code) in ADSL applications is an 8-bit long number. The CRC code calculated for a given superframe is inserted in the first byte of data frame 0 of the next superframe, i.e., in the fast byte or the sync. byte of frame 0 depending on whether the data is transmitted using the fast data buffer or the interleaved data buffer (see above tables). When data is transmitted with both types of buffer at the same time, a CRC code is calculated with the data in the fast data buffer, and a second CRC code is calculated with the data in the interleaved data buffer. This results in two CRC codes per superframe. The CRC code for the fast data buffer is inserted in the first byte of this buffer (fast byte) in frame 0 of each superframe. Similarly, the CRC code for the interleaved data buffer is inserted in the first byte of this buffer (sync. byte) in frame 0 of each superframe. Net Data Rate versus Aggregate Data Rate The net data rate is the data rate that is available for the transmission of user data, according to ITU-T Recommendation G Similarly, the aggregate data rate is the data rate which results from the user data transmission and the necessary system overhead (CRC code for error detection, OAM functions, EOC channel, AOC channel, and synchronization of the bearer channels). The first byte (fast byte or sync. byte) in any data frame that carries user data (i.e., frames 0 to 67) is reserved for the overhead functions mentioned above. This means that one byte per frame carrying user data is lost, thereby reducing the net data rate. Since the nominal symbol rate in ADSL is 4 kbaud, this means that the net data rate is 32 kbit/s lower than the aggregate data rate. When both the fast data buffer and the interleaved data buffer are used at the same time, two bytes are lost every frame carrying user data. In this case, the net data rate is thus 64 kbit/s lower than the aggregate data rate. Festo Didactic

8 Outline PROCEDURE OUTLINE The Procedure is divided into the following sections: Equipment Setup and Connections Data Frame Buffer Frame Synchronization Superframe Synchronization CRC Codes and Error Detection Net Data Rate versus Aggregate Data Rate PROCEDURE Equipment Setup and Connections 1. Turn on the RTM Power Supply and the RTM and make sure the RTM power LED is lit. 2. Turn on the host computer. Make sure that the system has been installed and configured as described in the Communications Technologies Training System User Guide. 3. Start the LVCT software. In the Application Selection dialog box, choose ADSL and click OK. This begins a new session with all settings set to their default values and with all faults deactivated. The System Diagram appears showing the ATU-R Transmitter and the ATU-C Receiver. 4. Make the Default external connections shown on the System Diagram tab of the ADSL application. For details of connections to the Reconfigurable Training Module, refer to the RTM Connections tab of the software. Data Frame Buffer 5. Display the block diagram of the ATU-R Transmitter by clicking the corresponding tab in the ADSL application. Due to technical constraints, a second data frame buffer is not available in our ADSL application. Therefore, it is not possible to have the fast data buffer at the same time as the interleaved data buffer. Use the Pan and Zoom commands to display the portion of the ATU-R Transmitter shown in Figure 59. The portion of circuitry between the Tx Data Table and the Constellation Encoder is the data frame buffer of the ATU-R Transmitter. When the Interleaver is turned off, the data frame buffer is equivalent to the fast data buffer described in the discussion. On the other hand, when the Interleaver is turned on, the data frame buffer is equivalent to the interleaved data buffer described in the discussion. 92 Festo Didactic

9 Figure 59. Data frame buffer of the ATU-R Transmitter. Frame Synchronization 6. Select the Frame Step mode by clicking the Frame Step button ( ) in the ADSL application toolbar. Double click DP11 and DP12 in the ATU-R Transmitter block diagram to open the corresponding data point windows. The DP11 and DP12 windows display the time-domain samples at the input and output of the Cyclic Prefix block, respectively. Carefully compare the time-domain samples at the input and output of the Cyclic Prefix block. Describe the operation performed by the Cyclic Prefix block. Why does the Cyclic Prefix block perform this operation? 7. Print the data contents of DP12 (Cyclic Prefix block output) of the ATU-R Transmitter. These contents will be used later in the exercise for comparison with the contents of the equivalent data point in the ATU-C Receiver, for the same data frame (frame 64). Festo Didactic

10 b If no printer is available, record the contents of DP12 by making a Print Screen command while this data point window is displayed on the host computer screen. This transfers this data point window to the Clipboard of the host computer. Paste the copied data point window into a drawing tool like Microsoft Paint to have a copy of this window that can be consulted later in the exercise. 8. Close the DP11 window in the ATU-R Transmitter. Display the block diagram of the ATU-C Receiver. Click the Frame Step button once to transmit one more data frame. The frame number indicated in the ATU-C Receiver block diagram should be 64. Double click DP2 in the ATU-C Receiver block diagram to open the corresponding data point window. The data at DP2 comes from the Arithmetic Format Converter output, and is equivalent to the data at the Frame Synchronizer output (DP1) after conversion to the floating-point arithmetic format. Every symbol interval, the data at DP2 consists of 68 timedomain samples of the ADSL signal received. Observe the time-domain samples of the ADSL signal at DP2 of the ATU-C Receiver. Compare the first four time-domain samples with the last four timedomain samples. Do they match? What does this indicate? Compare the first 10 time-domain samples at DP2 of the ATU-C Receiver with the corresponding time-domain samples present at DP12 of the ATU-R Transmitter when data frame 64 was transmitted (see data point window of the ATU-R Transmitter that you printed or recorded previously). Do they match each other? What does this indicate? 9. Double click DP3 in the ATU-C Receiver block diagram to open the corresponding data point window. The data at DP3 comes from the Cyclic Prefix Remover. 94 Festo Didactic

11 Compare the time-domain samples at DP2 and DP3 of the ATU-C Receiver. Describe the operation performed by the Cyclic Prefix Remover. Close the DP3 window in the ATU-C Receiver. 10. Turn the Frame Synchronizer in the ATU-C Receiver off by changing the Frame Synchronizer setting to Off in the ADSL Settings table. b The Frame Synchronizer can also be turned off by clicking the button in the Frame Synchronizer block of the ATU-C Receiver block diagram. Click the Frame Step button once to transmit one more data frame. The frame number indicated in the ATU-C Receiver block diagram should be 65. Print (or record) the data contents of DP12 (Cyclic Prefix block output) of the ATU-R Transmitter. Display the ATU-R Transmitter block diagram momentarily to observe that the frame number indicated in the ATU-R Transmitter is 66. Click the Frame Step button once to transmit one more data frame. The frame number indicated in the ATU-C Receiver block diagram should be 66. Observe the time-domain samples of the ADSL signal at DP2 of the ATU-C Receiver. Compare the first four time-domain samples with the last four timedomain samples. Do they match? What does this indicate? Compare the first 10 time-domain samples at DP2 of the ATU-C Receiver with the corresponding time-domain samples present at DP12 of the ATU-R Transmitter when data frame 66 was transmitted (see data point window of the ATU-R Transmitter that you printed or recorded in this step). Do they match each other? What does this indicate? Festo Didactic

12 Superframe Synchronization 11. Turn the Frame Synchronizer in the ATU-C Receiver on by changing the Frame Synchronizer setting to On in the ADSL Settings table. Close all open Data Point windows. Select the Continuous mode of operation by clicking the Continuous button ( ) in the ADSL application toolbar. This allows the system to recover frame synchronization. Select the Frame Step mode by clicking the Frame Step button in the ADSL application toolbar. 12. Display the block diagram of the ATU-R Transmitter. The frame number indicated in the Sync. Control block of the ATU-R Transmitter should be 64. Use the Pan and Zoom commands to display the portion of the ATU-R Transmitter block diagram shown in Figure 60. Figure 60. Portion of the ATU-R Transmitter block diagram showing the Synchronization Symbol Source and Symbol Multiplexer. Double click DP8 and DP9 in the ATU-R Transmitter block diagram to open the corresponding data point windows. The DP8 and DP9 windows display data coming from the Synchronization Symbol Source and the Symbol Multiplexer output, respectively. Click the Frame Step button until the frame number indicated in the Sync. Control block of the ATU-R Transmitter is 67. While doing this, observe the data contents of the DP8 and DP9 windows as well as the Symbol Multiplexer in the ATU-R Transmitter block diagram. Describe what happens. 96 Festo Didactic

13 13. Click the Frame Step button once to transmit one more data frame (frame 68). Observe the data contents of the DP8 and DP9 windows as well as the Symbol Multiplexer in the ATU-R Transmitter block diagram. Describe what happens during frame 68. Briefly explain the purpose of the operation that takes place in the ATU-R Transmitter during frame Close the DP9 window in the ATU-R Transmitter. Select the Continuous mode of operation by clicking the Continuous button in the ADSL application toolbar. Select the Frame Step mode by clicking the Frame Step button in the ADSL application toolbar. The frame number indicated in the Sync. Control block of the ATU-R Transmitter should be Display the block diagram of the ATU-C Receiver. The frame number indicated in the Frame Counter of the ATU-C Receiver should be 63. Use the Pan and Zoom commands to display the portion of the ATU-C Receiver block diagram shown in Figure 61. Double click DP4 in the ATU-C Receiver block diagram to open the corresponding data point window. The data at DP4 comes from the FFT block output. Festo Didactic

14 Figure 61. Portion of the ATU-C Receiver block diagram showing the Sync. Symbol Detector. 16. Click the Frame Step button until the frame number indicated in the Frame Counter of the ATU-C Receiver is 67. While doing this, observe the data contents of the DP8 window in the ATU-R Transmitter and the DP4 window in the ATU-C Receiver. Describe what happens. 17. Click the Frame Step button once to receive one more data frame (frame 68). Compare the data in the DP4 window of the ATU-C Receiver to that in the DP8 window of the ATU-R Transmitter. Do they match each other? What does this indicate to the ATU-C Receiver? 98 Festo Didactic

15 18. Click the Frame Step button once to receive one more data frame, while observing the Frame Counter in the ATU-C Receiver. Describe what happens. Explain why. 19. Select the Continuous mode of operation by clicking the Continuous button in the ADSL application toolbar. Select the Frame Step mode by clicking the Frame Step button in the ADSL application toolbar. The frame number indicated by the Frame Counter in the ATU-C Receiver should be 63. In the LVCT window, double click the ATU-R Transmitter tab to display the ATU-R Transmitter block diagram in a separate window. Adjust the dimensions of this window so that it is approximately of the size shown in Figure 62. Use the Zoom and Pan commands to display the Sync. Control block in the ATU-R Transmitter block diagram. Figure 62 shows an example of what you should observe on the host computer screen. Figure 62. Observing the frame numbers at the ATU-R Transmitter and ATU-C Receiver. Notice that there is a delay of one frame between the ATU-R Transmitter and the ATU-C Receiver. Festo Didactic

16 20. Click the Reset button in the Frame Counter of the ATU-C Receiver, and click the Frame Step button in the ADSL application toolbar. Notice that the Frame Counter of the ATU-C Receiver is reset, thereby causing superframe synchronization to be lost (see Figure 63). Also notice that the SYNC. LED in the Frame Counter goes out to indicate that superframe synchronization is lost. Figure 63. Superframe synchronization loss. Click the Frame Step button three times. The frame number indicated in the Frame Sync. block of the ATU-R Transmitter should be 68 while that indicated in the Frame Counter of the ATU-C Receiver should be 3. This indicates that superframe synchronization has not been recovered. Click the Frame Step button once to receive one more data frame (frame 68), while observing the Frame Counter in the ATU-C Receiver. Describe what happens. Explain briefly. CRC Codes and Error Detection 21. Select the Continuous mode of operation by clicking the Continuous button in the ADSL application toolbar. Select the Frame Step mode by clicking the Frame Step button in the ADSL application toolbar. The frame number indicated by the Frame Counter in the ATU-C Receiver should be Festo Didactic

17 Make the settings required to obtain the view shown in Figure 64. Observe that the CRC Calculation block in the ATU-R Transmitter block diagram indicates the value (05h in Figure 64) of the CRC calculated up to frame 64 of the current superframe. Similarly, the CRC Calculation block in the ATU-C Receiver block diagram indicates the value (FCh in Figure 64) of the CRC calculated up to frame 63 of the current superframe. This explains why the CRC values indicated in the ATU-R Transmitter and the ATU-C Receiver differ. Figure 64. CRC values indicated in the ATU-R Transmitter and ATU-C Receiver. Double click DP2 in the ATU-R Transmitter block diagram to open the corresponding data point window. This window displays the data transmitted each frame. Click the Frame Step button three times to advance three data frames (i.e., up to frame 67 in the ATU-R Transmitter), while observing the DP2 window and the CRC values indicated in the CRC Calculation blocks of the ATU-R Transmitter and ATU-C Receiver. Describe what happens. Explain briefly. Festo Didactic

18 22. Click the Frame Step button once to advance one data frame (i.e., up to frame 68 in the ATU-R Transmitter), while observing the DP2 window and the CRC values indicated in the CRC Calculation blocks of the ATU-R Transmitter and ATU-C Receiver. Describe what happens. Explain briefly. 23. Click the Frame Step button once to advance one data frame (i.e., up to frame 0 in the ATU-R Transmitter), while observing the DP2 window and the CRC values indicated in the CRC Calculation blocks and CRC Buffers of the ATU-R Transmitter and ATU-C Receiver. Describe what happens. 24. Note the Bad CRC Count indicated in the ATU-C Receiver block diagram. Double click DP10 in the ATU-R Transmitter block diagram to open the corresponding data point window. This window displays the data received every frame. Click the Frame Step button once to advance one data frame (i.e., up to frame 1 in the ATU-R Transmitter), while observing the DP10 window and the CRC values indicated in the ATU-C Receiver. Describe what happens. 102 Festo Didactic

19 Does the Bad CRC Count increase in the ATU-C Receiver? Briefly explain why. 25. Select the Continuous mode of operation by clicking the Continuous button in the ADSL application toolbar. Select the Frame Step mode by clicking the Frame Step button in the ADSL application toolbar. The frame number indicated by the Sync. Control block in the ATU-R Transmitter should be 64. Reset the bad CRC count by clicking the Reset button in the Bad CRC Count block of the ATU-C Receiver. Click the Frame Step button two times to advance two data frames (i.e., up to frame 66 in the ATU-R Transmitter), while observing the CRC values indicated in the CRC Calculation blocks of the ATU-R Transmitter and ATU-C Receiver. You should observe that the CRC value calculation goes normally in both the ATU-R Transmitter and the ATU-C Receiver, i.e., the CRC value displayed in the CRC Calculation block of the ATU-C Receiver for a particular frame is equal to that displayed in the CRC Calculation block of the ATU-R Transmitter for the same frame. Note the data values at DP2 of the ATU-R Transmitter as well as the CRC value indicated in the CRC Calculation block at frame 66. In the ATU-C Receiver block diagram, click the switch located just before DP8 to open the path between the Deinterleaver and the Reed-Solomon Decoder. Click the Frame Step button once to advance one data frame (i.e., up to frame 67 in the ATU-R Transmitter), while observing the DP10 window and the CRC values indicated in the CRC Calculation blocks of the ATU-R Transmitter and ATU-C Receiver. Notice that this introduces errors in the current superframe received at the ATU-C Receiver, the data values at DP10 of the ATU-C Receiver being different from those you noted earlier in this step. Festo Didactic

20 Is the CRC value displayed in the CRC Calculation block of the ATU-C Receiver for frame 66 equal to the one calculated by the ATU-R Transmitter at frame 66 (CRC value you noted earlier in this step)? Why. 26. In the ATU-C Receiver block diagram, click the switch located just before DP8 to close the path between the Deinterleaver and the Reed-Solomon Decoder. Click the Frame Step button three times to advance three data frames (i.e., up to frame 1 in the ATU-R Transmitter), while observing the CRC values displayed in the CRC Buffer and CRC From Frame 0 block of the ATU-C Receiver, and the Bad CRC Count. Describe what happens. Explain briefly. 27. The superframe duration in our ADSL application is 16.5 ms. How many error detections would occur if the cable connecting the ATU-R Transmitter Output to the ATU-C Receiver Input were disconnected during 10 s? 28. Select the Continuous mode of operation by clicking the Continuous button in the ADSL application toolbar. Reset the bad CRC count by clicking the Reset button in the Bad CRC Count block of the ATU-C Receiver. Disconnect the cable at the ATU-C Receiver Input for a period of 10 s. Note the bad CRC count indicated in the ATU-C Receiver block diagram. Bad CRC Count: Does the bad CRC count you recorded correspond to the number of error detections expected? Yes No 104 Festo Didactic

21 Exercise 4 Framing, Synchronization, and Error Detection Conclusion Net Data Rate versus Aggregate Data Rate 29. Observe the Performance Display in the ADSL application window. Briefly explain why the Net Data Rate is less than the Aggregate Data Rate. 30. When you have finished using the system, exit the LVCT software and turn off the equipment. CONCLUSION In this exercise, you studied the superframe structure of ADSL. You saw that the data frame buffer in our ADSL application is equivalent to the fast data buffer or the interleaved data buffer defined in ITU-T Recommendation G.992.1, depending on whether the Interleaver is turned on or off. You learned that a cyclic prefix is used in ADSL to achieve frame synchronization. You also learned that a synchronization symbol is transmitted once every superframe to achieve superframe synchronization. You saw that ADSL is provided with a function that allows automatic detection of errors occurring during the transmission of a superframe. You observed that this error detection function is achieved using CRC codes. Finally, you learned why the net data rate is less than the aggregate data rate in ADSL. REVIEW QUESTIONS 1. Describe the superframe structure of ADSL. 2. What are the respective roles of frame synchronization and superframe synchronization in ADSL? Festo Didactic

22 Exercise 4 Framing, Synchronization, and Error Detection Review Questions 3. Briefly explain how frame synchronization between an ATU-R Transmitter and an ATU-C Receiver is achieved. 4. Briefly explain how superframe synchronization is achieved in ADSL. 5. Briefly explain how error detection is achieved in ADSL. 106 Festo Didactic

Forward Error Correction Using Reed-Solomon Codes

Forward Error Correction Using Reed-Solomon Codes Exercise 5 Forward Error Correction Using Reed-Solomon Codes EXERCISE OBJECTIVE When you have completed this exercise, you will be familiar with the concept of forward error correction (FEC). You will

More information

4. Error correction and link control. Contents

4. Error correction and link control. Contents //2 4. Error correction and link control Contents a. Types of errors b. Error detection and correction c. Flow control d. Error control //2 a. Types of errors Data can be corrupted during transmission.

More information

UNIT-II 1. Discuss the issues in the data link layer. Answer:

UNIT-II 1. Discuss the issues in the data link layer. Answer: UNIT-II 1. Discuss the issues in the data link layer. Answer: Data Link Layer Design Issues: The data link layer has a number of specific functions it can carry out. These functions include 1. Providing

More information

Chapter 3. The Data Link Layer. Wesam A. Hatamleh

Chapter 3. The Data Link Layer. Wesam A. Hatamleh Chapter 3 The Data Link Layer The Data Link Layer Data Link Layer Design Issues Error Detection and Correction Elementary Data Link Protocols Sliding Window Protocols Example Data Link Protocols The Data

More information

ADSL (Asymmetrical Digital Subscriber Line) details

ADSL (Asymmetrical Digital Subscriber Line) details ADSL (Asymmetrical Digital Subscriber Line) details A D S L Asymmetrical Digital Subscriber Line Central Office Customer premises High- Rate channel Low- Rate channel LP HP Spectrum At the beginning two

More information

ADSL Transmitter Modeling and Simulation. Department of Electrical and Computer Engineering University of Texas at Austin. Kripa Venkatachalam.

ADSL Transmitter Modeling and Simulation. Department of Electrical and Computer Engineering University of Texas at Austin. Kripa Venkatachalam. ADSL Transmitter Modeling and Simulation Department of Electrical and Computer Engineering University of Texas at Austin Kripa Venkatachalam Qiu Wu EE382C: Embedded Software Systems May 10, 2000 Abstract

More information

Chapter Six. Errors, Error Detection, and Error Control. Data Communications and Computer Networks: A Business User s Approach Seventh Edition

Chapter Six. Errors, Error Detection, and Error Control. Data Communications and Computer Networks: A Business User s Approach Seventh Edition Chapter Six Errors, Error Detection, and Error Control Data Communications and Computer Networks: A Business User s Approach Seventh Edition After reading this chapter, you should be able to: Identify

More information

Asymmetrical Digital Subscriber Line (ADSL)

Asymmetrical Digital Subscriber Line (ADSL) Asymmetrical Digital Subscriber Line (ADSL) Asymmetrical Digital Subscriber Line Background motivation for developing ADSL historical development DSL end-to-end environment and reference model Line environment

More information

Data Link Layer. Srinidhi Varadarajan

Data Link Layer. Srinidhi Varadarajan Data Link Layer Srinidhi Varadarajan Data Link Layer: Functionality The data link layer must: Detect errors (using redundancy bits) Request retransmission if data is lost (using automatic repeat request

More information

Data Link Layer: Overview, operations

Data Link Layer: Overview, operations Data Link Layer: Overview, operations Chapter 3 1 Outlines 1. Data Link Layer Functions. Data Link Services 3. Framing 4. Error Detection/Correction. Flow Control 6. Medium Access 1 1. Data Link Layer

More information

Error Detection Codes. Error Detection. Two Dimensional Parity. Internet Checksum Algorithm. Cyclic Redundancy Check.

Error Detection Codes. Error Detection. Two Dimensional Parity. Internet Checksum Algorithm. Cyclic Redundancy Check. Error Detection Two types Error Detection Codes (e.g. CRC, Parity, Checksums) Error Correction Codes (e.g. Hamming, Reed Solomon) Basic Idea Add redundant information to determine if errors have been introduced

More information

CMSC 2833 Lecture 18. Parity Add a bit to make the number of ones (1s) transmitted odd.

CMSC 2833 Lecture 18. Parity Add a bit to make the number of ones (1s) transmitted odd. Parity Even parity: Odd parity: Add a bit to make the number of ones (1s) transmitted even. Add a bit to make the number of ones (1s) transmitted odd. Example and ASCII A is coded 100 0001 Parity ASCII

More information

COMPUTER NETWORKS UNIT-3

COMPUTER NETWORKS UNIT-3 COMPUTER NETWORKS UNIT-3 Syllabus: The Data Link Layer - Data Link Layer Design Issues, Services Provided to the Network Layer Framing Error Control Flow Control, Error Detection and Correction Error-Correcting

More information

(Refer Slide Time: 2:20)

(Refer Slide Time: 2:20) Data Communications Prof. A. Pal Department of Computer Science & Engineering Indian Institute of Technology, Kharagpur Lecture-15 Error Detection and Correction Hello viewers welcome to today s lecture

More information

Lecture / The Data Link Layer: Framing and Error Detection

Lecture / The Data Link Layer: Framing and Error Detection Lecture 2 6.263/16.37 The Data Link Layer: Framing and Error Detection MIT, LIDS Slide 1 Data Link Layer (DLC) Responsible for reliable transmission of packets over a link Framing: Determine the start

More information

Data Link Layer (part 2)

Data Link Layer (part 2) Data Link Layer (part 2)! Question - What is a major disadvantage of asynchronous transmission? Reference: Chapters 6 and 7 Stallings Study Guide 6! Question - What is a major disadvantage of asynchronous

More information

Chapter 3. The Data Link Layer

Chapter 3. The Data Link Layer Chapter 3 The Data Link Layer 1 Data Link Layer Algorithms for achieving reliable, efficient communication between two adjacent machines. Adjacent means two machines are physically connected by a communication

More information

Data link layer functions. 2 Computer Networks Data Communications. Framing (1) Framing (2) Parity Checking (1) Error Detection

Data link layer functions. 2 Computer Networks Data Communications. Framing (1) Framing (2) Parity Checking (1) Error Detection 2 Computer Networks Data Communications Part 6 Data Link Control Data link layer functions Framing Needed to synchronise TX and RX Account for all bits sent Error control Detect and correct errors Flow

More information

CHAPTER 2 Data Representation in Computer Systems

CHAPTER 2 Data Representation in Computer Systems CHAPTER 2 Data Representation in Computer Systems 2.1 Introduction 37 2.2 Positional Numbering Systems 38 2.3 Decimal to Binary Conversions 38 2.3.1 Converting Unsigned Whole Numbers 39 2.3.2 Converting

More information

PHY Link Channel Resource Allocation, Overhead, Impact on Procedures. Nicola Varanese (Qualcomm)

PHY Link Channel Resource Allocation, Overhead, Impact on Procedures. Nicola Varanese (Qualcomm) PHY Link Channel Resource Allocation, Overhead, Impact on Procedures Nicola Varanese (Qualcomm) 1 Summary A PHY Control Channel (PLC) is needed for Aiding PHY initialization and CNU bring-up Broadcasting

More information

Advanced Computer Networks. Rab Nawaz Jadoon DCS. Assistant Professor COMSATS University, Lahore Pakistan. Department of Computer Science

Advanced Computer Networks. Rab Nawaz Jadoon DCS. Assistant Professor COMSATS University, Lahore Pakistan. Department of Computer Science Advanced Computer Networks Department of Computer Science DCS COMSATS Institute of Information Technology Rab Nawaz Jadoon Assistant Professor COMSATS University, Lahore Pakistan Advanced Computer Networks

More information

SRI RAMAKRISHNA INSTITUTE OF TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY COMPUTER NETWORKS UNIT - II DATA LINK LAYER

SRI RAMAKRISHNA INSTITUTE OF TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY COMPUTER NETWORKS UNIT - II DATA LINK LAYER SRI RAMAKRISHNA INSTITUTE OF TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY COMPUTER NETWORKS UNIT - II DATA LINK LAYER 1. What are the responsibilities of data link layer? Specific responsibilities of

More information

Fast Communications Controller

Fast Communications Controller Fast Communications Controller Purpose: The Fast Communications Controller HDLC Protocol module describes the use of the FCC when used in HDLC mode. Objectives: This will provide you with an understanding

More information

M A S S A C H U S E T T S I N S T I T U T E O F T E C H N O L O G Y DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE

M A S S A C H U S E T T S I N S T I T U T E O F T E C H N O L O G Y DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE M A S S A C H U S E T T S I N S T I T U T E O F T E C H N O L O G Y DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE 6.111 Introductory Digital Systems Laboratory Fall 2017 Lecture PSet #6 of

More information

2.1 CHANNEL ALLOCATION 2.2 MULTIPLE ACCESS PROTOCOLS Collision Free Protocols 2.3 FDDI 2.4 DATA LINK LAYER DESIGN ISSUES 2.5 FRAMING & STUFFING

2.1 CHANNEL ALLOCATION 2.2 MULTIPLE ACCESS PROTOCOLS Collision Free Protocols 2.3 FDDI 2.4 DATA LINK LAYER DESIGN ISSUES 2.5 FRAMING & STUFFING UNIT-2 2.1 CHANNEL ALLOCATION 2.2 MULTIPLE ACCESS PROTOCOLS 2.2.1 Pure ALOHA 2.2.2 Slotted ALOHA 2.2.3 Carrier Sense Multiple Access 2.2.4 CSMA with Collision Detection 2.2.5 Collision Free Protocols 2.2.5.1

More information

Data Link Control. Surasak Sanguanpong Last updated: 11 July 2000

Data Link Control. Surasak Sanguanpong  Last updated: 11 July 2000 1/14 Data Link Control Surasak Sanguanpong nguan@ku.ac.th http://www.cpe.ku.ac.th/~nguan Last updated: 11 July 2000 Flow Control 2/14 technique for controlling the data transmission so that s have sufficient

More information

PART III. Data Link Layer MGH T MGH C I 204

PART III. Data Link Layer MGH T MGH C I 204 PART III Data Link Layer Position of the data-link layer Data link layer duties LLC and MAC sublayers IEEE standards for LANs Chapters Chapter 10 Error Detection and Correction Chapter 11 Data Link Control

More information

CHAPTER 2 Data Representation in Computer Systems

CHAPTER 2 Data Representation in Computer Systems CHAPTER 2 Data Representation in Computer Systems 2.1 Introduction 37 2.2 Positional Numbering Systems 38 2.3 Decimal to Binary Conversions 38 2.3.1 Converting Unsigned Whole Numbers 39 2.3.2 Converting

More information

Exercise 2. Single Bus Scheme EXERCISE OBJECTIVE DISCUSSION OUTLINE. The single bus scheme DISCUSSION

Exercise 2. Single Bus Scheme EXERCISE OBJECTIVE DISCUSSION OUTLINE. The single bus scheme DISCUSSION Exercise 2 Single Bus Scheme EXERCISE OBJECTIVE When you have completed this exercise, you will be familiar with electric power substations using the single bus scheme with bus section circuit breakers.

More information

CompSci 356: Computer Network Architectures. Lecture 4: Link layer: Encoding, Framing, and Error Detection Ref. Chap 2.2, 2.3,2.4

CompSci 356: Computer Network Architectures. Lecture 4: Link layer: Encoding, Framing, and Error Detection Ref. Chap 2.2, 2.3,2.4 CompSci 356: Computer Network Architectures Lecture 4: Link layer: Encoding, Framing, and Error Detection Ref. Chap 2.2, 2.3,2.4 Xiaowei Yang xwy@cs.duke.edu Overview Review: link/network performance metrics

More information

From Signals to Packets Computer Networking. Link Layer: Implementation. Datalink Functions. Lecture 5 - Coding and Error Control

From Signals to Packets Computer Networking. Link Layer: Implementation. Datalink Functions. Lecture 5 - Coding and Error Control From Signals to Packets 15-441 Computer Networking Lecture 5 - Coding and Error Control Analog Signal Digital Signal Bit Stream 0 0 1 0 1 1 1 0 0 0 1 Packets 0100010101011100101010101011101110000001111010101110101010101101011010111001

More information

Ch. 7 Error Detection and Correction

Ch. 7 Error Detection and Correction Ch. 7 Error Detection and Correction Error Detection and Correction Data can be corrupted during transmission. Some applications require that errors be detected and corrected. 2 1. Introduction Let us

More information

Digital Fundamentals

Digital Fundamentals Digital Fundamentals Tenth Edition Floyd Chapter 1 Modified by Yuttapong Jiraraksopakun Floyd, Digital Fundamentals, 10 th 2008 Pearson Education ENE, KMUTT ed 2009 Analog Quantities Most natural quantities

More information

Department of Computer and IT Engineering University of Kurdistan. Data Communication Netwotks (Graduate level) Data Link Layer

Department of Computer and IT Engineering University of Kurdistan. Data Communication Netwotks (Graduate level) Data Link Layer Department of Computer and IT Engineering University of Kurdistan Data Communication Netwotks (Graduate level) Data Link Layer By: Dr. Alireza Abdollahpouri Data Link Layer 2 Data Link Layer Application

More information

Chapter 6 Digital Data Communications Techniques

Chapter 6 Digital Data Communications Techniques Chapter 6 Digital Data Communications Techniques Asynchronous and Synchronous Transmission timing problems require a mechanism to synchronize the transmitter and receiver receiver samples stream at bit

More information

CSMC 417. Computer Networks Prof. Ashok K Agrawala Ashok Agrawala Set 4. September 09 CMSC417 Set 4 1

CSMC 417. Computer Networks Prof. Ashok K Agrawala Ashok Agrawala Set 4. September 09 CMSC417 Set 4 1 CSMC 417 Computer Networks Prof. Ashok K Agrawala 2009 Ashok Agrawala Set 4 1 The Data Link Layer 2 Data Link Layer Design Issues Services Provided to the Network Layer Framing Error Control Flow Control

More information

Chapter 10 Error Detection and Correction. Copyright The McGraw-Hill Companies, Inc. Permission required for reproduction or display.

Chapter 10 Error Detection and Correction. Copyright The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Chapter 10 Error Detection and Correction 0. Copyright The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Note The Hamming distance between two words is the number of differences

More information

Combined EFM PHY using Single Carrier Modulation

Combined EFM PHY using Single Carrier Modulation Combined EFM PHY using Single Carrier Modulation Combining SHDSL & QAM VDSL in an EFM PHY 802.3ah EFM Copper June 2003, Ottawa 1 Page 1 Supporters 2 Page 2 The Vision! SCM technology used over copper by

More information

Data Link Protocols. High Level Data. Control Protocol. HDLC Framing ~~~~~~~~ Functions of a Data Link Protocol. Framing PDUs. Addressing Destination

Data Link Protocols. High Level Data. Control Protocol. HDLC Framing ~~~~~~~~ Functions of a Data Link Protocol. Framing PDUs. Addressing Destination Data Link Protocols Data Link Services Connection-less services Functions of a Data Link Protocol Framing PDUs ing Destination Error Detection / Error Recovery Link Management Ethernet (covered elsewhere)

More information

Lecture 5. Homework 2 posted, due September 15. Reminder: Homework 1 due today. Questions? Thursday, September 8 CS 475 Networks - Lecture 5 1

Lecture 5. Homework 2 posted, due September 15. Reminder: Homework 1 due today. Questions? Thursday, September 8 CS 475 Networks - Lecture 5 1 Lecture 5 Homework 2 posted, due September 15. Reminder: Homework 1 due today. Questions? Thursday, September 8 CS 475 Networks - Lecture 5 1 Outline Chapter 2 - Getting Connected 2.1 Perspectives on Connecting

More information

Chapter 9: Data Transmission

Chapter 9: Data Transmission Chapter 9: Data Transmission MULTIPLE CHOICE 1. In practical terms, parallel data transmission is sent: a. over short distances only c. over any distance b. usually over long distances d. usually over

More information

)454 6 TELECOMMUNICATION STANDARDIZATION SECTOR OF ITU

)454 6 TELECOMMUNICATION STANDARDIZATION SECTOR OF ITU INTERNATIONAL TELECOMMUNICATION UNION )454 6 TELECOMMUNICATION STANDARDIZATION SECTOR OF ITU $!4! #/--5.)#!4)/. /6%2 4(% 4%,%0(/.%.%47/2+ #/$%).$%0%.$%.4 %22/2#/.42/, 3934%- )454 Recommendation 6 (Extract

More information

CS321: Computer Networks Error Detection and Correction

CS321: Computer Networks Error Detection and Correction CS321: Computer Networks Error Detection and Correction Dr. Manas Khatua Assistant Professor Dept. of CSE IIT Jodhpur E-mail: manaskhatua@iitj.ac.in Error Detection and Correction Objective: System must

More information

CHAPTER 4 DATA COMMUNICATION MODES

CHAPTER 4 DATA COMMUNICATION MODES USER S MANUAL CHAPTER DATA COMMUNICATION MODES. INTRODUCTION The SCC provides two independent, full-duplex channels programmable for use in any common asynchronous or synchronous data communication protocol.

More information

ELEC 691X/498X Broadcast Signal Transmission Winter 2018

ELEC 691X/498X Broadcast Signal Transmission Winter 2018 ELEC 691X/498X Broadcast Signal Transmission Winter 2018 Instructor: DR. Reza Soleymani, Office: EV 5.125, Telephone: 848 2424 ext.: 4103. Office Hours: Wednesday, Thursday, 14:00 15:00 Slide 1 In this

More information

Interoperability Requirements for Nx56/64 kbit/s Calls BONDING

Interoperability Requirements for Nx56/64 kbit/s Calls BONDING Interoperability Requirements for Nx56/64 kbit/s Calls Version 1.0 September 1, 1992 Copyright 1992 BONDING Consortium All Rights Reserved BONDING TM Bandwidth ON Demand INteroperability Group BONDING

More information

CSCI-1680 Link Layer I Rodrigo Fonseca

CSCI-1680 Link Layer I Rodrigo Fonseca CSCI-1680 Link Layer I Rodrigo Fonseca Based partly on lecture notes by David Mazières, Phil Levis, John Jannotti Last time Physical layer: encoding, modulation Today Link layer framing Getting frames

More information

11. SEU Mitigation in Stratix IV Devices

11. SEU Mitigation in Stratix IV Devices 11. SEU Mitigation in Stratix IV Devices February 2011 SIV51011-3.2 SIV51011-3.2 This chapter describes how to use the error detection cyclical redundancy check (CRC) feature when a Stratix IV device is

More information

Direct Link Networks. Framing. Lecture - Encoding & Framing 1. Problems. Areas for Discussion

Direct Link Networks. Framing. Lecture - Encoding & Framing 1. Problems. Areas for Discussion Areas for Discussion Direct Link s Joseph Spring School of Computer Science 3COM0271 Computer Protocols & Architecture s Based on Chapter 2, Peterson & Davie, Computer s: A Systems Approach, 4 th Ed Problems

More information

CSMC 417. Computer Networks Prof. Ashok K Agrawala Ashok Agrawala. Nov 1,

CSMC 417. Computer Networks Prof. Ashok K Agrawala Ashok Agrawala. Nov 1, CSMC 417 Computer Networks Prof. Ashok K Agrawala 2018 Ashok Agrawala 1 Message, Segment, Packet, and Frame host host HTTP HTTP message HTTP TCP TCP segment TCP router router IP IP packet IP IP packet

More information

2.4 Error Detection Bit errors in a frame will occur. How do we detect (and then. (or both) frames contains an error. This is inefficient (and not

2.4 Error Detection Bit errors in a frame will occur. How do we detect (and then. (or both) frames contains an error. This is inefficient (and not CS475 Networks Lecture 5 Chapter 2: Direct Link Networks Assignments Reading for Lecture 6: Sections 2.6 2.8 Homework 2: 2.1, 2.4, 2.6, 2.14, 2.18, 2.31, 2.35. Due Thursday, Sept. 15 2.4 Error Detection

More information

William Stallings Data and Computer Communications. Chapter 7 Data Link Control

William Stallings Data and Computer Communications. Chapter 7 Data Link Control William Stallings Data and Computer Communications Chapter 7 Data Link Control Flow Control Ensuring the sending entity does not overwhelm the receiving entity Preventing buffer overflow Transmission time

More information

Coding theory for scalable media delivery

Coding theory for scalable media delivery 1 Coding theory for scalable media delivery Michael Luby RaptorQ is a product of Qualcomm Technologies, Inc. Application layer erasure coding complements traditional error coding Forward Error Correction

More information

EE 387 course information

EE 387 course information EE 387 course information EE 387, Notes 1, Handout #2 Instructor: John Gill, Packard 266 Textbook: Algebraic Codes for Data Transmission by Richard Blahut Weekly homework, including occasional programming

More information

Inst: Chris Davison

Inst: Chris Davison ICS 153 Introduction to Computer Networks Inst: Chris Davison cbdaviso@uci.edu ICS 153 Data Link Layer Contents Simplex and Duplex Communication Frame Creation Flow Control Error Control Performance of

More information

Computer Networking. Lecture 4 - Coding and Error Control

Computer Networking. Lecture 4 - Coding and Error Control 15-441 Computer Networking Lecture 4 - Coding and Error Control From Signals to Frames Analog Signal Digital Signal Bit Stream 0 0 1 0 1 1 1 0 0 0 1 Packets 0100010101011100101010101011101110000001111010101110101010101101011010111001

More information

Current and Projected Digital Complexity of DMT VDSL

Current and Projected Digital Complexity of DMT VDSL June 1, 1999 1 Standards Project: T1E1.4:99-268 VDSL Title: Current and Projected Digital Complexity of DMT VDSL Source: Texas Instruments Author: C. S. Modlin J. S. Chow Texas Instruments 2043 Samaritan

More information

Table of Contents 1. INTRODUCTION SYSTEM DESCRIPTION...1

Table of Contents 1. INTRODUCTION SYSTEM DESCRIPTION...1 Table of Contents 1. INTRODUCTION...1 2. SYSTEM DESCRIPTION...1 3. ST-106 VERSION 1.0 RELEASE NOTES...2 3.1 UPGRADES AND NEW FEATURES...2 3.2 KNOWN DISCREPANCIES...2 4. SYSTEM REQUIREMENTS...3 5. INSTALLATION...3

More information

From Signals to Packets Computer Networking. Link Layer: Implementation. Network Delay. 06-datalink.ppt, , Fall

From Signals to Packets Computer Networking. Link Layer: Implementation. Network Delay. 06-datalink.ppt, , Fall From Signals to Packets 15-441 Computer Networking Lecture 6 - Coding and Error Control Analog Signal Digital Signal Bit Stream 0 0 1 0 1 1 1 0 0 0 1 Packets 0100010101011100101010101011101110000001111010101110101010101101011010111001

More information

Lecture 6 Datalink Framing, Switching. From Signals to Packets

Lecture 6 Datalink Framing, Switching. From Signals to Packets Lecture 6 Datalink Framing, Switching David Andersen Department of Computer Science Carnegie Mellon University 15-441 Networking, Spring 2005 http://www.cs.cmu.edu/~srini/15-441/s05/ 1 From Signals to

More information

DC Assignment III. Communication via circuit switching implies that there is a dedicated communication path between two stations.

DC Assignment III. Communication via circuit switching implies that there is a dedicated communication path between two stations. DC Assignment III 1. Explain circuit-switched Network with neat Diagrams. Communication via circuit switching implies that there is a dedicated communication path between two stations. That path is a connected

More information

Ad hoc and Sensor Networks Chapter 6: Link layer protocols. Holger Karl

Ad hoc and Sensor Networks Chapter 6: Link layer protocols. Holger Karl Ad hoc and Sensor Networks Chapter 6: Link layer protocols Holger Karl Goals of this chapter Link layer tasks in general Framing group bit sequence into packets/frames Important: format, size Error control

More information

Module 6 STILL IMAGE COMPRESSION STANDARDS

Module 6 STILL IMAGE COMPRESSION STANDARDS Module 6 STILL IMAGE COMPRESSION STANDARDS Lesson 19 JPEG-2000 Error Resiliency Instructional Objectives At the end of this lesson, the students should be able to: 1. Name two different types of lossy

More information

EMI Reduction algorithm using enhanced-harq Implementation for Controller Area Network

EMI Reduction algorithm using enhanced-harq Implementation for Controller Area Network EMI Reduction algorithm using enhanced-harq Implementation for Controller Area Network Cheolsu Han 1 and Hi Seok Kim 2 1,2 Electronic Engineering Department, Cheongju University, Cheongju City, South Korea.

More information

INTERNATIONAL TELECOMMUNICATION UNION INTEGRATED SERVICES DIGITAL NETWORK (ISDN) OVERALL NETWORK ASPECTS AND FUNCTIONS

INTERNATIONAL TELECOMMUNICATION UNION INTEGRATED SERVICES DIGITAL NETWORK (ISDN) OVERALL NETWORK ASPECTS AND FUNCTIONS INTERNATIONAL TELECOMMUNICATION UNION ITU-T I.363 TELECOMMUNICATION (03/93) STANDARDIZATION SECTOR OF ITU INTEGRATED SERVICES DIGITAL NETWORK (ISDN) OVERALL NETWORK ASPECTS AND FUNCTIONS B-ISDN ATM ADAPTATION

More information

EE 6900: FAULT-TOLERANT COMPUTING SYSTEMS

EE 6900: FAULT-TOLERANT COMPUTING SYSTEMS EE 6900: FAULT-TOLERANT COMPUTING SYSTEMS LECTURE 6: CODING THEORY - 2 Fall 2014 Avinash Kodi kodi@ohio.edu Acknowledgement: Daniel Sorin, Behrooz Parhami, Srinivasan Ramasubramanian Agenda Hamming Codes

More information

Advantages and disadvantages

Advantages and disadvantages Advantages and disadvantages Advantages Disadvantages Asynchronous transmission Simple, doesn't require synchronization of both communication sides Cheap, timing is not as critical as for synchronous transmission,

More information

Exercise 3-5. Multiple Push Buttons EXERCISE OBJECTIVE DISCUSSION

Exercise 3-5. Multiple Push Buttons EXERCISE OBJECTIVE DISCUSSION Exercise 3-5 Multiple Push Buttons EXERCISE OBJECTIVE Implement multiple push button control circuits. Understand the differences between stop push button and emergency button. DISCUSSION A standard three-wire

More information

I. INTRODUCTION. each station (i.e., computer, telephone, etc.) directly connected to all other stations

I. INTRODUCTION. each station (i.e., computer, telephone, etc.) directly connected to all other stations I. INTRODUCTION (a) Network Topologies (i) point-to-point communication each station (i.e., computer, telephone, etc.) directly connected to all other stations (ii) switched networks (1) circuit switched

More information

CSE 461: Framing, Error Detection and Correction

CSE 461: Framing, Error Detection and Correction CSE 461: Framing, Error Detection and Correction Next Topics Framing Focus: How does a receiver know where a message begins/ends Error detection and correction Focus: How do we detect and correct messages

More information

Point-to-Point Links. Outline Encoding Framing Error Detection Sliding Window Algorithm. Fall 2004 CS 691 1

Point-to-Point Links. Outline Encoding Framing Error Detection Sliding Window Algorithm. Fall 2004 CS 691 1 Point-to-Point Links Outline Encoding Framing Error Detection Sliding Window Algorithm Fall 2004 CS 691 1 Encoding Signals propagate over a physical medium modulate electromagnetic waves e.g., vary voltage

More information

Wireless Sensornetworks Concepts, Protocols and Applications. Chapter 5b. Link Layer Control

Wireless Sensornetworks Concepts, Protocols and Applications. Chapter 5b. Link Layer Control Wireless Sensornetworks Concepts, Protocols and Applications 5b Link Layer Control 1 Goals of this cha Understand the issues involved in turning the radio communication between two neighboring nodes into

More information

ITU-T. G Amendment 1 (06/2011) Improved impulse noise protection for DSL transceivers Amendment 1

ITU-T. G Amendment 1 (06/2011) Improved impulse noise protection for DSL transceivers Amendment 1 International Telecommunication Union ITU-T TELECOMMUNICATION STANDARDIZATION SECTOR OF ITU G.998.4 Amendment 1 (06/2011) SERIES G: TRANSMISSION SYSTEMS AND MEDIA, DIGITAL SYSTEMS AND NETWORKS Digital

More information

Introduction to Networked Multimedia An Introduction to RTP p. 3 A Brief History of Audio/Video Networking p. 4 Early Packet Voice and Video

Introduction to Networked Multimedia An Introduction to RTP p. 3 A Brief History of Audio/Video Networking p. 4 Early Packet Voice and Video Preface p. xi Acknowledgments p. xvii Introduction to Networked Multimedia An Introduction to RTP p. 3 A Brief History of Audio/Video Networking p. 4 Early Packet Voice and Video Experiments p. 4 Audio

More information

DATA LINK LAYER UNIT 7.

DATA LINK LAYER UNIT 7. DATA LINK LAYER UNIT 7 1 Data Link Layer Design Issues: 1. Service provided to network layer. 2. Determining how the bits of the physical layer are grouped into frames (FRAMING). 3. Dealing with transmission

More information

EITF25 Internet Techniques and Applications L3: Data Link layer. Stefan Höst

EITF25 Internet Techniques and Applications L3: Data Link layer. Stefan Höst EITF25 Internet Techniques and Applications L3: Data Link layer Stefan Höst Communication on physical layer To transmit on the physical medium use signals At each computer it can be seen as transmitting

More information

Chapter 3 The Data Link Layer

Chapter 3 The Data Link Layer Chapter 3 The Data Link Layer 陳瑞奇 (Rikki) 亞洲大學資訊工程學系 Adapted from Computer Networks, Andrew S. Tanenbaum, Vrije University, Netherlands & Computer Networking: A Top Down Approach, Jim Kurose, Keith Ross

More information

Data Link Control Protocols

Data Link Control Protocols Protocols : Introduction to Data Communications Sirindhorn International Institute of Technology Thammasat University Prepared by Steven Gordon on 23 May 2012 Y12S1L07, Steve/Courses/2012/s1/its323/lectures/datalink.tex,

More information

ITU-T G (06/99) Physical layer management for digital subscriber line (DSL) transceivers

ITU-T G (06/99) Physical layer management for digital subscriber line (DSL) transceivers INTERNATIONAL TELECOMMUNICATION UNION ITU-T TELECOMMUNICATION STANDARDIZATION SECTOR OF ITU G.997.1 (06/99) SERIES G: TRANSMISSION SYSTEMS AND MEDIA, DIGITAL SYSTEMS AND NETWORKS Digital transmission systems

More information

TYPES OF ERRORS. Data can be corrupted during transmission. Some applications require that errors be detected and corrected.

TYPES OF ERRORS. Data can be corrupted during transmission. Some applications require that errors be detected and corrected. Data can be corrupted during transmission. Some applications require that errors be detected and corrected. TYPES OF ERRORS There are two types of errors, 1. Single Bit Error The term single-bit error

More information

Chapter 10 Error Detection and Correction 10.1

Chapter 10 Error Detection and Correction 10.1 Chapter 10 Error Detection and Correction 10.1 10-1 INTRODUCTION some issues related, directly or indirectly, to error detection and correction. Topics discussed in this section: Types of Errors Redundancy

More information

Overview. A Survey of Packet-Loss Recovery Techniques. Outline. Overview. Mbone Loss Characteristics. IP Multicast Characteristics

Overview. A Survey of Packet-Loss Recovery Techniques. Outline. Overview. Mbone Loss Characteristics. IP Multicast Characteristics A Survey of Packet-Loss Recovery Techniques Overview Colin Perkins, Orion Hodson and Vicky Hardman Department of Computer Science University College London (UCL) London, UK IEEE Network Magazine Sep/Oct,

More information

SPART. SPART Design. A Special Purpose Asynchronous Receiver/Transmitter. The objectives of this miniproject are to:

SPART. SPART Design. A Special Purpose Asynchronous Receiver/Transmitter. The objectives of this miniproject are to: SPART A Special Purpose Asynchronous Receiver/Transmitter Introduction In this miniproject you are to implement a Special Purpose Asynchronous Receiver/Transmitter (SPART). The SPART can be integrated

More information

ET3110 Networking and Communications UNIT 2: Communication Techniques and Data Link Control Protocol skong@itt-tech.edutech.edu Learning Objectives Identify methods of detecting errors. Use Hamming code

More information

Chapter 14: Controlled Remote Tug Telemetry

Chapter 14: Controlled Remote Tug Telemetry Chapter 14: Controlled Remote Tug Telemetry Overview The WinFrog Controlled Remote Tug Telemetry module (also called Remote Control) and the WinFrog Remote package enable one central WinFrog system to

More information

1/29/2008. From Signals to Packets. Lecture 6 Datalink Framing, Switching. Datalink Functions. Datalink Lectures. Character and Bit Stuffing.

1/29/2008. From Signals to Packets. Lecture 6 Datalink Framing, Switching. Datalink Functions. Datalink Lectures. Character and Bit Stuffing. /9/008 From Signals to Packets Lecture Datalink Framing, Switching Peter Steenkiste Departments of Computer Science and Electrical and Computer Engineering Carnegie Mellon University Analog Signal Digital

More information

Distributed Power System SB3000 Synchronous Rectifier &RQILJXUDWLRQDQG3URJUDPPLQJ

Distributed Power System SB3000 Synchronous Rectifier &RQILJXUDWLRQDQG3URJUDPPLQJ Distributed Power System SB3000 Synchronous Rectifier &RQILJXUDWLRQDQG3URJUDPPLQJ Instruction Manual S-3034 Throughout this manual, the following notes are used to alert you to safety considerations:!

More information

Lecture 5: Data Link Layer Basics

Lecture 5: Data Link Layer Basics Lecture 5: Data Link Layer Basics Dr. Mohammed Hawa Electrical Engineering Department University of Jordan EE426: Communication Networks Layer 2 PDU: Frame 2 1 Bit-oriented vs. Byte-oriented Layer 2 protocols

More information

Lecture 2 Error Detection & Correction. Types of Errors Detection Correction

Lecture 2 Error Detection & Correction. Types of Errors Detection Correction Lecture 2 Error Detection & Correction Types of Errors Detection Correction Basic concepts Networks must be able to transfer data from one device to another with complete accuracy. Data can be corrupted

More information

Framing and Stuffing. Advanced Computer Networks

Framing and Stuffing. Advanced Computer Networks Framing and Stuffing Advanced Computer Networks Framing & Stuffing Outline Synchronous vs Asynchronous Transmissions Asynchronous Character Transmissions Framing Identifying Synchronous Block Boundaries

More information

Digital Fundamentals

Digital Fundamentals Digital Fundamentals Tenth Edition Floyd Chapter 2 2009 Pearson Education, Upper 2008 Pearson Saddle River, Education NJ 07458. All Rights Reserved Decimal Numbers The position of each digit in a weighted

More information

CSE 123A Computer Networks

CSE 123A Computer Networks CSE 123A Computer Networks Winter 2005 Lecture 4: Data-Link I: Framing and Errors Some portions courtesy Robin Kravets and Steve Lumetta Last time How protocols are organized & why Network layer Data-link

More information

Lecture 4: CRC & Reliable Transmission. Lecture 4 Overview. Checksum review. CRC toward a better EDC. Reliable Transmission

Lecture 4: CRC & Reliable Transmission. Lecture 4 Overview. Checksum review. CRC toward a better EDC. Reliable Transmission 1 Lecture 4: CRC & Reliable Transmission CSE 123: Computer Networks Chris Kanich Quiz 1: Tuesday July 5th Lecture 4: CRC & Reliable Transmission Lecture 4 Overview CRC toward a better EDC Reliable Transmission

More information

Chapter 10. Circuits Switching and Packet Switching 10-1

Chapter 10. Circuits Switching and Packet Switching 10-1 Chapter 10 Circuits Switching and Packet Switching 10-1 Content Switched communication networks Circuit switching networks Circuit-switching concepts Packet-switching principles X.25 (mentioned but not

More information

ECE 653: Computer Networks Mid Term Exam all

ECE 653: Computer Networks Mid Term Exam all ECE 6: Computer Networks Mid Term Exam 16 November 004. Answer all questions. Always be sure to answer each question concisely but precisely! All questions have points each. 1. What are the different layers

More information

RECOMMENDATION ITU-R BT.1126 *

RECOMMENDATION ITU-R BT.1126 * Rec. ITU-R BT.1126 1 RECOMMENDATION ITU-R BT.1126 * Data transmission protocols and transmission control scheme for data broadcasting systems using a data channel in satellite television broadcasting (1994)

More information

Exercise 6-1. Time Relays EXERCISE OBJECTIVE DISCUSSION. Become familiar with time relay features and applications.

Exercise 6-1. Time Relays EXERCISE OBJECTIVE DISCUSSION. Become familiar with time relay features and applications. Exercise 6-1 Time Relays EXERCISE OBJECTIVE Become familiar with time relay features and applications. DISCUSSION The Time Relay, Model 3132, is a solid-state category time relay. This device, shown on

More information

TRANSPORT OF SDH ELEMENTS ON PDH NETWORKS: FRAME AND MULTIPLEXING STRUCTURES ITU-T

TRANSPORT OF SDH ELEMENTS ON PDH NETWORKS: FRAME AND MULTIPLEXING STRUCTURES ITU-T INTERNATIONAL TELECOMMUNICATION UNION ITU-T G.832 TELECOMMUNICATION (11/93) STANDARDIZATION SECTOR OF ITU DIGITAL NETWORKS TRANSPORT OF SDH ELEMENTS ON PDH NETWORKS: FRAME AND MULTIPLEXING STRUCTURES ITU-T

More information

CS 640 Introduction to Computer Networks. Role of data link layer. Today s lecture. Lecture16

CS 640 Introduction to Computer Networks. Role of data link layer. Today s lecture. Lecture16 Introduction to Computer Networks Lecture16 Role of data link layer Service offered by layer 1: a stream of bits Service to layer 3: sending & receiving frames To achieve this layer 2 does Framing Error

More information

PM290 POWERMETER. Communication Protocols ASCII & Modbus Reference Guide

PM290 POWERMETER. Communication Protocols ASCII & Modbus Reference Guide PM290 POWERMETER Communication Protocols ASCII & Modbus Reference Guide PM290 Communication Protocols Communication protocol is a method of transferring information between different devices (i.e., the

More information