NANO ULV CELERON 400 MHz CPU Board. with Ethernet, VGA. User s Manual Version 1.0. August 31, Copyright 2005 by IEI Electronics Inc.

Transcription

1 NANO-7240 ULV CELERON 400 MHz CPU Board with Ethernet, VGA User s Manual Version 1.0 August 31, 2005 Copyright 2005 by IEI Electronics Inc. All Rights Reserved.

2 Copyright Notice The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. Trademarks Nano-7240 is a registered trademark of ICP Electronics Inc., IBM PC is a registered trademark of International Business Machines Corporation. Intel is a registered trademark of Intel Corporation. AMIBIOS is registered trademarks of AMERICAN MEGATRENDS, INC. Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies. Support Any questions regarding the content of this manual or related issues can be ed to us directly at: support@iei.com.tw.

3 Table of Contents CHAPTER 1 INTRODUCTION SPECIFICATIONS BLOCK DIAGRAM PACKAGE CONTENTS... 4 CHAPTER 2 INSTALLATION NANO-7240 LAYOUT LCD POWER SETTING CLEAR CMOS SETUP COMPACT FLASH CARD MODE SETTING ATX / AT POWER USE SELECTION RS-232/422/485 SETUP... 8 CHAPTER 3 CONNECTION PCI IDE DISK DRIVE CONNECTOR FAN CONNECTOR SERIAL PORTS POWER CONNECTOR VGA CONNECTOR LCD CONNECTOR IRDA INFRARED INTERFACE PORT USB PORT CONNECTOR AUDIO CONNECTOR PARALLEL PORT SHARED WITH FLOPPY DIGITAL IO CONNECTOR /100M-LAN RJ45 CONNECTOR PC/104 PLUS CONNECTOR PC/104 CONNECTOR PS/2 KEYBOARD & MOUSE CONNECTOR SDR SODIMM LED SYSTEM PANEL CONNECTOR ii

4 CHAPTER 4 BIOS SETUP INTRODUCTION STARTING SETUP USING SETUP MAIN MENU Setup Items STANDARD CMOS SETUP ADVANCED BIOS FEATURES ADVANCED CHIPSET FEATURES POWER MANAGEMENT SETUP PCI / PLUG AND PLAY SETUP PERIPHERAL SETUP HARDWARE MONITOR SETUP CHANGE SUPERVISOR PASSWORD Appendix A: Watchdog Timer Appendix B: Address Mapping Appendix C: How to use Wake-Up Function Appendix D: Digital IO iii

5 Chapter 1 Introduction Thank you for choosing Nano-7240 ULV Celeron 400MHz Single Board Computer. Nano-7240 is a 165mmX114mm form factor board, which comes equipped with high performance on board Intel ULV Celeron Processor and advanced high performance multi-mode I/O, designed for the system manufacturers, integrators, or VARs that want to provide all the performance, reliability, and quality at a reasonable price. In addition, Nano-7240 provides Integrated TwisterT & graphics accelerator in a single chip (VIA VT8606). An advanced high performance south bridge chip VIA VT82C686B and super I/O W83877TF are also integrated in the Nano-7240 board. Four on-board UARTs are compatible with the NS16C550. The parallel port and IDE interface are compatible with IBM PC/AT architecture's. Nano-7240 uses a Realtek RT8101L Fast Ethernet Multifunction PCI Controller as LAN controller. The Realtek RT8101L is a fully integrated 10BASE-T/100BASE-TX LAN solution with high performance networking functions and low power features. 1

6 1.1 Specifications CPU Chipset Memory Ultra ATA33 IDE Interface Four High Speed Serial Ports Bi-directional Parallel Port Hardware Monitoring IrDA Port USB Port Watchdog Timer Realtek 8101L Fast Ethernet LAN PCI Controller PS/2 Keyboard and mouse connector Expansion Bus Digital IO Compact flash Power Consumption Operating Temperature Onboard Intel ULV Celeron 400MHz VIA TwisterT VT8606+ Super South Bridge VT82C686B Single PC100/133 SDRAM SO-DIMM, supports up to 512 MB One PCI Enhance IDE hard drives. NS16C550 compatible UARTs, with 3 RS232, 1 RS232/422/485. Compatible with IEEE1284. Supports ECP, and EPP VT82C686B to monitor power supply voltage and fan speed status. Support Serial Infrared (SIR) and Amplitude Shift Keyed IR (ASKIR) interface. Support 4 USB ports for future expansion. USB 1.1. Software-programmable. Reset generated when CPU does not periodically trigger the timer. IEEE 802.3u Auto-Negotiation supports for 10BASE-T/100BASE-TX. RJ45 connector. Connection to a keyboard or PS/2 mouse. PC/104 plus (PCI and ISA) 8bit TTL-level IO Can be used with a passive adapter (True IDE Mode) in a Type I/II Socket. +12V/1.2A (running 3DMark) 0 ~ 60 C (CPU needs Heat Sink) 2

7 1.2 Block Diagram 3

8 1.3 Package Contents In addition to this User's Manual, the Nano-7240 package includes the following items: One NANO-7240 ULV Celeron 400MHz Single Board Computer One IDE Cable ( ) One Audio Cable ( ) Three COM PORT Cable ( ) One PRINTER Cable ( ) One AT POWER Cable ( ) One PS/2 Keyboard/Mouse Cable ( ) Ten Mini Jumper P:2.54 ( ) One CD-ROM Driver (7B ) One QIG If any of these items is missing or damaged, contact the dealer from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the future. 4

9 Chapter 2 Installation TOP SIDE 2.1 Nano-7240 Layout 5

10 BOTTOM SIDE 6

11 2.2 LCD Power setting JP2: This jumper is for the setting of LCD panel voltage. JP V V JP1: This jumper is for the setting of LCD panel shift clock. JP1 1-2 Inverted 2-3 Normal 2.3 Clear CMOS Setup If you want to clear the CMOS Setup (for example forgot the password you have to clear the setup and set the password again.), you should close the JP5 for about 3 seconds, then open again. The CPU board will be set back to normal operation mode. JP3: Clear CMOS Setup JP3 1-2 Keep CMOS Setup (Normal Operation) 2-3 Clear CMOS Setup 7

12 2.4 Compact Flash Card Mode Setting JP4: Master/Slave Mode Setting JP4 OPEN SHORT SLAVE MASTER 2.5 ATX / AT Power Use Selection JP8: This jumper is for the setting of Power use selection. JP8 OPEN CLOSE ATX Power AT Power 2.6 RS-232/422/485 Setup JP13: RS-232/422/485 Setup (for COM4) JP RS RS-485 8

13 Chapter 3 Connection This chapter describes how to connect peripherals, switches and indicators to the Nano-7240 board. Label Function DIMM1 SDR SODIM Connector J1 FAN connector J2 DIGITAL IO connector J6 ATX Power connector J7 LCD LVDS connector J8 VGA connectors J9 LCD TTL connectors J12 PC/104 Plus Connector J13/J14 PC/104 Connector J15/J32 USB1/USB2 connector J16 Keyboard & Mouse connector J17 IRDA infrared interface port J18 System Panel (switches and indicators) J19 Audio connector J20 Parallel/Floppy port connector J21 USB3/USB4 connector J22 Primary IDE connectors J23 Compact Flash Card Type II connector J33 External +12V Power connector J35 LAN RJ45 connector J38, J37, J36 COM1/COM2/COM3 connectors J39 COM4 (RS232/422/485) Connector JP9 IDE LED JP10 POWER LED 9

14 3.1 PCI IDE Disk Drive Connector You can attach two IDE (Integrated Device Electronics) hard disk drives on one channel. J22: Primary IDE Connector (Pitch 2.0 mm) PIN PIN NO. NO. 1 RESET# 2 GROUND 3 DATA 7 4 DATA 8 5 DATA 6 6 DATA 9 7 DATA 5 8 DATA 10 9 DATA 4 10 DATA DATA 3 12 DATA DATA 2 14 DATA DATA 1 16 DATA DATA 0 18 DATA GROUND 20 N/C 21 IDE DRQ 22 GROUND 23 IOW# 24 GROUND 25 IOR# 26 GROUND 27 IDE CHRDY 28 GROUND 29 IDE DACK 30 GROUND DEFAULT 31 INTERRUPT 32 N/C 33 SA1 34 N/C 35 SA0 36 SA2 37 HDC CS0# 38 HDC CS1# 39 HDD ACTIVE# 40 GROUND 41 VCC 42 VCC 43 GROUND 44 N/C Nano-7240 includes a slot for a Compact Flash Storage Card in IDE Mode (Using IDE2). 10

15 J23: Compact Flash Storage Card Socket PIN PIN 1 GROUND 26 CARD DETECT1 2 D3 27 D11 3 D4 28 D12 4 D5 29 D13 5 D6 30 D14 6 D7 31 D15 7 CS1# 32 CS3# 8 N/C 33 N/C 9 GROUND 34 IOR# 10 N/C 35 IOW# 11 N/C 36 OBLIGATORY TO PULL HIGH 12 N/C 37 IRQ15 13 VCC 38 VCC 14 N/C 39 MASTER/SLAVE 15 N/C 40 N/C 16 N/C 41 RESET# 17 N/C 42 IORDY 18 A2 43 N/C 19 A1 44 N/C 20 A0 45 ACTIVE# 21 D0 46 PDIAG# 22 D1 47 D8 23 D2 48 D9 24 N/C 49 D10 25 CARD DETECT2 50 GROUND 11

16 3.2 Fan Connector Nano-7240 provides a CPU cooling fan connector. This connector can supply 12V/500mA to the cooling fan. In the connector there have a rotation pin. The rotation pin is to get the fan s rotation signal to system. So the system BIOS could recognize the fan speed. Please note only specified fan offers the rotation signal. J1: Fan Connector PIN 1 Fan Speed Detect 2 +12V 3 GND 12

17 3.3 Serial Ports The Nano-7240 offers four high-speed NS16C550 compatible UARTs with Read/Receive 16 byte FIFO. J38: COM1 (RS-232 DB9 Connector) J36,J37: COM3,COM2(RS-232 ONLY) PIN PIN NO. NO. 1 DCD3 2 DSR3 3 RX3 4 RTS3 5 TX3 6 CTS3 7 DTR3 8 RI3 9 GND 10 GND J39: COM4(RS-232/485) PIN PIN NO. NO. 1 DCD4 2 DSR4 3 RX4 4 RTS4 5 TX4 6 CTS4 7 DTR4 8 RI4 9 GND 10 GND 11 TX4+ 12 TX4-13 RX4+ 14 RX4-13

18 3.4 Power Connector The pin assignments are as following: J33: External Power Connector PIN NO V 2 GROUND J6: ATX Power connector PIN NO. 1 5VSB 2 GROUND 3 PSON 3.5 VGA Connector The pin assignments are as following. J8: CRT (15-pin Female Connector) PIN PIN NO. NO. 1 RED 9 NC 2 GREEN 10 GROUND 3 BLUE 11 NC 4 NC 12 DDCDAT 5 GROUND 13 HSYNC 6 GROUND 14 VSYNC 7 GROUND 15 DDCCLK 8 GROUND 14

19 3.6 LCD Connector The pin assignments are as following. J9: 50-pin Connector for TTL LCD PIN PIN 1 NC 2 FPD33 3 FPD34 4 FPD31 5 FPD35 6 FPD32 7 FPD30 8 FPD28 9 FPD29 10 FPD27 11 FPD25 12 FPD26 13 FPD24 14 FPD21 15 FPD23 16 FPD22 17 FPD16 18 FPD20 19 FPD17 20 FPD18 21 FPD19 22 FPD14 23 FPD13 24 FPD12 25 FPD15 26 FPD11 27 FPD7 28 FPD LCD(5V/3.3V) 30 +LCD(5V/3.3V) 31 FPD9 32 FPD8 33 FPD4 34 FPD6 35 FPD3 36 FPD5 37 FPD2 38 FPD1 39 FPDEN 40 FPD0 41 FPCLK 42 VEEON 43 ENVDD 44 FPVS 45 ENVEE 46 FPHS 47 GND 48 GND V V 15

20 J7: LCD LVDS Interface Connector PIN PIN NO. NO. 1 VCC12 2 VCCLCD 3 GND 4 GND 5 LVDSBCLK+ 6 LVDSBCLK- 7 NC 8 NC 9 LVDSB2+ 10 LVDSB2-11 LVDSB1+ 12 LVDSB1-13 LVDSB0+ 14 LVDSB0-15 LCDBKTCT 16 LCDEN 17 LVDSCLK+ 18 LVDSCLK- 19 NC 20 NC 21 LVDS2+ 22 LVDS2-23 LVDS1+ 24 LVDS1-25 LVDS0+ 26 LVDS0-27 DDCLK 28 DDCDATA 29 ENVEE 30 NC 3.7 IrDA Infrared Interface Port Nano-7240 built-in an IrDA port which support Serial Infrared (SIR) or Amplitude Shift Keyed IR (ASKIR) interface. When use the IrDA port have to set SIR or ASKIR mode in the BIOS s Peripheral Setup s COM2. Then the normal RS-232 COM2 will be disabled. J17: IrDA connector PIN PIN NO. NO. 1 VCC5 2 NC 3 IRRX 4 GND 5 IRTX 6 NC 16

21 3.8 USB Port Connector It complies with USB 1.1. USB3,4 are provided in 2x4 pin header and USB STD A Connector. J15,J32: USB Connector(USB1,2) PIN PIN NO. NO. 1 USBVCC 5 USBVCC 2 USB0-6 USB1-3 USB0+ 7 USB1+ 4 GND 8 GND J21: USB 3,4(2*4 Pin header) PIN PIN NO. NO. 1 USBVCC1 2 USBGND2 3 D2-4 D3+ 5 D2+ 6 D3-7 USBGND1 8 USBVCC2 3.9 Audio Connector The pin assignments are as following. J19: Audio Connector PIN PIN NO. NO. 1 Speaker out R 2 GND 3 Speaker out L 4 GND 5 Line out R 6 Line out L 7 GND 8 GND 9 Line in R 10 Line in L 11 GND 12 GND 13 NC 14 NC 15 MIC in 16 GND 17

22 3.10 Parallel Port Shared With Floppy J20: Parallel Port Shared With FDD PIN PIN NO. NO. 1 STROBE# 2 DATA 0 3 DATA 1 4 DATA 2 5 DATA 3 6 DATA 4 7 DATA 5 8 DATA 6 9 DATA 7 10 ACKNOWLEDGE 11 BUSY 12 PAPER EMPTY 13 PRINTER SELECT 14 AUTO FORM FEED # 15 ERROR# 16 INITIALIZE 17 PRINTER SELECT LN# 18 GROUND 19 GROUND 20 GROUND 21 GROUND 22 GROUND 23 GROUND 24 N/C 25 GROUND DIGITAL IO Connector Nano-7240 provides built-in 8 DIGITAL IO pins that can be choose at the BIOS setup to be as Input or Output pins. J2: 8 BIT DIGITAL IO Connector PIN PIN NO. NO. 1 GND 2 VCC5 3 DIGITAL IO0 4 DIGITAL IO1 5 DIGITAL IO2 6 DIGITAL IO3 7 DIGITAL IO4 8 DIGITAL IO5 9 DIGITAL IO6 10 DIGITAL IO7 18

23 /100M-LAN RJ45 Connector J35: 10/100M-LAN RJ45 Connector PIN PIN NO. NO. 1 TX+ 2 TX- 3 RX+ 4 RX- 5 NC 6 NC 7 NC 8 NC 9 NC 10 NC 3.13 PC/104 Plus Connector Nano-7240 has a PC/104-Plus connector for both PC/104-Plus and PC/104 modules. The PCI bus of PC/104-Plus is a 32-bit bus running at 33MHz, and it is PCI2.1 compliant. J12: PC/104-Plus Connector (120-pin PCI bus) PIN PIN A1 NC B1 NC A2 NC B2 AD2 A3 AD5 B3 GND A4 CBE0- B4 AD7 A5 GND B5 AD9 A6 AD11 B6 NC A7 AD14 B7 AD13 A8 NC B8 CBE1- A9 SERR- B9 GND A10 GND B10 PERR- A11 STOP- B11 NC A12 NC B12 TRDY- A13 FRAME- B13 GND A14 GND B14 AD16 A15 AD18 B15 NC A16 AD21 B16 AD20 A17 NC B17 AD23 A18 IDSEL0 B18 GND 19

24 A19 AD24 B19 CBE3- A20 GND B20 AD26 A21 AD29 B21 +5V A22 +5V B22 AD30 A23 REQ0- B23 GND A24 GND B24 REQ2- A25 GNT1- B25 NC A26 +5V B26 PCICLK0 A27 PCICLK2 B27 +5V A28 GND B28 INTD- A29 +12V B29 INTA- A30 NC B30 REQ3- C1 +5V D1 AD0 C2 AD1 D2 +5V C3 AD4 D3 AD3 C4 GND D4 AD6 C5 AD8 D5 GND C6 AD10 D6 NC C7 GND D7 AD12 C8 AD15 D8 NC C9 SBO- D9 PAR C10 NC D10 SDONE C11 LOCK- D11 GND C12 GND D12 DEVSEL- C13 IRDY- D13 NC C14 NC D14 CBE2- C15 AD17 D15 GND C16 GND D16 AD19 C17 AD22 D17 NC C18 IDSEL1- D18 IDSEL2 C19 NC D19 IDSEL3 C20 AD25 D20 GND C21 AD28 D21 AD27 C22 GND D22 AD31 C23 REQ1- D23 NC C24 +5V D24 GNT0- C25 GNT2- D25 GND C26 GND D26 PCICLK1 C27 PCICLK3 D27 GND C28 +5V D28 PCIRST- 20

25 C29 INTB- D29 INTC- C30 GNT3- D30 NC 21

26 3.14 PC/104 Connector J13: PC/104 Connector (64-pin ISA bus) PIN PIN A1 IOCHK- B1 GND A2 SD7 B2 RSTDRV A3 SD6 B3 +5V A4 SD5 B4 IRQ9 A5 SD4 B5 NC A6 SD3 B6 DREQ2 A7 SD2 B7 NC A8 SD1 B8 ZWS- A9 SD0 B9 +12V A10 IOCHRDY B10 GND A11 AEN B11 SMEMW- A12 SA19 B12 SMEMR- A13 SA18 B13 IOW- A14 SA17 B14 IOR- A15 SA16 B15 DACK3- A16 SA15 B16 DREQ3 A17 SA14 B17 DACK1- A18 SA13 B18 DREQ1 A19 SA12 B19 REFRESH- A20 SA11 B20 ISACLK A21 SA10 B21 IRQ7 A22 SA9 B22 IRQ6 A23 SA8 B23 IRQ5 A24 SA7 B24 IRQ4 A25 SA6 B25 IRQ3 A26 SA5 B26 DACK2- A27 SA4 B27 TC A28 SA3 B28 BALE A29 SA2 B29 +5V A30 SA1 B30 ISA_OSC A31 SA0 B31 GND A32 GND B32 GND 22

27 J14: PC/104 Connector (40-pin ISA bus) PIN PIN C1 GND D1 GND C2 SBHE- D2 MCS16- C3 SA23 D3 IOCS16- C4 SA22 D4 IRQ10 C5 SA21 D5 IRQ11 C6 SA20 D6 IRQ12 C7 SA19 D7 IRQ15 C8 SA18 D8 IRQ14 C9 SA17 D9 DACK0- C10 MEMR- D10 DREQ0 C11 MEMW- D11 DACK5- C12 SD8 D12 DRREQ5 C13 SD9 D13 DACK6- C14 SD10 D14 DREQ6 C15 SD11 D15 DACK7- C16 SD12 D16 DREQ7 C17 SD13 D17 +5V C18 SD14 D18 MASTER- C19 SD15 D19 GND C20 NC D20 GND 3.15 PS/2 Keyboard & Mouse Connector J16: PS/2 Keyboard & Mouse Connector PIN NO. 1 KEYBOARD DATA 2 MOUSE DATA 3 GND 4 VCC5 5 KEYBOARD CLK 6 MOUSE CLK 23

28 3.16 SDR SODIMM DIMM1: SDR SODIMM SOCKET 3.17 LED JP9:IDE LED PIN NO. 1 IDE LED 2 +5V JP10:POWER LED PIN NO. 1 GND 2 +5V 3.18 System Panel Connector J18: System Panel Connector PIN PIN NO. NO. 1 PS_ON 2 GND 3 RESET 4 VCC5 5 SPEAKER 24

29 Chapter 4 BIOS Setup 4.1 Introduction This chapter discusses the Setup program written in the BIOS. It will give you a step-by-step guidance to configure your system. The user-defined configuration is then stored in battery-backed CMOS RAM, which retains the customized information while the power is off. 4.2 Starting Setup The BIOS is immediately active when you turn on the computer. While the BIOS are in control, the Setup program can be activated in one of two ways: 1. By pressing <Del> immediately after switching the system on, or 2. By pressing the <Del> key when the following message appears at the bottom of the screen during POST (Power On Self-Test): DEL: Setup F11: Boot Menu F12: Network boot If the message disappears before you respond and you still wish to enter Setup, restart the system to try again by turning it OFF then ON or pressing the "RESET" button on the system case. You may also restart by simultaneously pressing <Ctrl>, <Alt>, and <Delete> keys. If you do not press the keys at the correct time and the system does not boot, an error message will be displayed and you will again be asked to... Press F1 to Run SETUP Press F2 to load default values and continue 25

30 4.3 Using Setup In general, you can use the arrow keys to highlight items, press <Enter> to select, use the PageUp and PageDown keys to change entries and press <Esc> to quit. The following table provides more details about how to navigate in the Setup program using the keyboard. Key Up Arrow Down Arrow Move Enter PgUp key PgDn key Esc key F2/F3 key F10 key Function Move to the previous item Move to the next item Move to the item you desired Increase the numeric value or make changes Decrease the numeric value or make changes Main Menu -- Quit and save no changes into CMOS Status Page Setup Menu and Option Page Setup Menu -- Exit current page and return to Main Menu BIOS Display Color Save all the CMOS changes and exit 26

31 4.4 Main Menu Once you enter the AMIBIOS CMOS Setup Utility, the Main Menu will appear on the screen. The Main Menu allows you to select from several setup functions and two exit choices. Use the arrow keys to go through the items and press <Enter> to accept and enter the sub-menu. AMIBIOS HIFLEX SETUP UTILITY VERSION 1.54 (C)2001 American Megatrends, Inc. All Rights Reserved Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Power Management Setup PCI / Plug and Play Setup Peripheral Setup Hardware Monitor Setup Auto-Detect Hard Disks Change User Password Change Supervisor Password Auto Configuration with Optimal Settings Auto Configuration with Fail Safe Settings Save Settings and Exit Exit Without Saving Standard CMOS setup for changing time, date, hard disk type, etc. ESC:Exit :Sel F2/F3:Color F10:Save & Exit Figure 1:The Main Menu Note that a brief description of each highlighted selection appears at the bottom of the screen Setup Items The main menu includes the following main setup categories. Recall that some systems may not include all entries. Standard CMOS Setup: Standard CMOS Setup to change time, date, hard disk type, etc. Advanced CMOS Setup: 27

32 Advanced CMOS Setup to configure system options. Advanced Chipset Setup: Advanced Chipset Setup to configure chipset features. Power Management Setup: Power Management Setup to configure power management features. PCI / Plug and Play Setup: Configures PCI / Plug and Play features. Peripheral Setup: Configures peripheral features. Hardware Monitor Setup: Configures hardware monitor features. Auto-Detect Hard Disks: Selecting these options allow the user to configure the drive named in the option. Select Auto-Detect Hard Disks to allow AMIBIOS to automatically configure the drive. A list of drive parameters the appears on the screen. Change User Password: Change the user password. Change Supervisor Password: Change the supervisor password. Auto Configuration with Optimal Settings: Load configuration settings that ensure the highest performance. Auto Configuration with Fail Safe Settings: Load fails-safe configuration settings. Save Settings and Exit: Write the current settings to CMOS and exit. Exit Without Saving: Exit without saving the current settings. 28

33 4.5 Standard CMOS Setup AMIBIOS SETUP STANDARD CMOS SETUP (C)2001 American Megatrends, Inc. All Rights Reserved Date (mm/dd/yyyy): Tue Nov 10, KB Time (hh/mm/ss) : 20:27:10 Memory: 495 MB Base Memory: Extd Floppy Drive A: Not Installed Floppy Drive B: Not Installed LBA Blk PIO 32Bit Type Size Cyln Head WPcom Sec Mode Mode Mode Mode Pri Master: Auto On Pri Slave : Auto On Sec Master: Auto On Sec Slave : Auto On Boot Sector Virus Protection Disabled Month: Jan Dec ESC:Exit :Sel Day: PgUp/PgDn:Modify Year: F2/F3:Color Date (mm/dd/yyyy) Set the system date. Time (hh/mm/ss) Set the system time. Figure 2:Standard CMOS Setup Floppy A, B Move the cursor to these fields and select the floppy type. 29

34 Primary/Secondary Master/Slave LBA Mode LBA (Logical Block Addressing) is a new IDE HDD access method to developed to overcome the 528-megabyte capacity bottleneck. If your IDE hard disk capacity is greater than 528MB, AMIBIOS can enable this LBA mode feature. The option is only for Primary Master IDE LBA mode. Primary/Secondary Master/Slave Block Mode If your hard disk drive supports IDE block transfer mode, enable this option for a faster IDE hard disk drive transfer rate. The option is only for Primary Master Block mode. Primary/Secondary Master/Slave PIO Mode This option enables Primary Master IDE PIO mode on the IDE, which can set proper cycle timings. The cycle timing between the IDE PIO mode value and IDE cycle timing is shown below: Mode 0 -> Timing (600ns) Mode 1 -> Timing (383ns) Mode 2 -> Timing (240ns) Mode 3 -> Timing (180ns) Mode 4 -> Timing (120ns) Mode 5 -> Timing (60ns) Primary/Secondary Master/Slave 32Bit Mode This option enables Primary Master IDE 32-bit data transfers on the IDE data port. If disabled, 16-bit data transfer is used by the BIOS.32-bit data transfers can only be enabled if IDE prefetch mode is also enabled. Boot Sector Virus Protection When this option is enabled, AMIBIOS issues a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive. The settings are Disabled, Enabled. Base/Extd Memory Displays the amount of conventional/extended memory detected during boot up. 30

35 4.6 Advanced BIOS Features AMIBIOS SETUP ADVANCED CMOS SETUP (C)2001 American Megatrends, Inc. All Rights Reserved Quick Boot 1st Boot Device 2nt Boot Device 3rd Boot Device Try Other Boot Devices Boot From Lan S.M.A.R.T. for Hard Disks BootUP Num-Lock Floppy Drive Seek PS/2 Mouse Support System Keyboard Primary Display Password Check Boot To OS/2 L1 Cache L2 Cache System BIOS Cacheable C000 32K Shadow C800 16K Shadow CC00 16K Shadow D000 16K Shadow D400 16K Shadow D800 16K Shadow DC00 16K Shadow Enabled Floopy IDE-0 CD/DVD-0 Yes Disabled Disabled On Disabled Enabled Absent VGA/EGA Setup No Enabled Enabled Enabled Cached Disabled Disabled Disabled Disabled Disabled Disabled Available Options: Disabled > Enabled ESC:Exit :Sel PgUp/PgDn:Modify F2/F3:Color Figure 3:Advance CMOS Setup Quick Boot When Quick Boot is selected, DRAM testing function will be disabled. 31

36 1st Boot Device This option sets the type of device for the first boot drives that the AMIBIOS attempts to boot from after AMIBIOS POST completes. The settings are Disabled, IDE-0, IDE-1, IDE-2, IDE-3, Floppy, ARMD-FDD, ARMD-HDD, CDROM, and SCSI. 2nd Boot Device This option sets the type of device for the second boot drives that the AMIBIOS attempts to boot from after AMIBIOS POST completes. The settings are Disabled, IDE-0, IDE-1, IDE-2, IDE-3, Floppy, ARMD-FDD, ARMD-HDD, and CDROM. 3rd Boot Device This option sets the type of device for the third boot drives that the AMIBIOS attempts to boot from after AMIBIOS POST completes. The settings are Disabled, IDE-0, IDE-1, IDE-2, IDE-3, Floppy, ARMD-FDD, ARMD-HDD, and CDROM. Try Other Boot Devices Set this option to Yes to instruct AMIBIOS to attempt to boot from any other drive in the system if it cannot find a boot drive among the drives specified in the 1st Boot Device, 2nd Boot Device, 3rd Boot Device, 4th Boot Device options. The settings are Yes or No. S.M.A.R.T. for Hard Disks Self-Monitoring, Analysis and Reporting Technology. This option can help the BIOS to warn the user of a possible device failure and give the user a chance to back up the device before the failure actually happens. The settings are Auto, Disabled, Enabled. BootUp Num-Lock When this option is selected, Num Lock is turned off when the system is powered on so the user can use the arrow keys on both the numeric keypad and the keyboard. Floppy Drive Seek Set this option to Enabled to specify that floppy drive A: will perform a Seek operation at system boot. The settings are Enabled or Disabled. 32

37 PS/2 Mouse Support When this option is enabled, BIOS supports a PS/2- type mouse. System Keyboard This option does not specify if a keyboard is attached to the computer. Rather, it specifies if error messages are displayed if a keyboard is not attached. This option permits you to configure workstation with no keyboard. The settings are Absent, Present. Primary Display Select this option to configure the type of monitor attached to the computer. The settings are Monochrome, Color 40x25,Color 80x25,VGA/PGA/EGA, or Not Install. Password Check This item allows you Setup/Always Password Check. Boot To OS/2 Set this option to Enabled if running OS/2 operating system and using more than 64MB of system memory on the motherboard. The settings are Disabled or Enabled. L1 Cache The option Disabled/Enabled the internal cache memory in the processor. L2 Cache The option Disabled/Enabled the secondary cache memory. System BIOS Cacheable When this option is set to enabled, the System ROM area from F0000-FFFFF is copied (shadowed) to the RAM for faster execution. C000,32k Shadow When this option is set to enabled, the Video ROM area from C0000-C7FFF is copied (shadowed) to the RAM for faster execution. Disabled: The contents of the video ROM are not copied to the RAM. Cached: The contents of the video ROM area from C0000h C7FFFh are copied from the ROM to the RAM and 33

38 can be written to or read from the cache memory. Enabled: The contents of the video ROM area from C0000h C7FFFh are copied (shadowed) from the ROM to the RAM for faster execution. C800,16k Shadow These options enable shadowing of the contents of the ROM area named in the option title. The settings are Enable Disable, Cached. The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards. CC00,16k Shadow These options enable shadowing of the contents of the ROM area named in the option title. The settings are Enable Disable, Cached. The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards. D000,16k Shadow These options enable shadowing of the contents of the ROM area named in the option title. The settings are Enable Disable, Cached. The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards. D400,16k Shadow These options enable shadowing of the contents of the ROM area named in the option title. The settings are Enable Disable, Cached. The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards. D800,16k Shadow These options enable shadowing of the contents of the ROM area named in the option title. The settings are Enable Disable, Cached. The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards. DC00,16k Shadow These options enable shadowing of the contents of the ROM area named in the option title. The settings are Enable Disable, Cached. The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards. 34

39 4.7 Advanced Chipset Features AMIBIOS SETUP ADVANCED CHIPSET SETUP (C)2001 American Megatrends, Inc. All Rights Reserved ********* DRAM Timing ********* Configure SDRAM Timing by SPD Disabled DRAM Frequency 133MHz SDRAM CAS# Latency 3 Available Options: Disabled > Enabled Memory Hole AGP Aperture Size USB Controller USB Device Legacy Support Disabled 64MB All USB Port Disabled Figure 4: Advanced Chipset Setup ESC:Exit :Sel PgUp/PgDn:Modify F2/F3:Color Configure SDRAM Timing by SPD This sets the optimal timings for items "SDRAM Refresh", "SDRAM Cycle time", "CAS# Latency", "RAS to CAS delay" and "SDRAM RAS# Precharge", depending on the memory modules that you are using. SDRAM Frequency This field displays the capability of the memory modules that your system memory frequency. 35

40 SDRAM CAS# Latency This controls the latency between the SDRAM read command and the time that the data actually becomes available. AGP Aperture Size This feature allows you to select the size of mapped memory for AGP graphic data. USB Controller Select Enabled if your system contains a Universal Serial Bus (USB) controller and you have USB peripherals. USB Device Legacy Support This motherboard support Universal Serial Bus (USB) devices. If detected, USB controller legacy mode will be enabled. If not detected, USB controller legacy mode will be disabled. The Choice: Enabled, Disabled 36

41 4.8 Power Management Setup AMIBIOS SETUP POWER MANAGEMENT SETUP (C)2001 American Megatrends, Inc. All Rights Reserved ACPI Aware O/S (S1) Power Management/APM Video Power Down Mode Hard Disk Power Down Mode Standby Time Out (Minute) Suspend Time Out (Minute) Throttle Slow Clock Ratio Display Activity IRQ3 IRQ4 IRQ5 IRQ7 IRQ9 IRQ10 IRQ11 IRQ13 IRQ14 IRQ15 Power Button Function Restore on AC/Power Loss Resume On Ring/LAN Power Type Select Yes Enabled Disabled Disabled Disabled Disabled 50%-56.25% Ignore Monitor Monitor Ignore Monitor Ignore Ignore Ignore Ignore Monitor Ignore On/Off Last State Disabled ATX Available Options: No > Yes ESC:Exit :Sel PgUp/PgDn:Modify F2/F3:Color Figure 5: Power Management Setup ACPI Aware O/S This feature is switch of ACPI function (S1). 37

42 Power Management/APM Set this option to Enabled to run APM (Advanced Power Management). Video Power Down Mode Set this option to Enabled to allow the Video adapter and Monitor to be powered down by BIOS. Hard Disk Power Down Mode Set this option to Enabled to allow the IDE drive to be powered down by BIOS. Standby Time Out (Minute) This option specifies the length of a period of system inactivity while in Full power on state. When this length of time expires, the computer enters Standby power state. Suspend Time Out (Minute) This option specifies the length of a period of system inactivity while in Standby state. When this length of time expires, the computer enters Suspend power state. IRQ3, 4, 5, 7, 9, 10, 11, 13, 14, 15 As Individual IRQ Wake Up Events. Power Button Function This option specifies how the power button mounted externally on the computer chassis is used. There are two options: On/Off or Suspend. If Suspend option is selected, the system will respond to power button function if Power Button is pressed for 4 seconds. Resume On Ring/LAN Ring/LAN Resume From Soft Off Power Type Select To select Power Type for AT or ATX. 38

43 4.9 PCI / PLUG AND PLAY SETUP AMIBIOS SETUP PCI / PLUG AND PLAY SETUP (C)2001 American Megatrends, Inc. All Rights Reserved Plug and Play Aware O/S Clear NVRAM Onboard LAN Controller OnChip VGA Frame Buffer Size PCI Latency Timer (PCI Clocks) Primary Graphics Adapter Boot Screen Select LCD Panel Type Allocate IRQ to PCI VGA PCI Slot1 IRQ Priority PCI Slot2 IRQ Priority PCI Slot3 IRQ Priority PCI Slot4 IRQ Priority DMA Channel 0 DMA Channel 1 DMA Channel 3 DMA Channel 5 DMA Channel 6 DMA Channel 7 IRQ3 IRQ4 IRQ5 IRQ7 IRQ9 IRQ10 IRQ11 IRQ14 IRQ15 No No Enabled 32MB 32 PCI CRT 1 800x600 TFT Yes Auto Auto Auto Auto PnP PnP PnP PnP PnP PnP PCI/PnP PCI/PnP PCI/PnP PCI/PnP PCI/PnP PCI/PnP PCI/PnP PCI/PnP PCI/PnP Available Options: No > Yes ESC:Exit :Sel PgUp/PgDn:Mo dify F2/F3:Color Figure 6: PCI / Plug and Play Setup 39

44 Plug and Play Aware O/S If enable, BIOS will configure only PnP ISA boot devices (i.e. all PnP ISA cards which has boot flag set). And PnP aware OS will configure all other devices. If disable, BIOS will configure all devices. Clear NVRAM When this option is set to Yes, system can clear NVRAM automatically. The settings are Yes or No. OnBoard LAN Controller To disable or enable the on board Ethernet device. OnChip VGA Frame Buffer Size To select frame buffer size (2~32MB) for VGA. PCI Latency Timer (PCI Clocks) This option specifies the latency timings (in PCI clocks) for PCI devices installed in the PCI expansion slots. The settings are 32, 64, 96, 128, 160, 192, 224, or 248. Boot Screen Select To select Boot Screen from CRT or LCD. Select CRT+LCD is Boot from CRT and LCD. LCD Panel Type To select LCD Panel type. Allocate IRQ to PCI VGA Set this option to Yes to allocate an IRQ to the VGA device on the PCI bus. The settings are Yes or No. PCI Slot1 / Slot2 / Slot3 / Slot4 IRQ Priority To specify the IRQ priority for PCI device installed in the PCI expansion slot. The settings are Auto, (IRQ) 3, 4, 5, 7, 9, 10, and 11, in priority orders. DMA Channel 0, 1, 3, 5, 6, 7 To specify the bus type used by each DMA channel. The settings are PnP or ISA/EISA. 40

45 IRQ 3, 4, 5, 7, 9, 10, 11,14,15 To specify the bus that the specified IRQ line is used on. This option enables you to reserve IRQs for legacy ISA adapter cards. It determines if AMIBIOS should remove an IRQ from the pool of available IRQs passed to devices that are configurable by the system BIOS. The available IRQ pool is determined by reading the ESCD NVRAM. If more IRQs must be removed from the pool, the end user can use the option to reserve the IRQ by assigning an ISA/EISA setting to it. Onboard I/O is configured by AMIBIOS. All IRQs used by onboard I/O are configured as PCI/PnP. 41

46 4.10 Peripheral Setup AMIBIOS SETUP PERIPHERAL SETUP (C)2001 American Megatrends, Inc. All Rights Reserved LPC Function Select FDC OnBoard FDC Enabled OnBoard Serial Port1 3F8/COM1 OnBoard Serial Port2 2F8/COM2 Serial Port2 Mode Normal Duplex Mode N/A OnBoard Parallel Port 378 Parallel Port Mode Normal EPP Version N/A Parallel Port DMA Channel N/A Parallel Port IRQ 7 OnBoard Serial Port3 3E8/COM3 Serial Port3 IRQ 11 OnBoard Serial Port4 2E8/COM4 Serial Port4 IRQ 10 OnBoard IDE Both OnBoard Digital I/O Disabled OnBoard Digital Mode Output OnBoard AC 97 Audio Enabled Available Options: LPT(SPP) > FDC ESC:Exit :Sel PgUp/PgDn:Modify F2/F3:Color Figure 7: Peripheral Setup OnBoard Serial Port 1/2/3/4 This option specifies the base I/O port address of serial port. The settings are Auto (AMIBIOS automatically determines the correct base I/O port address), Disabled, 3F8h, 2F8h, 2E8h, or 3E8h. OnBoard Parallel Port This option specifies the base I/O port address of parallel port on the motherboard. The settings are Disabled, 378h, 278h, or 3BCh. 42

47 Parallel Port Mode This option specifies the parallel port mode. The settings are Normal, Bi-Dir, EPP, and ECP. Normal: The normal parallel port mode is used. Bi-Dir: Use this setting to support bi-directional transfers on the parallel port. EPP: The parallel port can be used with devices that adhere to the Enhanced. Parallel Port (EPP) specification. EPP uses the existing parallel port signals to provide asymmetric bi-directional data transfer driven by the host device. ECP: The parallel port can be used with devices that adhere to the Extended. Capabilities Port (ECP) specification. ECP uses the DMA protocol to achieve data transfer rates up to 2.5 Megabits per second. ECP provides symmetric bi-directional communication. EPP Version EPP data or address read cycle 1.9 or 1.7 Parallel Port IRQ This option specifies the IRQ used by the parallel port. The settings are Auto, (IRQ) 5, (IRQ) 7. Parallel Port DMA Channel This option is only available if the setting for the Parallel Port Mode option is ECP. This option sets the DMA channel used by the parallel port. The settings are DMA Channel 0, 1, or 3. OnBoard IDE This option specifies the IDE channel used by the onboard IDE controller The settings are Disabled, Primary, and Secondary. OnBoard Digital I/O This option specifies the address available for onboard Digital I/O. The settings are Disabled, 200h~280h. OnBoard Digital Mode This option set the Digital I/O into input or output mode. The settings are Input and Output. 43

48 On Board AC 97 Audio Enable or Disable AC 97 Audio Function Hardware Monitor Setup AMIBIOS SETUP HARDWARE MONITOR SETUP (C)2001 American Megatrends, Inc. All Rights Reserved Chassis Intrusion Disabled Available Smart Fan Function Disabled Options: -= System Hardware Monitor =- TSENS1 Temperature TSENS2 Temperature CPU Fan Speed V V V 41ºC/105ºF 37ºC/98ºF 0 RPM V V V > Disabled Enabled ESC:Exit :Sel PgUp/PgDn:M odify F2/F3:Color Figure 8: Hardware Monitor Setup This setup helps users monitor the on board system voltage and fan speed. The function is implemented by on board VT82C686B South Bridge chip. The voltage monitoring will cover +3.3V, +5V, +2.5V. And there is one fan connector for CPU fan. 44

49 4.12 Change Supervisor Password You can set either supervisor or user password, or both of them. The differences between are: Supervisor password: You can enter and change the options of the setup menus with supervisor password. User password: You can only enter but do not have the right to change the options of the setup menus. When you select this function, the following message will appear in the center of the screen to assist you in creating a password. ENTER PASSWORD: Type the password of up to eight characters in length, and press <Enter>. Previous password will be cleared from CMOS memory. Confirm the new password and press <Enter>. To quit, press <Esc>. To disable a password, press <Enter> when you are prompted to enter the password. A message will ask you to confirm disabling the password. Once the password is disabled, the system will boot and you can enter Setup freely. PASSWORD DISABLED: When a password is enabled, you will be prompted to enter it every time you try to enter Setup. This prevents an unauthorized person from changing any part of your system configuration. You can also require the BIOS to request a password every time your system is rebooted. This would prevent unauthorized use of your computer. You determine when the password is required within the BIOS Features Setup Menu and its Security option (see Section 3). If the Security option is set to Always, a password will be required both at boot and at entry to Setup. If set to Setup, prompting will only occur when trying to enter Setup. 45

50 Appendix A: Watchdog Timer The Watchdog Timer is provided to ensure that standalone systems can always recover from catastrophic conditions that cause the CPU to crash. This condition may have occurred by external EMI or a software bug. When the CPU stops working, hardware on the board will perform a hardware reset (cold boot) to bring the system back to a known state. Three I/O ports control the operation of Watchdog Timer: 443 (hex) Write Set Watchdog Time period 443 (hex) Read Enable Watchdog Timer 043 (hex) Read Disable Watchdog Timer Prior to enable watchdog timer, users have to set the time-out period. The resolution of the timer is 1 second and the range of the timer is from 1 second to 255 seconds. You need to send the time-out value to the I/O port 443H, and then enable it by reading data from the same I/O port 443H. This will activate the timer that will eventually time out and reset the CPU board. To ensure that this reset condition won t occur, watchdog timer must be periodically refreshed by reading the same I/O port 443H. This must be done within the time-out period that is set by the software, please refer to the example program. Finally, we have to disable the Watchdog Timer by reading the I/O port 043H. Otherwise the system could reset unconditionally. A tolerance of at least 5% must be maintained to avoid unknown routines in the operating system (DOS). For example, if the time-out period has been set to 10 seconds, the I/O port 443H must be read within 7 seconds. Example assembly program: TIMER_PORT = 443H TIMER_START = 443H TIMER_STOP = 043H ;;INITIAL TIMER COUNTER MOV DX, TIMER_PORT MOV AL, 8 ;;8 seconds OUT DX, AL MOV DX, TIMER_START IN AL, DX. ;;START COUNTER 46

51 W_LOOP: MOV DX, TIMER_STOP IN AL, DX MOV DX, TIMER_START IN AL, DX ;;RESTART COUNTER ;;ADD YOUR APPLICATION HERE CMP EXIT_AP, 0 JNE W_LOOP MOV DX, TIMER_STOP IN AL, DX ;;EXIT AP 47

52 Appendix B: Address Mapping I/O Address Map I/O Address F DMA Controller # Interrupt Controller # 1, Master F System Timer F Standard 101/102 keyboard Controller F Real time Clock, NMI Controller 080-0BF DMA Page Register 0A0-0BF Interrupt Controller # 2 0C0-0DF DMA Controller # 2 0F0-0F0 Clear Math Coprocessor Busy 0F1-0F1 Reset Math Coprocessor 0F8-OFF Math Coprocessor 170-1F7 BUS Master PCI IDE Controller F Parallel Printer Port 2 2E8-2EF Serial Port 4 2F8-2FF Serial Port BUS Master PCI IDE Controller F Parallel Printer Port 1 3B0-3DF AGP Graphic Adapter 3E8-3EF Serial Port 3 3F0-3F7 Floppy Disk Controller 3F8-3FF Serial Port (843) Watchdog timer enable F PCI BUS 043 Watchdog timer disable 1 st MB Memory Address Map Memory address FFFF SYSTEM MEMORY A0000-BFFFF VGA BUFFER C0000-CFFFF VGA BIOS E0000-FFFFF SYSTEM BIOS EXTEND MEMORY 48

53 IRQ Mapping Chart IRQ0 System Timer IRQ8 RTC CMOS clock IRQ1 Keyboard IRQ9 ACPI STEERING IRQ2 IRQ Controller IRQ10 COM4 IRQ3 COM2 IRQ11 COM3 IRQ4 COM1 IRQ12 PS/2 mouse IRQ5 USB IRQ13 FPU IRQ6 FDC IRQ14 Primary IDE IRQ7 Printer IRQ15 Secondary IDE DMA Channel Assignment Channel Function 0 Available 1 Available 2 Floppy disk 3 Available 4 Cascade for DMA controller 1 5 Available 6 Available 7 Available 49

54 Appendix C: How to use Wake-Up Function The Nano-7240 provides two kind of Wake up Function. This page describes how to use Modem Wake-Up and LAN Wake-Up function. Wake-Up function is working while you use ATX power supply, Wake Up On Modem(Ring): You must set the option Resume on Ring/LAN of CMOS SETUP to be enabled. The ATX power supply will be switched on when there is a ring signal detected on pin RI of serial port. Wake-Up On LAN: When your computer is in power-down status, you can see LAN Link/Active LED is flashing. This status indicates that the LAN chip has entered standby mode and waits for Wake-Up signal. You can use other computers to wake up your computer by sending ID to it. ID: ID is the address of your system LAN. Every LAN chip has a factory-set ID, which you can find it from network information in WINDOWS. ID s format is xxxxxxxxxxxx Example ID:

55 Appendix D: Digital IO One of Digital circuit s characteristics is its fast response to high or low signal. This kind of response is highly needed for harsh and critical industrial operating environment. Therefore, Nano-7240 is designed with 8-bit DIGITAL IO There are two kinds of signals (Input and Output) used by the DIGITAL IO function. These signals are used to control external devices that need On/Off circuit or TTL devices. User must set the onboard DIGITAL IO of Peripheral Setup on BIOS setup to one of the address available to use the DIGITAL IO function, and select the type of the Digital I/O as Inputs/Outputs. When one of the signals has been selected, users can read or write data to the system through the Digital I/O function. Example of a debug program: Onboard Digital I/O set to 280h Onboard Digital Mode set to Output. -o 280 2C ;;GPO(bit0~7) = b 51