Chapter 8. Operating System Support. Yonsei University

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1 Chapter 8 Operating System Support

2 Contents Operating System Overview Scheduling Memory Management Pentium II and PowerPC Memory Management 8-2

3 OS Objectives & Functions OS is a program that Manages the computer s resources, provides services for programmers Schedules the execution of other programs Objective Convenience Makes a computer more convenient Efficiency Allows the computer system resources to be used in a efficiency manner Operation System Overview 8-3

4 OS : User/Computer Interface Operation System Overview To ease a complex task, a set of systems program is provided Some of programs are referred to as utilities These implement use functions that assist in program creation, the management of files, the control of I/O devices Programmers make use of these facilities in developing an application OS provides a programmer with a convenient interface for using the system 8-4

5 Layers of a Computer System Operation System Overview 8-5

6 OS Services Operation System Overview Program Creation Assists the programmer in creating programs Program execution Handles program execution for user Access to I/O devices Controlled access to files System access Access to the system as a whole and to specific system resource Error detection and response Accounting 8-6

7 OS : Resource Manager Operation System Overview OS functions in the same way ordinary computer software; it is a program executed by the processor OS frequently relinquishes control and must depend on the processor to allow it to regain control 8-7

8 OS : Resource Manager Operation System Overview The OS is nothing more than a computer program The OS directs the processor in the use of the other system resources and in timing of its execution of other programs Kernel, nucleus Contains the most frequently used functions in operating system and at a given time, other portions of the operating system currently in use The OS decides when an I/O device can be used by a program in execution, and controls access to and use of files 8-8

9 OS : Resource Manager Operation System Overview 8-9

10 Types of Operating Systems Operation System Overview Interactive system User/programmer interacts directly with the computer, usually through a keyboard/display terminal, the request the execution of a job or to perform a transaction Batch system(opposite of interactive) User s program is batched together with programs from other users and submitted by a computer operator Multiprogramming Uniprogramming only one program at a time 8-10

11 Early Systems Operation System Overview Early computer(late 1940 to the mid-1950) No operating system The processor were run from a console The program in processor code were loaded via input device Two main problems Scheduling Setup time 8-11

12 Simple Batch Systems Operation System Overview Early processors were very expensive It was important to maximize processor utilization Monitor : Simple batch operating systems Batch : Job together sequentially Resident monitor Users submit jobs to operator Operator batches jobs Monitor controls sequence of events to process batch When the job is completed, it returns control to the monitor, which immediately reads in the next job Monitor handles scheduling 8-12

13 Memory Layout Operation System Overview 8-13

14 Simple Batch Systems Operation System Overview At a certain point in time, the processor is executing instructions from the portion of main memory containing the monitor These instructions cause the next job to be read in to another portion of main memory Monitor handles the scheduling problem How about the job setup time? The monitor handles this as well Job control language(jcl) Used to provide instructions to the monitor 8-14

15 Overall Format of Job Operation System Overview $JOB $FTN... $LOAD $RUN... $END Instructions Data 8-15

16 Hardware Features of Simple Batch Operation System Overview Memory protection While the user program is executing, it must not alter the memory area containing the monitor Timer Prevent a single job from monopolizing the system Privileged instructions Executed only by the monitor Interrupts Flexibility in relinquishing control to and regaining control from user programs 8-16

17 Multiprogrammed Batch System Operation System Overview Simple batch system The processor is often idle The problem is that I/O devices are slow Suppose that there is room for the operating system and two user programs When one job needs to wait for I/O, the processor can switch to the other job, which likely is not waiting for I/O Read one record Execute 100 instructions Write one record TOTAL seconds seconds seconds seconds Percent CPU util = / = = 3.2 % System Utilization Example 8-17

18 Multiprogramming Example Uniprogramming Operation System Overview 8-18

19 Multiprogramming Example Multiprogramming with two programs Operation System Overview 8-19

20 Multiprogramming Example Multiprogramming with three programs Operation System Overview 8-20

21 Program Execution Attributes Operation System Overview JOB1 JOB2 JOB3 Type of jog Heavy compute Heavy I/O Heavy I/O Duration 5 min 15 min 10 min Memory required 50K 100K 80K Need disk? No No Yes Need terminal? No Yes No Need printer? No No Yes 8-21

22 Effects of Multiprogramming Operation System Overview Uniprogramming Multiprogramming Processor use 17% 33% Memory use 30% 67% Disk use 33% 67% Printer use 33% 67% Elapsed time 30 min 15 min Throughput rate 6 jobs/h 12 jobs/h Mean response time 18 min 10 min 8-22

23 Utilization Histograms Operation System Overview 8-23

24 Time-Sharing Systems Operation System Overview User interface acts directly with the computer Such as transaction processing, an interactive mode is essential Multiprogramming can be used handle multiple interactive jobs Batch Multiprogramming Time Sharing Principal objective Maximize processor use Minimize response time Source of instructions to operating system Job control language instructions provided with the job Command entered at the terminal 8-24

25 Scheduling Scheduling Key to Multiprogramming Process A program in execution The animated spirit of a program That entity to which a processor is assigned Long-term scheduling Medium-term scheduling Short-term scheduling I/O scheduling 8-25 The decision to add to the pool of processes to be executed The decision to add to the number of processes that are partially or fully in main memory The decision as to which available process will be executed by the processor The decision as to which process s pending I/O request shall be handled by an available I/O device

26 Long Term Scheduling 8-26 Scheduling Determines which programs are admitted to the system for processing Controls the degree of multiprogramming Once admitted, a job or user program becomes a process and is added to the queue for the short-term scheduler Newly created process begins in a swappedout condition, in which case it is added to a queue for the medium-term scheduler Decides that the operating system can take on one or more additional processes Decides which job or jobs to accept and turn into processes

27 Medium-Term Scheduling Scheduling Part of the swapping function Swapping-in decision is based on the need to manage the degree of multiprogramming On a system that does not use virtual memory, memory management is also an issue 8-27

28 Short-Term Scheduling Scheduling Dispatcher Fine-grained decision of which job to execute next Which job actually gets to use the processor in the next time slot 8-28

29 Process States of Short Term Scheduler State Status at any point in time Used because it connotes that certain information exists that defines the status at that point New Program is admitted by the high-level scheduler but is not yet ready to execute Ready Process is ready to execute Running Process is being executed Waiting Process is suspended Halted 8-29

30 Five-State Process Model Scheduling 8-30

31 Process Control Block Identifier State Priority Program Counter Memory pointers Context data Present in registers in the processor I/O status information Accounting information identifier State Priority Program counter Memory Pointer Context Data I/O Status Information Accounting Information

32 Scheduling Techniques Scheduling Begin at a point in time process A is running The processor is executing instructions from the program contained in A s memory The processor ceases to execute instructions in A and begins executing instructions Three reasons Process A issues a service call to the OS Process A causes an interrupt Some event unrelated to process A that requires attention causes an interrupt 8-32

33 Scheduling Example Scheduling 8-33

34 OS Queue Scheduling Long-term Queue List of jobs waiting to use the system High-level scheduler will allocate memory and create a process for one of the waiting items Short-term Queue All processes in the ready state One of these process could use the processor next Priority levels may also be used I/O Queue I/O queue for each I/O device More than one process may request the use of the same I/O device 8-34

35 Key Elements for Multiprogramming Scheduling 8-35

36 Queuing Diagram Representation Scheduling 8-36

37 Memory Management Memory management In a uniprogramming system, Main memory is divided into two parts: The operating system(resident monitor) The program currently being executed In a multi programming system, The user part of memory is subdivided to accommodate multiple processes The task of subdivision is carried out dynamically by the OS and is known as memory management 8-37

38 Swapping Memory management Problem : I/O activities are much slower than computation and therefore the processor in a uniprogramming system is idle most of the time Solutions Main memory could be expanded and so be able to accommodate more processes 2 Flaws First, main memory is expensive Second, the appetite of programs for memory has grown as fast as the cost of memory has dropped Swapping 8-38

39 Swapping Memory management Long-term queue of process requests, typically stored on disk These are bought in, one at a time, as space becomes available Rather than remain idle, the processor swaps one of these processes back out to disk into an intermediate queue This is a queue of existing processes that have been temporarily kicked out of memory OS brings in another process form the interface another process form the intermediate queue 8-39

40 Swapping Memory management Swapping is an I/O operation, therefore there is the potential for making the problem worse, not better Because disk I/O is generally the fastest I/O on a system(compared with tape or printer I/O), swapping will usually enhance performance 8-40

41 What is Swapping? Memory management Long term queue of processes stored on disk Processes swapped in as space becomes available As a process completes it is moved out of main memory If none of the processes in memory are ready (i.e. all I/O blocked) Swap out a blocked process to intermediate queue Swap in a ready process or a new process But swapping is an I/O process

42 Use of Swapping (a)sample Job Scheduling Memory management 8-42

43 Use of Swapping (b)swapping Memory management 8-43

44 Partitioning Memory management Simplest scheme for partitioning available memory is to use fixed-size partitions Fixed size partitions Although the partitions are of fixed size, they need not be of equal size When a process is brought into memory, it is placed in the smallest available partition that will hold it Even with the use of unequal fixed-size partitions, there will be wasted memory Leads to variable sized partitions 8-44

45 Fixed Partitions Memory management 8-45

46 Variable Sized Partitions Memory management More efficient approach Allocate exactly the required memory to a process This leads to a hole at the end of memory, too small to use Only one small hole - less waste When all processes are blocked, swap out a process and bring in another New process may be smaller than swapped out process 8-46

47 Variable Sized Partitions Memory management Memory becomes more and more fragmented, and memory utilization declines Eventually have lots of holes : fragmentation Solutions: Coalesce - Join adjacent holes into one large hole Compaction From time to time go through memory and move all hole into one free block (c.f. disk de-fragmentation) Operating system shifts the processes in memory to place all the free memory together in one block This is a time-consuming procedure, wasteful of processor time 8-47

48 Effect of Dynamic Partitioning Memory management 8-48

49 Effect of Dynamic Partitioning Memory management 8-49

50 Relocation Memory management No guarantee that process will load into the same place in memory Instructions contain addresses Locations of data Addresses for instructions (branching) Logical address - relative to beginning of program Physical address - actual location in memory (this time) Automatic conversion using base address 8-50

51 Partitioning Memory management The process is not likely to be loaded into the same place in main memory each time it is swapped in If compaction is used, a process may be shifted while in main memory The process in memory consists of instruction plus data The instructions will contain addresses for memory locations of two types Addresses of data items Addresses of instructions used for branching instruction 8-51

52 Partitioning Memory management Addresses are not fixed They will change each time a process is swapped in To solve this problem, a distinction is made between logical addresses and physical addresses Logical address A location relative to the beginning of the program Physical address Actual location in memory Automatically converts from logical to physical address 8-52

53 Paging Memory management Memory is partitioned into equal fixed-size chunks Chunk of a program, known as pages, could be assigned to available chunks of memory, known as frames, or page frames Wasted space in memory for that process is a fraction of the last page The list of free frames is maintained by the operating system A process does not require contiguous page frames Use page table to keep track 8-53

54 Allocation of Free Frames Memory management 8-54

55 Paging Memory management The OS maintains a page table for each process The page table show the frame location for each page of the process Main memory is divided into many small equal-size frames Each process is divided into frame-size pages Smaller processes require fewer pages, larger processes require more 8-55

56 Logical and Physical Addresses Memory management 8-56

57 Virtual Memory Memory management Demand Paging Page Table Structure 8-57

58 Demand Paging Memory management Each page of a process is brought in only when it is needed(on demand) If the program branch to an instruction on a page not in main memory, if the program references data on a page not in memory, a page fault is triggered 8-58

59 Demand Paging Memory management Only a few pages of any given process are in memory When it brings one page in, it must throw another page out Page fault Required page is not in memory Operating System must swap in required page May need to swap out a page to make space Select page to throw out based on recent history 8-59

60 Demand Paging Memory management Thrashing Processor spends most of its time swapping pages rather than executing instructions Too many processes in too little memory Operating System spends all its time swapping Little or no real work is done Disk light is on all the time Solutions Good page replacement algorithms Reduce number of processes running Fit more memory 8-60

61 Demand Paging Memory management Operating system tries to guess, based on recent history, which pages are least likely to be used in the near future It is possible for a process to be larger than all of main memory We do not need all of a process in memory for it to run We can swap in pages as required Because a process executes only in main memory, that memory is referred to as real memory Programmer or user perceives a much larger memory that which is allocated on the disk Virtual Memory So we can now run processes that are bigger than total memory available! 8-61

62 Page Table Structure Memory management The basic mechanism for reading a word from memory involves the translation of a virtual, or logical, address, consisting of frame number and offset, into a physical address, consisting of frame number and offset, using a page table The page number of a virtual address is used to index that table and look up the corresponding frame number This is combined with the offset portion of the virtual address to produce the desired real address 8-62

63 Page Table Structure Memory management Most Virtual memory schemes store page tables in virtual memory Page tables are subject to paging When a process is running, at least a part of its page table must be in main memory, including the page table entry of the currently executing page Two level scheme Page directory Each entry points to a page table Inverted page table 8-63

64 Page Table Structure Memory management Inverted Page Table The page number portion is mapped into a hash table using a simple hashing function The hash table contains a pointer to inverted page table, which contains the page table entries There is one entry in the hash table and inverted page table for each real memory page A fixed portion of real memory is required for the tables regardless of the number of processes or virtual pages supported 8-64

65 Inverted Page Table Structure Memory management 8-65

66 Translation Lookaside Buffer Memory management Every virtual memory reference causes two physical memory accesses Fetch the appropriate page table entry Fetch the desired data The straightforward virtual memory scheme would have the effect of doubling the memory access time Cache functions as a memory cache and contain page table entries that have been most recently used Use special cache for page table : TLB 8-66

67 Translation Lookaside Buffer Memory management A virtual address is in the form of a page number, offset The memory system consults the TLB to see if the matching page table entry is present If it is, the real address is generated by combining the frame number with the offset If not, the entry is accessed from a page table 8-67

68 Operation of Paging and TLB Memory management 8-68

69 Lookaside Buffer and Cache Memory management 8-69

70 Segmentation Memory management Visible to the programmer Paging is invisible Provided as a convenience for organizing programs and data Associating privilege and protection attributes with instructions and data Usually different segments allocated to program and data 8-70

71 Advantages of Segmentation Memory management Simplify the handling of growing data structure Allow programs to be altered and recompiled independently Lend itself to sharing among processes Lend itself to protection Some systems combine segmentation with paging 8-71

72 Segmentation Memory management Simplifies handling of growing data structures Allows programs to be altered and recompiled independently, without relinking and re-loading Lends itself to sharing among processes Lends itself to protection Some systems combine segmentation with paging 8-72

73 Pentium II Memory Management PentiumII&PowerPC Memory Management Address Spaces Unsegmented unpaged memory Unsegmented paged memory Segmented unpaged memory Segmented paged memory Segmentation Table Indicator Segment number Request privilege level(rpl) Paging 8-73

74 Pentium II Memory Management PentiumII&PowerPC Memory Management 8-74

75 Pentium II Memory Management PentiumII&PowerPC Memory Management 8-75

76 Pentium II Memory Management PentiumII&PowerPC Memory Management 8-76

77 Pentium II Memory Management PentiumII&PowerPC Memory Management 8-77

78 Pentium II Memory Management PentiumII&PowerPC Memory Management 8-78

79 Pentium II Memory Parameter PentiumII&PowerPC Memory Management 8-79

80 Pentium II Memory Parameter PentiumII&PowerPC Memory Management 8-80

81 Memory Address Translation PentiumII&PowerPC Memory Management 8-81

82 Pentium II Segmentation PentiumII&PowerPC Memory Management Each virtual address is 16-bit segment and 32- bit offset 2 bits of segment are protection mechanism 14 bits specify segment Unsegmented virtual memory 2 32 = 4Gbytes Segmented 2 46 =64 terabytes Can be larger depends on which process is active Half (8K segments of 4Gbytes) is global Half is local and distinct for each process 8-82

83 Pentium II Protection PentiumII&PowerPC Memory Management Protection bits give 4 levels of privilege 0 most protected, 3 least Use of levels software dependent Usually level 3 for applications, level 1 for O/S and level 0 for kernel (level 2 not used) Level 2 may be used for apps that have internal se curity e.g. database Some instructions only work in level

84 Pentium II Paging PentiumII&PowerPC Memory Management Segmentation may be disabled In which case linear address space is used Two level page table lookup First, page directory 1024 entries max Splits 4G linear memory into 1024 page groups of 4Mb Each page table has 1024 entries corresponding to 4Kb pages Can use one page directory for all processes, one per process or mixture Page directory for current process always in memory Use TLB holding 32 page table entries Two page sizes available 4k or 4M 8-84

85 PowerPC Memory-Management Management PentiumII&PowerPC Memory Management Comprehensive set of addressing mechanism Block address translation Address one drawback of paging mechanism Block addressing enable the map four large blocks of instruction memory and four large block of data memory in a way that bypass the paging mechanism 8-85

86 PowerPC Memory Management PentiumII&PowerPC Memory Management 32 bit paging with simple segmentation 64 bit paging with more powerful segmentation Or, both do block address translation Map 4 large blocks of instructions & 4 of memory to bypass paging e.g. OS tables or graphics frame buffers 32 bit effective address 12 bit byte selector =4kbyte pages 16 bit page id 64k pages per segment 4 bits indicate one of 16 segment registers Segment registers under OS control 8-86

87 Memory Management(PPC32bit) PentiumII&PowerPC Memory Management 8-87

88 PowerPC Address Translation PentiumII&PowerPC Memory Management 8-88

89 PowerPC Memory Management PentiumII&PowerPC Memory Management 8-89

90 PowerPC Memory Management PentiumII&PowerPC Memory Management 8-90

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