ESD Sensitive. Parameters Minimum Typical Maximum Units Notes ppm. Parameters Minimum Typical Maximum Units Notes
|
|
|
- Cameron Randall
- 6 years ago
- Views:
Transcription
1 Moisture Sensitivity Level (MSL) 1 FEATURES: LVCMOS, LVDS or LVPECL output option +2.5V or +3.3V operation -40 C to +85 C standard operating temperature range Ultra low RMS Jitter: 0.5ps typical, 1.0ps max (12kHz to 20MHz BW) Miniature size Ceramic SMT Package Short lead time STANDARD SPECIFICATIONS: APPLICATIONS: Networking SONET/SDH WiMax / WLAN Computing Phase Locked Loops Direct Digital Synthesis (DDS) DSL/ADSL Base Terminal Stations Operating Temperature C Storage Temperature C Overall Frequency Stability ppm See Note # 1 Initial Tolerance + Stability over operating temperature ppm Supply Voltage (Vdd) V dd = 3.3V V V dd = 2.5V V Enable/Disable Function : "1" (V IH 0.7*Vdd) or Open: Oscillation "0" (V IL < 0.3*Vdd) : High Z Phase jitter RMS (12kHz to 20MHz BW) ps Note #1: Inclusive of initial tolerance at 25ºC±3ºC, operating temperature range, input voltage variation, load variation & 15 years aging at 25ºC. Key Electrical Specifications LVCMOS Frequency Range MHz Supply Current (I dd ) 40 ma Output Logic Level V OH 0.9*V dd V V OL 0.1*V dd V I=±6mA Rise Time Tr 3 ns Fall Time Tf 3 ns 10% to 90% Duty Cycle % Output Load 15 pf Key Electrical Specifications LVDS Frequency Range MHz Supply Current (I dd ) 40 ma Freq. dependent Differential Output Voltage Swing 350 mv Duty Cycle Rise Time Tr 600 Fall Time Tf 600 ps RL=100Ω/CL=10pF Key Electrical Specifications LVPECL Frequency Range MHz Supply Current (I dd ) 65 ma Freq. dependent Output Logic Level V OH V dd V V OL V dd 1.62 V 50Ω nominal load Duty Cycle Rise Time Tr 600 Fall Time Tf 600 ps 20% to 80%
2 TEST CIRCUIT LVCMOS Output: LVDS Output: LVPECL Output:
3 OPTIONS & PART IDENTIFICATION: ASG2 - LJ - MHz - - Frequency See Table below for available frequencies Configuration Code See Table below for available configurations Packaging Blank = Bulk T = Tape & Reel(3k/reel) Table of Available Configurations Abracon P/N MHz MHz MHz MHz MHz MHz MHz Frequency (MHz) Freq. Stability Over Temperature (ppm) Operating Temperature ( C) Supply Voltage (V) Output Type 100 ±35-40 to LVPECL 125 ±35-40 to LVPECL 125 ±35-40 to LVPECL ±35-40 to LVPECL ±35-40 to LVPECL 200 ±35-40 to LVPECL ±35-40 to LVPECL 250 ±35-40 to LVPECL ±35-40 to LVPECL 285 ±35-40 to LVPECL 400 ±35-40 to LVPECL
4 OPTIONS & PART IDENTIFICATION: Table of Available Configurations (continued) Abracon P/N MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Frequency (MHz) Freq. Stability Over Temperature (ppm) Operating Temperature ( C) Supply Voltage (V) Output Type 1000 ±35-40 to LVPECL 100 ±35-40 to LVDS 125 ±35-40 to LVDS ±35-40 to LVDS 200 ±35-40 to LVDS ±35-40 to LVDS 250 ±35-40 to LVDS ±35-40 to LVDS 400 ±35-40 to LVDS 100 ±35-40 to LVCMOS 125 ±35-40 to LVCMOS ±35-40 to LVCMOS 200 ±35-40 to LVCMOS 1500 ±50 (Including 10-year aging) -40 to LVPECL
5 OUTLINE DIMENSION: Top View Recommended Land Pattern Bottom View Pin Description Pin # LVCMOS LVDS/LVPECL 1 Output Enable (OE) Side View 2 No Connect (N/C) 3 GND 4 RF Output 5 6 No Connect (N/C) Complimentary Output Vdd RECOMMENDED REFLOW PROFILE Dimensions: mm
6 TAPE & REEL: T= Tape and reel (3,000pcs/reel) Dimensions: mm Dimensions: mm ATTENTION: Abracon products are COTS Commercial-Off-The-Shelf products; suitable for Commercial, Industrial and, where designated, Automotive Applications. Abracon s products are not specifically designed for Military, Aviation, Aerospace, Life-dependant Medical applications or any application requiring high reliability where component failure could result in loss of life and/or property. For applications requiring high reliability and/or presenting an extreme operating environment, written consent and authorization from Abracon is required. Please contact Abracon for more information.
Ultra-Low Phase Jitter LVDS SMD Clock Oscillator
Ultra-Low Phase Jitter LDS SMD Clock Oscillator ESD Sensitive Moisture Sensitivity Level MSL 3 FEATURES: 50MHz LDS Typical phase noise: 121fs (Integration range: 1.875MHz-20MHz) ±50ppm total frequency
Ultra-Low Phase Jitter LVPECL SMD Clock Oscillator
Ultra-Low Phase Jitter LPECL SMD Clock Oscillator ESD Sensitive Moisture Sensitivity Level MSL 3 APPLICATIONS: 10/40/400 Gigabit Ethernet Fibre Channel 10G/12G SERDES FEATURES: 156.25MHz LPECL Typical
Ultra-Low Phase Jitter LVPECL SMD Clock Oscillator
Ultra-Low Phase Jitter LPECL SMD Clock Oscillator ASMX-156.250MHz-3BNR ESD Sensitive Moisture Sensitivity Level MSL 3 APPLICATIONS: 10/40/400 Gigabit Ethernet Fibre Channel 10G/12G SERDES FEATURES: 156.25MHz
STANDARD SPECIFICATIONS:
Moisture Sensitivity Level MSL 1 FEATURES: APPLICATIONS: Ultra Miniature Pure SiliconTM Clock Oscillator Storage Area Networks (SATA, SAS, Fiber Channel) High Performance MEMS Technology by Discera Passive
PERFORMANCE PLASTIC PACKAGE ULTRA MINIATURE PURE SILICON TM CLOCK OSCILLATOR
STANDARD SPECIFICATIONS: Moisture Sensitivity Level MSL 1 APPLICATIONS: FEATURES: Ultra Miniature Pure Silicon TM Clock Oscillator High Performance MEMS Technology by Discera Low Power Consumption for
PERFORMANCE PLASTIC PACKAGE ULTRA MINIATURE PURE SILICON TM CLOCK OSCILLATOR ASEMP
Moisture Sensitivity Level MSL 1 APPLICATIONS: FEATURES: Ultra Miniature Pure Silicon TM Clock Oscillator High Performance MEMS Technology by Discera Low Power Consumption for high speed communication
3.3V CMOS/PECL/LVDS OUTPUT SMD VCXO
FEATURES: CMOS, PECL or LVDS Output Low Integrated rms jitter (1 max. over 12kHz to 20MHz BW) Low Profile, Seam-Sealed Package (5.08 x 7.0 x1.8mm) Wide Frequency Pull Range (±100 ppm min.) Pb RoHS/RoHS
CLEARCLOCK POWER OPTIMIZED 0.12ps 5x7mm XO
FEATURES APPLICATIONS 0.125ps typ jitter (150fs MAX f > 200MHz, 25 C Highest in-class frequency range from 50 to 2100MHz Excellent spurious suppresion 70mA MAX I DD (LVDS, any V DD Lowest in-class power
PLASTIC PACKAGE INDUSTRIAL GRADE ULTRA MINIATURE PURE SILICONTM CLOCK OSCILLATOR ASEMB
Moisture Seitivity Level MSL 1 3.2 x 2. x 0.mm APPLICATIONS: FEATURES: Ultra Miniature Pure Silicon Clock Oscillator 2nd Generation MEMS Technology with reduced jitter by Discera Low Power Coumption
PLASTIC PACKAGE INDUSTRIAL GRADE ULTRA MINIATURE PURE SILICONTM CLOCK OSCILLATOR ASFLMB
ASEMB Moisture Seitivity Level MSL 1.0 x 3.2 x 0.mm APPLICATIONS: FEATURES: Pure Silicon Clock Oscillator 2nd Generation MEMS Technology with reduced jitter by Discera Low Power Coumption < Exceptional
CARDINAL COMPONENTS, INC.
SERIES CJAL CJAE The Cardinal Cappuccino Crystal Oscillator LVDS/ LVPECL Features 2.5V or 3.3V supply voltageconfigurable 10MHz to 250MHz LVDS and LVPECL outputs- configurable Better than 2Hz tuning resolution
CARDINAL COMPONENTS, INC.
SERIES CJTDAE CJTDAL The Cardinal Cappuccino Crystal Oscillator LVDS/ LVPECL TCXO Features 3.3V supply voltage- configurable 10MHz to 250MHz LVDS and LVPECL outputs- configurable Better than 2Hz tuning
Real Time Clock Module with I2C Bus
Moisture Seitivity Level: MSL=1 FEATURES: APPLICATIONS: With state-of-the-art RTC Technology by Micro Crystal AG Wide range in communication & measuring equipment RTC module with built-in crystal oscillating
DSC2033. Low-Jitter Configurable Dual LVDS Oscillator. General Description. Features. Block Diagram. Applications
General Description The series of high performance dual output LVDS oscillators utilize a proven silicon MEMS technology to provide excellent jitter and stability while incorporating additional device
Typical Applications Base Stations C MHz 700 MHz. Reference Frequency. Parameter Min Typ Max Units Condition
FX-401 Frequency Controlled Crystal Oscillator Features Reflow Process Compatible Surface Mount Package Low Phase Noise Build in PLL-Circuit Typical Applications Base Stations Previous Vectron Model Number
Features. o HCSL, LVPECL, or LVDS o Mixed Outputs: LVPECL/HCSL/LVDS. o Ext. Industrial: -40 to 105 C o o. o 30% lower than competing devices
DSC55704 Crystalless Three Output PCIe Clock Generator General Description The DSC55704 is a Crystalless, three output PCI express clock generator meeting Gen1, Gen2, and Gen3 specifications. The clock
PI6C557-01BQ. PCIe 3.0 Clock Generator with 1 HCSL Outputs. Features. Description. Pin Configuration (16-Pin TQFN) Block Diagram
s Features ÎÎPCIe 3.0 compliant à à Phase jitter - 0.45ps RMS (High Freq. Typ.) ÎÎLVDS compatible output ÎÎSupply voltage of 3.3V ±10% ÎÎ25MHz crystal or clock input frequency ÎÎHCSL outputs, 0.8V Current
CAP+ CAP. Loop Filter
STS-12/STS-3 Multirate Clock and Data Recovery Unit FEATURES Performs clock and data recovery for 622.08 Mbps (STS-12/OC-12/STM-4) or 155.52 Mbps (STS-3/OC-3/STM-1) NRZ data 19.44 MHz reference frequency
Control Circuitry 2 M1. Micrel Inc Fortune Drive San Jose, CA USA tel +1 (408) fax + 1 (408)
Crystal-less Configurable Clock Generator General Description The is a programmable, high performance dual LVDS output oscillator utilizing Micrel's proven silicon MEMS technology to provide excellent
Accelerate the speed of circuit design...oscillators in seconds, not days!
Accelerate the speed of circuit design...oscillators in seconds, not days! The MEMSpeed Pro oscillators operate down to 4mA with 1uA standby current! Introducing the MEMSpeed Pro, Low Power Oscillator
Pin Configuration and Selector Guide appear at end of data sheet. Typical Operating Circuits
Rev 2; 4/08 106.25MHz/212.5MHz/425MHz General Description The DS4106, DS4212, and DS4425 ceramic surfacemount crystal oscillators are part of Maxim s DS4-XO series of crystal oscillators. These devices
Control Circuitry 2 M1. Micrel Inc Fortune Drive San Jose, CA USA tel +1 (408) fax + 1 (408)
DSC2044FE1H0002 Crystalless Configurable Clock Generator General Description The DSC2044FE1H0002 is a programmable, high performance dual HCSL output oscillator utilizing Micrel's proven silicon MEMS technology
Micrel Inc Fortune Drive San Jose, CA USA tel +1 (408) fax + 1 (408)
DSC2311KL2R008 Crystalless Configurable Clock Generator General Description DSC2311KL2R008 is a crystalless clock generator that is factory configurable to simultaneously output two separate frequencies
User Selectable Up to Two Frequencies LVDS, LVPECL OR CMOS. 6 Pad Standard Package
MVQI Series 5X7 Ceramic SMD VCXO User Selectable Up to Two Frequencies LVDS, LVPECL OR CMOS 6 Pad Standard Package OneClock Range CMOS Range LVDS & LVPECL Temperature Stability* Operating Temperature Range
DSC Q0093. General Description. Features. Applications. Block Diagram. Crystal-less Configurable Clock Generator
Crystal-less Configurable Clock Generator General Description The is a four output crystal-less clock generator. It utilizes Microchip's proven PureSilicon MEMS technology to provide excellent jitter and
TF90LVDS047-6CG. Quad LVDS Line Driver with Flow-Through Pinout. Description. Features. Applications. Function Diagram. Ordering Information
Features Companion driver to Quad Extended Common Mode LVDS Receiver TF0LVDS048 DC to 400 Mbps / 200 MHz low noise, low skew, low power operation t 350 ps (max) channel-to-channel skew t 250 ps (max) pulse
VDD = V, TA = -40 C to +85 C, outputs terminated with 100 Ohms between Q and /Q.³
Ultra-Low Jitter 200MHz LVDS XO ClockWorks FUSION General Description The is an ultra-low phase jitter XO with LVDS output optimized for high line rate applications. Features 200MHz LVDS Typical phase
TF10CP02 / TF10CP Gbps 2x2 LVDS Crosspoint Switches. Features. Description. Applications. Function Diagram. Ordering Information.
Features DC to 1.5 Gbps low jitter, low skew, low power operation Pin configurable, fully differential, non-blocking architecture eases system design and PCB layout On-chip 100W input termination minimizes
PI6CEQ PCIe Gen2 / Gen3 Buffer. Features. Description. Applications. Block Diagram. Pin Configuration (20-Pin TSSOP & 20-Pin QSOP)
PCIe Gen2 / Gen3 Buffer Features ÎÎPCIe Gen2/ Gen3* compliant clock buffer/zdb * Gen3 performance only available in Commercial temp ÎÎInternal equalization for better signal integrity ÎÎ2 HCSL outputs
SY89610L. General Description. Features. Applications MHz to 694MHz Jitter Attenuator and Low Phase Noise Frequency Synthesizer
77.75MHz to 694MHz Jitter Attenuator and Low Phase Noise Frequency Synthesizer General Description The is a 3.3V, fully differential jitter attenuator and frequency synthesizer that accepts a noise clock
Features. Applications
2.5/3.3V 1-to-1 Differential to LVCMOS/LVTTL Translator Precision Edge General Description Micrel s is a 1-to-1, differential-to-lvcmos / LVTTL translator. The differential input is highly flexible and
2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS ICS Description. Features. Block Diagram DATASHEET
DATASHEET 2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS ICS557-08 Description The ICS557-08 is a 2:1 multiplexer chip that allows the user to select one of the two HCSL (Host Clock Signal Level) or LVDS input pairs
Wireless Access Point Server/Storage DIFF1 DIFF2
PCI-EXPRESS GEN 1, GEN 2, AND GEN 3 1:2 FAN-OUT CLOCK BUFFER Features PCI-Express Gen 1, Gen 2, and Gen 3 compliant devices Two low-power PCIe clock outputs Supports Serial-ATA (SATA) at 100 MHz No termination
FIN1101 LVDS Single Port High Speed Repeater
FIN1101 LVDS Single Port High Speed Repeater General Description This single port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. It accepts
2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS ICS Features
DATASHEET 2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS ICS557-08 Description The ICS557-08 is a 2:1 multiplexer chip that allows the user to select one of the two HCSL (Host Clock Signal Level) input pairs and
PI6LC48L0201A 2-Output LVDS Networking Clock Generator
Features ÎÎTwo differential LVDS output pairs ÎÎSelectable crystal oscillator interface or LVCMOS/LVTTL single-ended clock input ÎÎSupports the following output frequencies: 62.5MHz, 125MHz, 156.25MHz
SY89645L. General Description. Features. Block Diagram. Applications. Markets. Precision Low Skew, 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer
Precision Low Skew, 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer General Description The is a 3.3V, fully differential, low skew, 1:4 LVDS fanout buffer that accepts LVTTL or LVCMOS inputs. It is capable
OBSOLETE PI6C Low Power Networking Clock Generator. Description. Features. Block Diagram
Features ÎÎ3.3V supply voltage ÎÎ25MHz XTAL or reference clock input ÎÎOutput 4x100MHz HCSL PCIe clock outputs with integrated series termination resistors, spread spectrum capability on all 100MHz PCIe
PI6C49S1510 Rev J
High Performance Differential Fanout Buffer Features ÎÎ10 differential outputs with 2 banks ÎÎUser configurable output signaling standard for each bank: LVDS or LVPECL or HCSL ÎÎLVCMOS reference output
ZL40218 Precision 1:8 LVDS Fanout Buffer
Precision 1:8 LVDS Fanout Buffer Data Sheet Features Inputs/Outputs Accepts differential or single-ended input LVPECL, LVDS, CML, HCSL, LVCMOS Eight precision LVDS outputs Operating frequency up to 750
SM General Description. Features. Block Diagram. ClockWorks TM 125MHz LVDS / 125 MHz HCSL Ultra-Low Jitter Frequency Synthesizer
ClockWorks TM 125MHz LVDS / 125 MHz HCSL Ultra-Low Jitter Frequency Synthesizer General Description The is a member of the ClockWorks family of devices from Micrel and provides an extremely low-noise timing
FIN1102 LVDS 2 Port High Speed Repeater
LVDS 2 Port High Speed Repeater General Description This 2 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The FIN1102 accepts and
2 TO 4 DIFFERENTIAL CLOCK MUX ICS Features
DATASHEET 2 TO 4 DIFFERENTIAL CLOCK MUX ICS557-06 Description The ICS557-06 is a two to four differential clock mux designed for use in PCI-Express applications. The device selects one of the two differential
PCIe 3.0 Clock Generator with 4 HCSL Outputs. Description OE VDDXD S0 S1 S2 X1 X2 PD OE GNDXD IREF CLK0 CLK0 CLK1 CLK1 CLK2 CLK2 CLK3 CLK3
PCIe 3.0 Clock Generator with 4 HCSL Outputs Features PCIe 3.0 complaint PCIe 3.0 Phase jitter: 0.48ps RMS (High Freq. Typ.) LVDS compatible outputs Supply voltage of 3.3V ±5% 25MHz crystal or clock input
Not recommended for new designs
Eight Output Differential Buffer for PCI-Express Recommended Application: DB800 Intel Yellow Cover part with PCI-Express support. Output Features: 8-0.7V current-mode differential output pairs Supports
PI6C Low Power Networking Clock Generator. Description. Features. Block Diagram. 100MHz PCI-Express 0 100MHz PCI-Express 1 100MHz PCI-Express 2
Features ÎÎ25 MHz crystal or clock input ÎÎThree differential 100 MHz PCI-Express clock outputs push-pull termination ÎÎSpread spectrum capability on all 100 MHz PCI-e clock outputs with -0.5% down spread
SM Features. General Description. Applications. Block Diagram
ClockWorks Fibre Channel (106.25MHz, 212.5MHz) Ultra-Low Jitter, LVDS Frequency Synthesizer General Description The is a member of the ClockWorks family of devices from Micrel and provides an extremely
ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER. Description. Features. Block Diagram DATASHEET
DATASHEET ICS548A-03 Description The ICS548A-03 is a low cost, low skew, high-performance general purpose clock designed to produce a set of one output clock, one inverted output clock, and one clock divided-by-two.
Epson s Programmable Simple Packaged Crystal Oscillators (P-SPXO)
Epson s Simple Packaged Crystal Oscillators (P-SPXO) In today's fast-paced development environment, programmable oscillators provide flexibility for board-level designs. With 24-hour delivery, programmable
ZL40223 Precision 2:8 LVDS Fanout Buffer with Glitchfree Input Reference Switching and On-Chip Input Termination Data Sheet
Features Inputs/Outputs Accepts two differential or single-ended inputs LVPECL, LVDS, CML, HCSL, LVCMOS Glitch-free switching of references On-chip input termination and biasing for AC coupled inputs Eight
SM Features. General Description. Typical Application MHz/312.5MHz and MHz/156.25MHz LVDS Clock Synthesizer.
156.25MHz/312.5MHz and 78.125MHz/156.25MHz LVDS Clock Synthesizer ClockWorks Flex General Description The is a member of the ClockWorks family of devices from Micrel and provides an extremely low-noise
Description OUT0 1 OUTA1 OUTA1 2 OUTA2 3 OUTA3 OUTA4 OUTB1 6 OUTB2 7 OUTB2 OUTB3 OUTB4. All trademarks are property of their respective owners.
Features Maximum rated frequency: 133 MHz Low cycle-to-cycle jitter Input to output delay, less than 200ps Internal feedback allows outputs to be synchronized to the clock input Spread spectrum compatible
1.8V to 3.3V LVCMOS High Performance Clock Buffer Family
1.8V to 3.3V LVCMOS High Performance Clock Buffer Family 5PB11xx DATASHEET Description The 5PB11xx is a high-performance LVCMOS Clock Buffer Family. It has best-in-class Additive Phase Jitter of 50fsec
Si53102-A1/A2/A3 PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN- OUT CLOCK BUFFER. Features. Applications. Description. Functional Block Diagram
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN- OUT CLOCK BUFFER Features PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 common clock compliant Two low-power PCIe clock outputs Supports Serial-ATA (SATA)
Features. Applications
HCSL-Compatible Clock Generator for PCI Express General Description The is the smallest, high performance, lowest power, 2 differential output clock IC available for HCSL timing applications. offers -130dBc
LVDS Crystal Oscillator (XO)
LVDS Crystal Oscillator (XO) Features Low jitter crystal oscillator (XO) Less than 1 ps typical root mean square (RMS) phase jitter Low-voltage differential signaling (LVDS) output Output frequency from
Triangular spread spectrum profile for maximum EMI reduction (Si50122-A2) 2.5 V, 3.3 V Power supply. (2.0 x 2.5 mm) down spread outputs
CRYSTAL-LESS PCI-EXPRESS GEN1 DUAL OUTPUT CLOCK GENERATOR Features Crystal-less clock generator with integrated CMEMS PCI-Express Gen 1 compliant Triangular spread spectrum profile for maximum EMI reduction
Pentium Processor Compatible Clock Synthesizer/Driver for ALI Aladdin Chipset
1CY 225 7 fax id: 3517 Features Multiple clock outputs to meet requirements of ALI Aladdin chipset Six CPU clocks @ 66.66 MHz, 60 MHz, and 50 MHz, pin selectable Six PCI clocks (CPUCLK/2) Two Ref. clocks
Features. Applications
3.3V Ultra-Precision 1:4 LVDS Fanout Buffer/Translator with Internal Termination General Description The is a 3.3V, high-speed 2GHz differential low voltage differential swing (LVDS) 1:4 fanout buffer
ASM5P2308A. 3.3 V Zero-Delay Buffer
3.3 V Zero-Delay Buffer Description ASM5P2308A is a versatile, 3.3 V zero delay buffer designed to distribute high speed clocks. It is available in a 16 pin package. The part has an on chip PLL which locks
VT-820 VT-820. Temperature Compensated Crystal Oscillator Previous Vectron Model VTM3. Description
VT-820 Temperature Compensated Crystal Oscillator Previous Vectron Model VTM3 VT-820 Description Vectron s VT-820 Temperature Compensated Crystal Oscillator (TCXO) is a quartz stabilized, clipped sine
3.3V, 2.0GHz ANY DIFF. IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER FANOUT BUFFER W/ INTERNAL TERMINATION
3.3V, 2.0GHz ANY DIFF. -TO-LVDS PROGRAMMABLE CLOCK DIVIDER FANOUT BUFFER W/ TERNAL TERMATION FEATURES Guaranteed AC performance > 2.0GHz f MAX output toggle > 3.0GHz f MAX input < 800ps t PD (matched-delay
1.8V/3.0V Single-PLL Clock Generator AK8150C
AK8150C 1.8V/3.0V Single-PLL Clock Generator AK8150C Features Input Frequency: 38 MHz (1.8V or 3.0V) PLL Output Frequency: 12 MHz (1.8V or 3.0V) REF Output Frequency: 38 MHz or 19 MHz (1.8V or 3.0V) Low
1000 Base-T, ±15kV ESD Protection LAN Switches
19-0624; Rev 0; 8/06 1000 Base-T, ±15kV ESD Protection LAN Switches General Description The meet the needs of high-speed differential switching. The devices handle the needs of Gigabit Ethernet (10/100/1000)
1.8V/3.0V Single-PLL Clock Generator
ASAHI KASEI EMD CORPORATION 1.8V/3.0V Single-PLL Clock Generator Features Input Frequency: 36 MHz (1.8V or 3.0V) PLL Output Frequency: 12 MHz (1.8V or 3.0V) REF Output Frequency: 36 MHz or 18 MHz (1.8V
ICS8543I. Features. General Description. Pin Assignment. Block Diagram LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-LVDS FANOUT BUFFER
LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-LVDS FANOUT BUFFER ICS8543I General Description The ICS8543I is a low skew, high performance ICS 1-to-4 Differential-to-LVDS Clock Fan Buffer and a member of the family
T1/E1 CLOCK MULTIPLIER. Features
DATASHEET ICS548-05 Description The ICS548-05 is a low-cost, low-jitter, high-performace clock synthesizer designed to produce x16 and x24 clocks from T1 and E1 frequencies. Using IDT s patented analog/digital
3.3V 1GHz PRECISION 1:22 LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX
3.3V 1GHz PRECISION 1:22 LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX FEATURES High-performance, 1GHz LVDS fanout buffer/ translator 22 differential LVDS output pairs Guaranteed AC parameters over
Two Outputs Clock Generator AK8146B
ASAHI KASEI EMD CORPORATION Two Outputs Clock Generator AK8146B Features Pin Selectable External Input - 74.17582MHz - 74.25MHz - 60MHz Clock out Frequencies: - 12.000MHz - 13.5MHz Low Jitter Performance
Features. Applications
Ultra-Precision 1:8 CML Fanout Buffer with Internal I/O Termination General Description The is a 2.5V/3.3V precision, high-speed, fully differential CML 1:8 fanout buffer. The is optimized to provide eight
Low Jitter Programmable & Selectable SPXO with LVPECL Output
Programmable/Selectable SPXO Low Jitter Programmable & Selectable SPXO with LVPECL Output In today's fast-paced development environment, programmable oscillators provide flexibility for board-level designs.
VCXO. Contact Sales. North America T: +1 (800) Asia T: All Other Regions T: +1 (508)
Contact Sales North America T: +1 (800) 982-5737 Asia T: +65-6481-1466 All Other Regions T: +1 (508) 435-6831 frequencysales@ctscorp.com www.ctscorp.com 2016.10 - KGC CTS broad portfolio of Voltage Controlled
LC79401KNE. CMOS LSI Dot-Matrix LCD Drivers. Ordering number : ENA1419
Ordering number : ENA1419 COS LSI Dot-atrix LCD Drivers Overview The is a 80-outputs segment driver LSI for graphic dot-matrix liquid crystal display systems. The latches 80 bits of display data sent from
1000 Base-T, ±15kV ESD Protection LAN Switch
19-0841; Rev 0; 6/07 1000 Base-T, ±15kV ESD Protection LAN Switch General Description The meets the needs of high-speed differential switching, including that of Gigabit Ethernet (10/100/1000) Base-T switching
3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with INTERNAL INPUT TERMINATION
3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with TERNAL PUT TERMATION FEATURES Selects among four differential inputs Guaranteed AC performance over temp and voltage: DC-to > 3.2Gbps data rate throughput
Low Skew, 1-to-16 Differential-to-LVDS Clock Distribution Chip
Low Skew, 1-to-16 Differential-to-LVDS Clock Distribution Chip ICS8516 DATASHEET GENERAL DESCRIPTION The ICS8516 is a low skew, high performance 1-to-16 Differentialto-LVDS Clock Distribution Chip. The
Q-TECH CORPORATION. QT2024L CMOS, LOW CURRENT HIGH-TEMPERATURE REAL TIME CLOCK I 2 C SERIAL BUS INTERFACE 3.3Vdc. Description. Electrical Parameters
Description The QT2024 is an I 2 C-bus serial interface conforming, highprecision real-time clock (RTC) IC with a built-in 32.768kHz crystal oscillator circuit. In addition to clock and calendar functions,
CARDINAL COMPONENTS. FREQUENCY A MHz. Specifications: Min Typ Max Unit
Re-Configurable 6 Output PECL TCXO Fixed & Re-Configurable Multi-Frequency Oscillator Intuitive software and I 2 C interface Easily update system Industry-standard packaging saves on board space Mult.
Register Programmable Clock Generator AK8141
ASAHI KASEI EMD CORPORATION Register Programmable Clock Generator Features Input Frequency: 48MHz/24MHz/12MHz/27MHz (Selectable) Output Frequency: 27MHz 50MHz by 1MHz step, 33.75MHz/40.5MHz/49.5MHz (Selectable)
2.5V, 3.2Gbps, DIFFERENTIAL 4:1 LVDS MULTIPLEXER WITH INTERNAL INPUT TERMINATION
2.5V, 3.2Gbps, DIFFERENTIAL 4:1 LVDS MULTIPLEXER WITH TERNAL PUT TERMATION FEATURES Selects among four differential inputs Guaranteed AC performance over temp and voltage: DC-to > 3.2Gbps data rate throughput
LVDS Clocks and Termination
ABSTRACT Signal (LVDS) frequency control products and provide guidance for proper termination. require special consideration to utilize the logic properly. The Application Note covers interfacing LVDS
100 MHz LVDS Clock Generator
100 MHz LVDS Clock Generator 100 MHz LVDS Clock Generator Features One low-voltage differential signaling (LVDS) output pair Output frequency: 100 MHz External crystal frequency: 25 MHz Low RMS phase jitter
NCD2400M NCD2400M INTEGRATED CIRCUITS DIVISION. Wide Capacitance Range, Non-volatile Digital Programmable Capacitor
Wide Capacitance Range, Non-volatile Digital Programmable Capacitor Features DC to 150MHz frequency range 512-state digital programmable capacitor Series or shunt configuration C shunt = 12.5pF to 194pF
Product Preview 1.8 V PLL 1:10 Differential SDRAM MPC V PLL 1:10 Differential SDRAM MPC Clock Driver DATA SHEET
Freescale Semiconductor, Inc. TECHNICAL DATA Product Preview.8 V PLL :0 Differential SDRAM Clock Driver.8 V PLL :0 Differential SDRAM Order number: Rev, 08/2004 DATA SHEET Recommended Applications DDR
LC79431KNE. CMOS LSI Dot-Matrix LCD Drivers. Ordering number : ENA2124
Ordering number : ENA2124 COS LSI Dot-atrix LCD Drivers Overview The is a large-scale dot matrix LCD common driver LSI. The contains an 80-bit bidirectional shift register and is equipped with a 4-level
3SM201KMF0KB MEMS Microphone
Product Description The is a monolithic MEMS top performing miniature digital microphone based on CMOS foundry process. By integrating an acoustic transducer and an analog amplifier circuit followed by
HCMOS 3.2x2.5mm SMD Oscillator O3HS DATASHEET (Former F300, F310, F330, F340, Series)
Stabilities to ±20 PPM.0V ELECTRICAL CHARACTERISTICS Range (F O ).800 ~ 50.000 MHz Supply Voltage (V DD ).0V±5%.800 ~ 32.00 MHz >32.00 ~ 50.000 MHz 2.5 ma 3.5 ma 5 ua Output Symmetry (50% V DD ) 40 % ~
4bit LVDS Driver BU90LV047A. LVDS Interface ICs
LVDS Interface ICs 4bit LVDS Driver BU90LV047A Description LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and number of bits range is from 35 to 70.
CKSET V CC _VCO FIL SDO+ MAX3952 SCLKO+ SCLKO- PRBSEN LOCK GND TTL
19-2405; Rev 0; 4/02 10Gbps 16:1 Serializer General Description The 16:1 serializer is optimized for 10.3Gbps and 9.95Gbps Ethernet applications. A serial clock output is provided for retiming the data
3SM201KMT1KB MEMS Microphone
MEMS Microphone Product Description The is a monolithic MEMS top performing miniature digital microphone based on CMOS foundry process. By integrating an acoustic transducer and an analog amplifier circuit
SKY LF: GHz, 20 db Variable Voltage Attenuator
DATA SHEET SKY12146-321LF: 3.0 3.8 GHz, 20 Variable Voltage Attenuator Applications WLANs WiMAX systems Features Power control for 3.5 GHz fixed wireless applications Typical attenuation: 20 Control voltage:0
Low Power Multiclock Generator with XO AK8137A
Low Power Multiclock Generator with XO AK8137A Features 25MHz Crystal Input One 25MHz-Reference Output Selectable Clock out Frequencies: - 100, 133, 166, 200MHz - 96MHz - 100MHz - 25MHz Low Jitter Performance
Low-Jitter Frequency Synthesizer with Selectable Input Reference MAX3673
19-44 ; Rev 0; 2/09 E V A L U A T I O N K I T A V A I L A B L E Low-Jitter Frequency Synthesizer General Description The is a low-jitter frequency synthesizer that accepts two reference clock inputs and
Low Skew, 1-to-8, Differential-to-LVDS Clock
Low Skew, 1-to-8, Differential-to-LVDS Clock 85408 DATA SHEET General Description The 85408 is a low skew, high performance 1-to-8 Differential-to-LVDS Clock Distribution Chip. The 85408 CLK, nclk pair
133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP, USB, and DRCG Support
133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP, USB, and DRCG Support Features Mixed 2.5V and 3.3V Operation Compliant to Intel CK133 (CY2210-3) & CK133W (CY2210-2) synthesizer and driver specification
ML100SRI. Series. Ultra-Miniature, 1W High Isolation, SMT DC/DC Con vert ers. Key Features:
ML100SRI Ultra-Miniature, 1W High Isolation, SMT DC/DC Con vert ers Key Features: 1W Output Power Ultra-Miniature SMT Case 4,200 VDC Isolation Single & Dual Outputs -40ºC to +105ºC Operation Meets JEDEC
MAX9210/MAX9214/ MAX9220/MAX9222. Programmable DC-Balance 21-Bit Deserializers. Features. General Description. Applications. Ordering Information
General Description The MAX9210/MAX9214/ deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing
CARDINAL COMPONENTS. Specifications: Min Typ Max Unit
Re-Configurable 6 Output CMOS TCXO Fixed & Re-Configurable Multi-Frequency Oscillator Intuitive software and I 2 C interface Easily update system Software flexible, quick upgrades and changes Industry-standard
Digital "Mini" SiSonic TM Microphone Specification - Halogen Free. Knowles Acoustics 1151 Maplewood Drive Itasca, IL 60143
Digital "Mini" SiSonic TM Microphone Specification - Halogen Free Knowles Acoustics 1151 Maplewood Drive Itasca, IL 60143 Sheet 1 of 11 1. DESCRIPTION AND APPLICATION 1.1 DESCRIPTION Digital "Mini" Surface
Low Skew, 1-to-9, Differential-to- HSTL Fanout Buffer PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES MAY 6, 2017
Low Skew, 1-to-9, Differential-to- PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES MAY 6, 2017 8521 DATASHEET GENERAL DESCRIPTION The 8521 is a low skew, 1-to-9 Differential-to-HSTL Fanout Buffer.