EClamp2410P. ESD Protection Device for T-Flash/MicroSD Interfaces PRELIMINARY. PROTECTION PRODUCTS - EMIClamp TM Description.

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1 - EMIClamp TM Description The EClamp TM 240P is a combination EMI fi lter and line termination device with integrated TVS diodes for use on Multimedia Card interfaces. This state-of-the-art device utilizes solid-state silicon-avalanche technology for superior clamping performance and DC electrical characteristics. They have been optimized for protection of T-Flash/MicroSD interfaces in cellular phones and other portable electronics. The device consists of six circuits that include series impedance matching resistors and pull up resistors as required by the SD specifi cation. TVS diodes are included on each line for ESD protection. An additional TVS diode connection is included for protection of the voltage (Vdd) bus. Termination resistor value of 45 Ohms is included on the DAT0, DAT, DAT2, DAT3, CMD, and CLK lines. Pull up resistors of 5k Ohms are included on DAT0, DAT, DAT2, and CMD lines while a 50k Ohm pull up is inlcuded on the DAT3 line. These may be confi gured for devices operating in SD or SPI mode. The TVS diodes provide effective suppression of ESD voltages in excess of ±5kV (air discharge) and ±8kV (contact discharge) per IEC , level 4. The EClamp240P is in a 6-pin, RoHS/WEEE compliant, SLP406P6 package. It measures 4.0 x.6 x 0.58mm. The leads are spaced at a pitch of 0.5mm and are fi n- ished with lead-free NiPd. Pin Confi guration EClamp240P ESD Protection Device for T-Flash/MicroSD Interfaces Features Package Confi guration Bidirectional EMI/RFI fi ltering and line termination with integrated ESD protection ESD protection to IEC (ESD) Level 4, ±5kV (air), ±8kV (contact) TVS working voltage: 5V Termination Resistors: 45Ω Pull Up Resistors: 5kΩ (3 each) and 50kΩ Typical Capacitance per Line: 2pF (VR = 2.5V) Protection and termination for six lines + Vdd Solid-state technology Mechanical Characteristics SLP406P6 6-pin package RoHS/WEEE Compliant Nominal Dimensions: 4.0 x.6 x 0.58 mm Lead Pitch: 0.5mm Lead fi nish: NiPd Marking: Marking Code Packaging: Tape and Reel per EIA 48 Applications T-Flash / MicroSD Interfaces MMC Interfaces CDMA, GSM, 3G Cell Phones DAT In DAT0 In CLK In Vdd CMD In DAT3 In DAT2 In 6 DAT Out DAT0 Out CLK Out CMD Out 0.50 BSC DAT3 Out DAT2 Out 0.58 Revision 07/20/2006 Pin Designation (Top View) 6 Pin SLP package (Bottom Side View) Nominal Dimensions in mm

2 Pin Identifi cation and Confi guration Pin Symbol Identification, 6 DAT Data line # input/output with pull-up resistor , 5 DAT0 Data line #0 input/output with pull-up resistor 3, 4 Clock Clock line Input/Output 4 5k Pull-up resistor from DAT & DAT2 5 Vdd Power Supply ESD Protection , CMD Command Line Input/Output 7, 0 DAT3 Data line #3 input/output with pull-up resistor Pin Configuration (Top View) 8, 9 DAT2 Data line #2 input/output with pull-up resistor k Pull-Up Resistor from DAT k Pull-up resistor from DAT0 & CMD Center tab GND Ground connection Schematics & Component Values Pin 4 Pin 2 5K Pin, 8 45 Ohms Pin 9, 6 50K Pin 7 45 Ohms Pin 0 DAT, DAT2 DAT3 DAT0, CMD Line Pin 3 Pin 3 45 Ohms Pin 4 Pin 5 5K Pin 2, 6 45 Ohms Pin, 5 CLK Vdd DAT0, CMD 2006 Semtech Corp. 2

3 Maximum Ratings Rating Symbol Value Units ESD per IEC (Air) ESD per IEC (Contact) V ESD +/- 7 +/- 2kV Operating Temperature T J -40 to +85 o C Storage Temperature T STG -55 to +50 o C kv Electrical Characteristics (T = 25 o C) Parameter Symbol Conditions Minimum Typical Maximum Units TVS Reverse Stand-Off Voltage V RWM 5 V TVS Reverse Breakdown Voltage V BR I t = ma V TVS Reverse Leakage Current I R V RWM = 3.0V 0.5 µa Series Resistors R Each Line Ohms DAT Pull Up Resistor R up k Ohms DAT Pull Up Resistor 2 R up k Ohms Total Capacitance C in Input to Gnd, Each Line V R = 2.5V, f = MHz pf 2006 Semtech Corp. 3

4 Typical Characteristics Typical Insertion Loss S2 (Each Line) ESD Clamping (+8kV Contact) CH S2 LOG 6 db / REF 0 db : db 300 MHz 0 db -6 db -2 db 2: db 900 MHz 3: db.8 GHz -8 db -24 db 2 3 4: db 2.5 GHz -30 db 4-36 db -42 db -48 db MHz 0 MHz 00 MHz 3 GHz GHz START. 030 MHz STOP MHz Normalized Capacitance vs. Reverse Voltage Series Resistance vs. Temperature C J (V R ) / C J (V R =2.5) f = MHz Reverse Voltage - V R (V) Series Resistance (Ohm) Temperature ( 0 C) Pull Up Resistance () vs. Temperature Pull Up Resistance (2) vs. Temperature Pull Up Resistance (Ohm) Pull Up Resistance (Ohm) Temperature ( o C) 2006 Semtech Corp Temperature ( o C)

5 Applications Information Device Connection The EClamp240P is a microsd/t-flash interface device designed for use in cell phones and other portable electronic devices. The EClamp240P is comprised of series and pull up resistors required on the microsd interface. Each line also includes TVS diodes for ESD protection. The device may be confi gured for SD or SPI mode operation. In SD mode for example, the 5k Ohm pull up resistors ( and 3) are connected to VDD. In SPI mode pin 4 is not connected ( ) since these are reserved lines. The 50k Ohm pull up resistor is used for card detection or SPI mode selection during power up and is disconnected by the user during regular data transfer. The EClamp240P is in a 6-pin SLP package. Electrical connection is made to the 6 pins located at the bottom of the device. The device has a fl ow through design for easy layout. Pin connections are noted in Figure. A center tab serves as the ground connection. Recommendations for the ground connection are given below. Ground Connection Recommendation Parasitic inductance present in the board layout will affect the fi ltering and ESD performance of the device. Ground loop inductance can be reduced by using multiple vias to make the connection to the ground plane. Figure 2 shows the recommended device layout. The ground pad vias have a diameter of inches (0.20 mm) while the two external vias have a diameter of 0.00 inches (0.250mm). The internal vias are spaced approximately evenly from the center of the pad. The designer may choose to use more vias with a smaller diameter (such as inches or 0.25mm) since changing the diameter of the via will result in little change in inductance. Figure - Pin Identification and Configuration (Top Side View) DAT In DAT0 In CLK In Vdd CMD In DAT3 In DAT2 In DAT Out DAT0 Out CLK Out 3 2 CMD Out DAT3 Out DAT2 Out Figure 2 - Recommended Layout using Ground Vias 6 Layout Guidelines for Optimum ESD Protection Good circuit board layout is critical not only for signal integrity, but also for effective suppression of ESD induced transients. For optimum ESD protection, the following guidelines are recommended: Place the device as close to the connector as possible. This practice restricts ESD coupling into adjacent traces and reduces parasitic inductance. The ESD transient return path to ground should be kept as short as possible. Whenever possible, use multiple micro vias connected directly from the device ground pad to the ground plane. Avoid running critical signals near board edges Semtech Corp. 5

6 Applications Information DAT IN DAT OUT MicroSD Connector DAT 0 IN CLK IN 5KΩ VDD CMD IN DAT 3 IN DAT 0 OUT CLK OUT 5KΩ 50KΩ CMD OUT DAT 3 OUT Host IC DAT 2 IN DAT 2 OUT EClamp240P Figure 3 - MicroSD Protection 2006 Semtech Corp. 6

7 Applications Information - Spice Model 5K 45 Ohms Pin 4, 3 Pin, 8, 2, 6 Pin 9, 6,, 5 R 45 Ohms Pin 2 50K Pin 7 Pin 0 R DAT, DAT2, DAT0, CMD DAT3 Pin 3 Pin 4 R Pin 5 45 Ohms CLK Spice Model VDD EClamp240P Spice Parameters Parameter Unit D (TVS) IS Amp 2E-5 BV Volt 7.46 VJ Volt RS Ohm.00 IBV Amp E-3 CJO Farad 0E-2 TT sec 2.54E-9 M N --. EG ev Semtech Corp. 7

8 Outline Drawing - SLP406P6 aaa C A PIN INDICATOR (LASER MARK) A2 2 D D B E A A C SEATING PLANE DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX A A A2 (.005) (0.3) b D D E E e.020 BSC 0.50 BSC L N 6 6 aaa bbb LxN E/2 E e N D/2 bxn bbb C A B NOTES:. CONTROLLING DIMENSIO NS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. Land Pattern - SLP406P6 Z G Y P X F (C) DIMENSIONS DIM INCHES MILLIMETERS B C F G P X Y Z B NOTES:. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YO UR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET Semtech Corp. 8

9 Marking Ordering Information PIN INDICATOR (LASER MAR K) 240P YW Part Number Qty per Reel Reel Size EClamp240P.TCT 3,000 7 inch EMIClamp and EClamp are marks of Semtech Corporation Tape and Reel Specifi cation Pin Location User Direction of feed Device Orientation in Tape A0 B0 K0.78 +/-0.0 mm /-0.0 mm /-0.0 mm Tape Width B, (Max) D D E F K (MAX) P P0 P2 T(MAX) W 2 mm 8.2 mm (.476) mm mm ( ).0 mm ±0.05 (.039).750±.0 mm (.069±.004) 5.5±0.05 mm (.27±.002) 4.5 mm (.77) 4.0±0. mm (.57±.00-4) 4.0±0. mm (.57±.00-4) 2.0±0.05mm (.079±.002) 0.4 mm (.06) 2.0 mm mm - 0. mm (.472±.02) Contact Information for Semtech International AG Taiwan Branch Tel: Fax: Semtech Switzerland GmbH Japan Branch Tel: Fax: Korea Branch Tel: Fax: Shanghai Office Tel: Fax: Semtech International AG is a wholly-owned subsidiary of Semtech Corporation, which has its headquarters in the U.S.A. Semtech Limited (U.K.) Tel: Fax: Semtech France SARL Tel: 33-(0) Fax: 33-(0) Semtech Germany GmbH Tel: 49-(0) Fax: 49-(0) Semtech Corp. 9