QUESTION BANK UNIT-I. 4. With a neat diagram explain Von Neumann computer architecture

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1 UNIT-I 1. Write the basic functional units of computer? (Nov/Dec 2014) 2. What is a bus? What are the different buses in a CPU? 3. Define multiprogramming? 4.List the basic functional units of a computer? (Nov/Dec 2014) 5. Explain the various instruction types? 6. List the steps involved in the instruction execution. 7. What is a super computer? 8. Define ALU. What are the various operations performed in ALU? 9. What is meant by VLSI technology? 10. What are the characteristics of Von Neumann computers? 11. Define pipelining. 12. Distinguish between hardware and firmware. 13. Define micro computer. 14. What is mainframe computer? 15. Write the features of the third generation computers? 16. What is load store architecture? 17. Define index mode. (Apr 2015) 18.What is the role of program counter in addressing? (Nov/Dec 2014) 19. What are the limitations of assembly languages? 20. Explain the various addressing modes. (Apr 2015) 1.(a) Discuss & Differentiate between RISC and CISC.(5) (2014 nov/dec) (2015 nov/dec) (b) Elucidate the basic operational concepts involved in computer architecture with neat sketch.(6) (2014 nov/dec) 2.Explain various types of addressing modes in detail. (Apr 2015) 3.With neat diagram,explain in detail about functional units of computer system.(2015 apr/may) (2015 nov/dec) 4. With a neat diagram explain Von Neumann computer architecture 5. Explain various assembler directives used in assembly language program 6. What are stack and queues? Explain its use and applications,and give its differences 7. What are the various types of ISAs possible? Discuss. 8.Explain instruction formats in detail 9.Describe how the floating point number are represented and used in digital arithmetic operations. Give example(apr 2015) 10.What are the techniques used to measure the performance of a computer.explain each one of them with necessary formulae. Page 1

2 UNIT-II 1. Why floating point number is more difficult to represent and process than integer? (Nov/Dec 2014) 2. What are the advantages and disadvantages of hardwired and micro-programmed control? 3. Define hard-wired control? (Nov/Dec 2014) 4. What are the relative advantages and disadvantages of micro-programmed control over hardwired control? (Nov/Dec 2014) 5. Define Microinstruction 6. State the differences between hardwired and micro-programmed control unit. 7. Why is the Wait-For-memory-Function-Completed step needed when reading from or writing to the main memory? 8. What are the address sequencing capabilities required in a control memory? 9. Discuss the principle of operation of a micro programmed control unit? 10. What are the types of control organizations we have? 11. What is a control word? 12. What is a micro instruction? 13. What is a micro program? 14. What are the differences between the main memory and control memory? 15. What is micro program sequencer? 16. What is meant by mapping process? 17. What is a hard wired logic? 18. What are the advantages and disadvantages of the microprogramming? 19.define hardware control? 20.What is micro programmed control unit? 1. (a) Deliberate in detail about fetching a word from memory.(6) (2014 nov/dec) (b) Briefly explain the performance of ALU operation. (5) (2014 nov/dec) 2. (a) Write about hard wired control in detail.(6) (2014 nov/dec) (2015 nov/dec) (b) Explain the concept of wide-branch addressing.(5) (2014 nov/dec) 3. Draw a neat diagram of multi bus organization of CPU showing ALU, all types of register and then data paths among them.compare it with single bus organization of CPU. (2015 apr/may) 4. To execute instructions,the processor must have some means of generating the control signal needed in the proper sequence. Discuss the two techniques which help the computer designer to solve the above stated problem. (2015 apr/may) 5. Explain the multiple bus organization in detail. (2015 nov/dec) 6. Explain in detail about instruction execution characteristics. 7. With a neat block diagram, explain in detail about micro programmed control unit and explain its operations. Page 2

3 8. Explain the instruction cycle highlighting the sub-cycles and sequence of steps to be followed. 9.What are the steps involved in execution of an instruction?explain the execution of a complete instruction with diagram. UNIT-III 1. What is parallel processing? 2. State the different types of hazard that can occur in a pipeline. (Nov/Dec 2014) 3. Define nanoprogramming. (Nov/Dec 2015) 4. What is pipelining? 5. How do control instructions like branch, cause problems in a pipelined processor? 6. What is meant by super scalar processor? 7. Define pipeline speedup. 8. What is pipelined computer? 9. List the various pipelined processors. 10. Classify the pipeline computers. 11. Define efficiency of a linear pipeline? 12. Define reservation table of a pipeline processor. 13. Define arithmetic pipeline? Where it is used? 14. What is Vectorizer? 15. Explain the delayed branch concept. 16. What are the problems faced in instruction pipeline. 1.Explain operand forwarding process in data hazard. (2014 nov/dec) 2. (a) Enumerate data path and control consideration in detail.(6) (2014 nov/dec) (b) Elucidate the effect of Instruction hazard in terms of performance consideration. (2014 nov/dec) 3. Explain in detail about how does the conditional and unconditional branch instruction introduces the hazard with an example. (2015 apr/may) 4. (a) Depict the three bus organization of data path which connects register,alu and all general purpose registers for pipeline execution which support 4 stage pipeline.(5) (2015 apr/may) (b) Write short notes on Exception handling. 5. Give the organization of the internal data path of a processor that supports a 4-stage pipeline for instructions and uses a ->3- bus structure and discuss the same. (2015 nov/dec) 6. What is pipelining? What are the various hazards encountered in pipelining? (2015 nov/dec) 7. Highlight the solutions of instruction hazards. Page 3

4 UNIT-IV 1. Distinguish between the write-through and write-back policies pointing out their merits and Demerits. 2. What is the necessary of virtual memory? (Apr 2015) 3. Define hit ratio. 4. What is meant by memory interleaving? Show the distribution of addresses for a memory system. 5. What is TLB? What is its significance? 6. What is virtual memory? (Apr 2015) 7. How cache memory is used to reduce the execution time. 8. Define memory interleaving. 9. What is the function of a TLB? 10. What do you understand by Hit ratio? 11. Define locality of reference. What are its types? 12. Give the classification of memory. 13. What is SRAM and DRAM? 14. What is volatile memory? 15. What is flash memory? 16. What is cache data memory? 17. What is associate memory? 18. Define seek time and latency time. 19. What is DVD? 20. Define magneto optical disk. 1. Discuss the various mapping techniques used in cache memories. 2. Explain the concept of virtual memory with any one virtual memory management technique. (2014 nov/dec) (2015 nov/dec) 3. Give the basic cell of an associative memory and explain its operation. Show how associative memories can be constructed using this basic cell. 4. Give the structure of semiconductor RAM memories. Explain the read and write operations in detail. (2014 nov/dec) 5. Explain the organization of magnetic disks in detail. (2015 nov/dec) 6. A digital computer has a memory unit of 64K*16 and a cache memory of 1K words. The cache uses direct mapping with a block size of four words. How many bits are therein the tag, index, block and word fields of the address format? How many blocks can the caches accommodate? 7. Explain the concept of memory hierarchy. 8. Explain with neat diagram the internal organization of bit cells in a memory. Page 4

5 9. What is virtual memory? Explain address translator mechanism for converting virtual address into physical address with neat diagram. (2015 apr/may) UNIT-V 1. What is DMA? (Apr 2015) 2. Define Peripherals? 3. Distinguish between a synchronous bus and an asynchronous bus. 4. How does a processor handle an interrupt? 5. Why are interrupt masks provided in any processor? 6. How does bus arbitration typically work? 7. How is DMA operation? State its advantages. (Apr 2015) 8. What is the necessity of an interface? 9. Why does DMA have priority over the CPU when both request a memory transfer? 10. Define intra segment and inter segment communication. 11. Mention the group of lines in the system bus. 12. What is bus master and slave master? 13. What is the use of IO controller? 14. Differentiate synchronous and asynchronous communication. (Nov/Dec 2014) 15. What is strobe signal? 16. What is bus arbitration? 17. Mention the types of bus arbitration. 18. What is IO control method? 19. What is DMA in computer?(apr 2015) 20. Why are interrupt masks provided in any processor? 1. Explain the functions to be performed by a typical I/O interface with a typical input output interface. 2. Discuss the DMA driven data transfer technique. (2015 apr/may) (2015 nov/dec) 3.Discuss the operation of any two input devices 4.Explain in detail about interrupt handling. 5.Explain in detail about standard I/O interface. (2014 nov/dec) 6. Describe the functions of SCSI with a neat diagram. 7.What is the importance of I/O interface? Compare the features of SCSI and PCI interfaces. (2015 apr/may) (2015 nov/dec) 8. Write short notes on the following. (i) Bus arbitration (ii) Printer process communication (iii) USB (iv) DMA (2014 nov/dec) Page 5

6 9. Explain the use of vectored interrupts in processes. Why is priority handling desired in interrupt controllers? How does the different priority scheme work? (2015 apr/may) 10.List the standard I/O interface. explain in detail about their features stating their advantage and disadvantage. Page 6

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