CBM: A Cooperative Buffer Management for SSD

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1 3 th International Conference on Massive Storage Systems and Technology (MSST 4) : A Cooperative Buffer Management for SSD Qingsong Wei, Cheng Chen, Jun Yang Data Storage Institute, A-STAR, Singapore June -6, 4 Santa Clara, California, USA

2 Huge Performance Gap between Processor and Storage IOPS,,, s,, s Processor DRAM The current storage technology and architecture is rapidly the bo4leneck for large systems., s s Flash Hard Disk Picoseconds Nanoseconds Microseconds Milliseconds Latency

3 q NAND Flash Memory Ø Read/Write in PAGE (microseconds) Ø Erase in BLOCK (very slow, milliseconds) Ø Out-place-Update: Does not allow overwrite->need Garbage Collection Ø Limited number of erase per cell. K for SLC and K for MLC. Flash Memory

4 Key Challenges for Flash Memory q Random write issues v Slow v Shorten life-me(more block erase) v High garbage collec-on overhead q Limited lifeame, especially for MLC v Reliability, endurance, and performance are all declining when flash is moving from SLC to MLC. Bandwidth(MB/Sec) Sequential Write Random Write 8% Seq.+% Ran. Write 5 K K 4K 8K 6K 3K Request Size(Bytes) V t SLC( bit/cell) V t V t V t MLC ( bits/cell) V Type SLC MLC t6 V Page(Bytes) t5 Page/Block Block(Bytes) 8K- 56K 5K Read (us) 5 6 Program/Write (us) Erase (ms).5-3 V t4 V t3 V t V t V t TLC(3 bits/cell) Erase Cycle(LifeAme) K 5K- K ECC (per 5 bytes) bit ECC 4 bits ECC

5 q Non- vola-le memory(nvm) is under ac-ve development, such as PCM, STT- MRAM and RRAM. ü Non- vola-le ü Fast ü Byte- addressable ü Longer life-me than flash memory q Using NVM as write buffer in SSD to reduce latency and random writes. q Many algorithms have been proposed to manage write buffer, such as,, LB- Clock, and. But, write buffer and read cache are working separately without coopera-on. q Then, A Coopera've Buffer Management is proposed to coordinate write buffer and read cache to improve performance and reduce random writes. Objective Writes Write buffer algorithms Write Buffer (NVM) Page Write Host System Flash Translation Layer(FTL) Block Erase Flash Memory Read Cache (DRAM) Reads : Cooperative buffer algorithm Read cache Algorithms Page Read

6 : Cooperative Buffer Management q Overview v v v manages Read cache and write buffer in coopera-ve way Merge- on- flush: evicted block from write buffer is merged with pages in read cache to coopera-vely flush pages as sequen-al as possible. Note: we do not change the behaviors of read cache. Read Cache (DRAM) Write Buffer 8 (NVM) 8 6 Page Region Block Region Merge-on-Flush Sequential Write FTL/Flash Memory

7 : Cooperative Buffer Management q Write Buffer Management: hybrid space management v Write buffer is divided into Page Region and Block Region ü Page Region: to store random writes at page granularity Ø Page- based LRU list ü Block Region: to store sequen;al writes at block granularity Ø Block Popularity list: The blocks in the Block Region are organized as Block Popularity List (BPL). Page Region Block Region Block No: Block No: Block No: Page-based LRU List Block-based Popularity List

8 : Cooperative Buffer Management q Write Buffer Management: Block Popularity List v Block Popularity: block access frequency including wri-ng of any pages of the block. ü When a page of a block is wri_en, we increase the block popularity by ü Sequen-ally wri-ng mul-ple pages of a block is treated as one block access instead of mul-ple accesses. v The Block Popularity List is sorted on the basis of block popularity, and dirty page counter. ü Block popularity is primary criterion to decide the posi-on of a block in the BPL. Block Number Block Number Block Number Block Popularity Block Popularity Block Popularity Dirty Page Counter Page Page Page Page Dirty Page Counter Page Page Page Page Dirty Page Counter Page Page Page Page Page Most Popular Block Least Popular Block

9 : Cooperative Buffer Management q Write Buffer Management: replacement and flush policy v Replacement v Blocks in Block Region are replaced first v The least popular block in the Block Region is selected as vic-m. v If more than one block has the same least popularity, a block having the largest number of dirty pages is selected as a vic-m. v Flush: merge- on- flush v If the read cache contains clean pages belonging to the vic-m block, the dirty pages and clean pages are merged and flushed into flash memory sequen-ally. Requests: W(), R(), W(), R(3) Read Cache, 3 (x) (x) 3 Data Block Write Buffer, Log Block Flush(,) Write Buffer and read cache work separately pages are copied during Garbage Collection (Partial Merge) (x) (x) (x) 3(x) Data Block 3 Log Block Read Cache, 3 (x) (x) (x) Data Block Write Buffer,,,,3 3(x) 3 Log Block Merge-on-Flush Merge-on-flush No page copy during Garbage Collection (Switch Merge) (x) (x) (x) 3(x) Data Block 3 Log Block

10 : Cooperative Buffer Management q Write Buffer Management: Threshold- based migraaon v Buffer data in the Page Region will be migrated to the Block Region if the number of dirty pages in a block reaches the threshold. v The value of threshold is dynamically adjusted according to workloads. Page LRU List Page Region Block Assembling Blk. Blk. Blk. Dirty page counter>= THR migrate Threshold-based Migration Block Region Block Popularity List Blk.5 Blk.7 Blk.9

11 : Cooperative Buffer Management q Management data structure for : Global Block B+Tree v A Global Block B+tree is used to maintain the block associa-on across the read cache, write buffer s Page Region and Block Region. v The Global Block B+tree uses logical block number as key. Key: Logical Block Number Value: block node Root node Interior node Leaf node Block Node Block Popularity Dirty Page Counter Clean Page Counter Pointer Array Clean page LRU list Dirty Page LRU list 8 9 Block Popularity List DRAM Read Cache NVM Write Buffer

12 Simulation Evaluation Setup Ø SSD configura-on Ø FTL: FAST Ø Buffer Schemes Ø,, & Ø 4 enterprise workloads Evalua-on Metrics Ø Average response -me Ø Write buffer hit ra-o Ø Erase count Ø Destage length SSD configuration Page Read from Flash memory Page Program (Write) to Flash memory Block Erase Serial Access to Register (Data bus) Die Size Block Size Page Size Data Register Erase Cycles SSD Capacity NVM(STT- MRAM) write buffer read latency NVM(STT- MRAM) write buffer write latency DRAM read cache read latency 5μs μs.5ms μs GB 56 KB 4 KB 4 KB K 3GB 3ns 4ns 5ns Workload Traces Workloads Avg. Req. Size(KB) Write(%) Seq.(%) Avg. Req. Inter-arrive Time(ms) Financial MSNFS Exchange CAMWEBDEV

13 Result Financial OLTP trace Simulation Results Repsonse Time (msec) Hit Ratio (%) Number of Erases Cumulative Percentage (%) Write Length (Pages)

14 Result MSNFS trace Simulation Results Repsonse Time (msec) Hit Ratio (%) Number of Erases Cumulative Percentage(%) Write Length (Pages)

15 Result Exchange trace Simulation Results Repsonse Time (msec) Hit Ratio (%) Number of Erases Cumulative Percentage(%) Write Length (Pages)

16 Result CAMWEBDEV trace Simulation Results Repsonse Time (msec) Hit Ratio (%) Number of Erases Cumulative Percentage(%) Write Length (Pages)

17 Simulation Results Result Effect of Migra;on Threshold Response time(msec) THR= THR=8 THR=3 D y nami c T H R THR=4 THR=6 THR= THR= THR=8 THR=3 D y nami c T H R THR=4 THR=6 THR= THR= THR=8 THR=3 D y nami c T H R THR=4 THR=6 THR= THR= THR=8 THR=3 D y nami c T H R THR=4 THR=6 THR= Financial trace MSNFS trace Exchange trace CAMWEBDEV trace

18 Real implementation and Results Host:.4GHZ CPU, GB DRAM OpenSSD: 64GB, Faster FTL, 4MB read cache and 3MB write buffer Benchmark: Iometer Workloads: random mixed I/O with 5% reads and 5% writes. OpenSSD (64GB) IOPS KB 8KB 6KB 3KB 64KB 8KB Request Size

19 Conclusion q We proposed a coopera-ve buffer management scheme to make full use of both temporal and spa-al locality by coordina-ng write buffer and read cache. q A hybrid write buffer management is designed to improve buffer hit and destage sequen-ality by managing random writes at page level and sequen-al writes at block level. q Dynamic threshold- based migra-on and workload classifica-on is proposed to classify random and sequen-al writes for changing workloads. q We have implemented and evaluated on real OpenSSD plajorm. Benchmark results show that proposed can achieve up to 84% performance improvement and 85% garbage collec-on overhead (block erasure) reduc-on, compared with the state- of- the- art buffer management schemes.

20

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