3-Wire Serial EEPROM AT93C46C

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1 Features Low-Voltage and Standard-Voltage Operation 2.7(V CC =2.7Vto5.5V) 2.5(V CC =2.5Vto5.5V) 3-Wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression 2MHzClockRate(5V) Self-Timed Write Cycle (10 ms max) High Reliability Endurance: 1 Million Write Cycles Data Retention: 100 Years Automotive Grade and Extended Temperature Devices Available 8-lead PDIP and 8-lead JEDEC SOIC Packages Description The AT93C46C provides 1024 bits of serial electrically-erasable programmable read only memory (EEPROM) organized as 64 words of 16 bits each. The device is optimized for use in many industrial and commercial applicatio where low-power and low-voltage operation are essential. The AT93C46C is available in space saving 8- lead PDIP and 8-lead JEDEC SOIC packages. TheAT93C46CisenabledthroughtheChipSelectpin(),andaccessedviaa3- wire serial interface coisting of Data Input (DI), Data Output (DO), and Shift Clock (). Upon receiving a READ itruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When is brought high following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part. The AT93C46C is available in 2.7V to 5.5V and 2.5V to 5.5V versio. 3-Wire Serial EEPROM 1K (64 x 16) AT93C46C Pin Configuratio Pin Name Function Chip Select 8-lead PDIP DI DO GND Serial Data Clock Serial Data Input Serial Data Output Ground DI DO VCC DC NC GND VCC Power Supply NC DC No Connect Don t Connect 8-lead SOIC DI DO VCC DC NC GND Rev. 1

2 Absolute Maximum Ratings* Operating Temperature C to+125 C Storage Temperature C to+150 C Voltage on Any Pin with Respect to Ground V to +7.0V Maximum Operating Voltage V *NOTICE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of this specification is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. DC Output Current ma Block Diagram 2 AT93C46C

3 AT93C46C Pin Capacitance (1) Applicable over recommended operating range from T A =25 C, f = 1.0 MHz, V CC = +5.0V (unless otherwise noted). Symbol Test Conditio Max Units Conditio C OUT Output Capacitance (DO) 5 pf V OUT =0V C IN Input Capacitance (,, DI) 5 pf V IN =0V Note: 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from: T AI =-40 C to+85 C, V CC = +2.5V to +5.5V, T AC =0 C to+70 C, V CC = +2.5V to +5.5V (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units V CC1 Supply Voltage V V CC2 Supply Voltage V V CC3 Supply Voltage V I CC Supply Current V CC =5.0V Note: 1. V IL min and V IH max are reference only and are not tested. READ at 1.0 MHz ma WRITE at 1.0 MHz ma I SB1 Standby Current V CC = 2.5V = 0V µa I SB2 Standby Current V CC = 2.7V = 0V µa I SB3 Standby Current V CC = 5.0V = 0V µa I IL Input Leakage V IN =0VtoV CC µa I OL Output Leakage V IN =0VtoV CC µa (1) V IL1 Input Low Voltage -0.6 V (1) 2.5V V V IH1 Input High Voltage CC 5.5V CC x0.3 V V CC x0.7 V CC +1 V OL1 V OH1 V OL2 V OH2 Output Low Voltage Output High Voltage Output Low Voltage Output High Voltage 4.5V V CC 5.5V 2.5V V CC 2.7V I OL =2.1mA 0.4 V I OH =-0.4mA 2.4 V I OL =0.15mA 0.2 V I OH =-100µA V CC -0.2 V 3

4 AC Characteristics Applicable over recommended operating range from T A =-40 C to+85 C, V CC =+2.5Vto+5.5V, CL = 1 TTL Gate and 100 pf (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units f Clock Frequency 4.5V V CC 5.5V t H High Time 4.5V V CC 5.5V t L Low Time 4.5V V CC 5.5V t Minimum Low Time 4.5V V CC 5.5V t S t DIS Setup Time DI Setup Time Relative to Relative to Note: 1. This parameter is characterized and is not 100% tested. 4.5V V CC 5.5V 4.5V V CC 5.5V t H Hold Time Relative to 0 t DIH DI Hold Time t PD1 Output Delay to 1 t PD0 Output Delay to 0 t SV t DF to Status Valid to DO in High Impedance Relative to AC Test AC Test AC Test 4.5V V CC 5.5V 4.5V V CC 5.5V 4.5V V CC 5.5V 4.5V V CC 5.5V 4.5V V AC Test 5.5V CC 2.7V V = V CC 5.5V IL t WP Write Cycle Time 10 ms Endurance (1) 5.0V, 25 C, Page Mode MHz 4.5V V CC 5.5V 3 ms 1M Write Cycle 4 AT93C46C

5 AT93C46C Itruction Set for the AT93C46C Address Itruction SB Op Code x16 Comments READ 1 10 A 5 -A 0 Reads data stored in memory, at specified address. EWEN XXXX Write enable must precede all programming modes. ERASE 1 11 A 5 -A 0 Erase memory location A n -A 0. WRITE 1 01 A 5 -A 0 Writes memory location A n -A 0. ERAL XXXX Erases all memory locatio. Valid only at V CC = 4.5V to 5.5V. WRAL XXXX Writes all memory locatio. Valid only at V CC = 4.5V to 5.5V. EWDS XXXX Disables all programming itructio. Functional Description The AT93C46C is accessed via a simple and versatile three-wire serial communication interface. Device operation is controlled by seven itructio issued by the host processor. A valid itruction starts with a rising edge of and coists of a Start Bit (logic 1 ) followed by the appropriate Op Code and the desired memory Address location. READ (READ): The Read (READ) itruction contai the Address code for the memory location to be read. After the itruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock. It should be noted that a dummy bit (logic 0 ) precedes the 16-bit data output string. ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) itruction must be executed first before any programming itructio can be carried out. Please note that once in the Erase/Write Enable state, programming remai enabled until an Erase/Write Disable (EWDS) itruction is executed or V CC power is removed from the part. ERASE (ERASE): The Erase (ERASE) itruction programs all bits in the specified memory location to the logical 1 state. The self-timed erase cycle starts once the ERASE itruction and address are decoded. The DO pin outputs the READY/BUSY status of the part if is brought high after being kept low for a minimum of (t ). A logic 1 at pin DO indicates that the selected memory location has been erased, and the part is ready for another itruction. WRITE (WRITE): The Write (WRITE) itruction contai the 16 bits of data to be written into the specified memory location. The self-timed programming cycle t WP starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the READY/BUSY status of the part if is brought high after being kept low for a minimum of (t ). A logic 0 at DO indicates that programming is still in progress. A logic 1 indicates that the memory location at the specified address has been written with the data pattern contained in the itruction and the part is ready for further itructio. A Ready/Busy Status cannot be obtained if the is brought high after the end of the self-timed programming cycle, t WP. 5

6 ERASE ALL (ERAL): The Erase All (ERAL) itruction programs every bit in the memory array to the logic 1 state and is primarily used for testing purposes. The DO pin outputs the READY/BUSY status of the part if is brought high after being kept low for a minimum of (t ). The ERAL itruction is valid only at V CC =5.0V± 10%. WRITE ALL (WRAL): The Write All (WRAL) itruction programs all memory locatio with the data patter specified in the itruction. The DO pin outputs the READY/BUSY status of the part if is brought high after being kept low for a minimum of (t ). The WRAL itruction is valid only at V CC =5.0V± 10%. ERASE/WRITE DISABLE (EWDS): To protect agait accidental data disturb, the Erase/Write Disable (EWDS) itruction disables all programming modes and should be executed after all programming operatio. The operation of the READ itruction is independent of both the EWEN and EWDS itructio and can be executed at any time. 6 AT93C46C

7 AT93C46C Timing Diagrams Synchronous Data Timing Note: This is the minimum period. 7

8 Organization Key for Timing Diagrams AT93C46C I/O x16 A N A 5 D N D 15 READ Timing t High Impedance EWEN Timing (1) t DI Note: 1. Requires a minimum of nine clock cycles. EWDS Timing (1) t DI Note: 1. Requires a minimum of nine clock cycles. 8 AT93C46C

9 AT93C46C WRITE Timing t DI A N... A0 D N... D0 DO HIGH IMPEDANCE BUSY READY t WP WRAL Timing (1)(2) t DI D N... D0 DO HIGH IMPEDANCE BUSY READY t WP Notes: 1. Valid only at V CC = 4.5V to 5.5V. 2. Requires a minimum of nine clock cycles. 9

10 ERASE Timing t CHECK STATUS STANDBY DI A N-1 A N-2... A0 A N t SV t DF DO HIGH IMPEDANCE BUSY READY HIGH IMPEDANCE t WP ERAL Timing (1) t CHECK STATUS STANDBY DI t SV t DF DO HIGH IMPEDANCE BUSY HIGH IMPEDANCE READY t WP Note: 1. Valid only at V CC = 4.5V to 5.5V. 10 AT93C46C

11 AT93C46C Ordering Information Note: Ordering Code Package Operation Range AT93C46C-10PI-2.7 AT93C46C-10SI-2.7 8P3 8S1 Industrial (-40 C to85 C) AT93C46C-10PI-2.5 AT93C46C-10SI-2.5 8P3 8S1 Industrial (-40 C to85 C) For 2.7V and 2.5V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics table. Package Type 8P3 8S1 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Optio -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) 11

12 Packaging Information 8P3 PDIP 1 E E1 N Top View c ea End View D1 D e A2 A COMMON DIMENSIONS (Unit of Measure = inches) SYMBOL MIN NOM MAX NOTE A A b b b c b3 4 PL b2 b L D D E E Side View e BSC ea BSC 4 L Notes: R 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimeio A and L are measured with the package seated in JEDEC seating plane Gauge GS D, D1 and E1 dimeio do not include mold Flash or protrusio. Mold Flash or protrusio shall not exceed inch. 4. E and ea measured with the leads cotrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease iertion. 6. b2 and b3 maximum dimeio do not include Dambar protrusio. Dambar protrusio shall not exceed (0.25 mm) Orchard Parkway San Jose, CA TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) DRAWING NO. 8P3 01/09/02 REV. B 12 AT93C46C

13 AT93C46C 8S1 JEDEC SOIC H N Top View e B A D Side View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A2 C A 1.75 B 0.51 C 0.25 D 5.00 L E E 4.00 e 1.27 BSC H 6.20 End View L 1.27 Note: This drawing is for general information only. Refer to JEDEC Drawing MS-012 for proper dimeio, tolerances, datums, etc. 10/10/01 R 2325 Orchard Parkway San Jose, CA TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) DRAWING NO. 8S1 REV. A 13

14 Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose, CA TEL 1(408) FAX 1(408) Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland TEL (41) FAX (41) Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong TEL (852) FAX (852) Japan 9F, Tonetsu Shinkawa Bldg Shinkawa Chuo-ku, Tokyo Japan TEL (81) FAX (81) Atmel Operatio Memory 2325 Orchard Parkway San Jose, CA TEL 1(408) FAX 1(408) Microcontrollers 2325 Orchard Parkway San Jose, CA TEL 1(408) FAX 1(408) La Chantrerie BP Nantes Cedex 3, France TEL (33) FAX (33) ASIC/ASSP/Smart Cards Zone Industrielle Rousset Cedex, France TEL (33) FAX (33) East Cheyenne Mtn. Blvd. Colorado Springs, CO TEL 1(719) FAX 1(719) Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland TEL (44) FAX (44) RF/Automotive Theresietrasse 2 Postfach Heilbronn, Germany TEL (49) FAX (49) East Cheyenne Mtn. Blvd. Colorado Springs, CO TEL 1(719) FAX 1(719) Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP Saint-Egreve Cedex, France TEL (33) FAX (33) literature@atmel.com Web Site Atmel Corporation Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company s standard warranty whichisdetailedinatmel s Terms and Conditio located on the Company s web site. The Company assumes no respoibility for any errors which may appear in this document, reserves the right to change devices or specificatio detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licees to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel s products are not authorized for use as critical components in life support devices or systems. ATMEL is the registered trademark of Atmel. Other terms and product names may be the trademarks of others. Printed on recycled paper. xm

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