Product Overview. Programmable Network Cards Network Appliances FPGA IP Cores

Size: px
Start display at page:

Download "Product Overview. Programmable Network Cards Network Appliances FPGA IP Cores"

Transcription

1 2018 Product Overview Programmable Network Cards Network Appliances FPGA IP Cores

2 PCI Express Cards PMC/XMC Cards The V1151/V1152 The V5051/V5052 High Density XMC Network Solutions Powerful PCIe Network Solutions The V1151 & V1152 XMC cards feature Xilinx Virtex Ultrascale+ FPGAs, twelve 25G capable ports on the front panel, and sixteen high-speed links to the backplane. The V5051 & V5052 PCIe cards feature Xilinx Virtex Ultrascale+ FPGAs, sixteen 25G capable ports on the front panel, and a Gen3 x 16 PCIe host interface. Xilinx UltraScale+ FPGA (VU3P) Up to 12 transformer-coupled 1394b ports per card Front-panel and back-panel IO options available V1146 Up to 9 transformer-coupled backplane 1394b ports per card VITA 20 conduction-cooled compliant form-factor Up to 16 front panel optical ports that can provide Perfect for on-card application execution, algorithmintensive data processing, and traffic filtering/monitoring Quad SFP+ ports capable of Ethernet or Fibre Channel up to 5 G/s Supports PCI Express, PCI, and XAUI host interfaces V1131 Quad 10 Gigabit Ethernet SFP+ ports Altera Stratix V FPGA (scalable from A3 to A7) Supports PCI Express and XAUI host interfaces V5031 Quad 10 Gigabit Ethernet SFP/SFP+ ports Altera Stratix V FPGA (scalable from A3 to AB) Two independent banks of up to 8GB DDR3 SDRAM each Four independent banks of up to 144Mbit QDRII+ SRAM each On-board FLASH for dual boot support NW V1141 Up to 12 front panel optical ports that can provide Performs as a low-latency, high-bandwidth NIC card, port replicator/aggregator, port mux, or FPGA accelerator card V1142/V1144 Xilinx UltraScale+ FPGA (VU5P-VU11P) One bank of 144Mbit QDR-IV SRAM DV Newsletter CaptureXG 1000 Sixteen 1/10/25/40/100 Gigabit Ethernet SFP+ ports IRIG-A, B and G time synchronization PCAP Next Generation file format Programmable 5-tuple filters Low latency, multi-threaded DMA controller Be the first to receive the latest information on our newest cutting-edge technology. Only available to newsletter subscribers, this exclusive content & latest product information will keep you ahead of the competition. 10-second sign-up at

3 PCI Express Cards PMC/XMC Cards The V1151/V1152 The V5051/V5052 High Density XMC Network Solutions Powerful PCIe Network Solutions The V1151 & V1152 XMC cards feature Xilinx Virtex Ultrascale+ FPGAs, twelve 25G capable ports on the front panel, and sixteen high-speed links to the backplane. The V5051 & V5052 PCIe cards feature Xilinx Virtex Ultrascale+ FPGAs, sixteen 25G capable ports on the front panel, and a Gen3 x 16 PCIe host interface. Xilinx UltraScale+ FPGA (VU3P) Up to 12 transformer-coupled 1394b ports per card Front-panel and back-panel IO options available V1146 Up to 9 transformer-coupled backplane 1394b ports per card VITA 20 conduction-cooled compliant form-factor Up to 16 front panel optical ports that can provide Perfect for on-card application execution, algorithmintensive data processing, and traffic filtering/monitoring Quad SFP+ ports capable of Ethernet or Fibre Channel up to 5 G/s Supports PCI Express, PCI, and XAUI host interfaces V1131 Quad 10 Gigabit Ethernet SFP+ ports Altera Stratix V FPGA (scalable from A3 to A7) Supports PCI Express and XAUI host interfaces V5031 Quad 10 Gigabit Ethernet SFP/SFP+ ports Altera Stratix V FPGA (scalable from A3 to AB) Two independent banks of up to 8GB DDR3 SDRAM each Four independent banks of up to 144Mbit QDRII+ SRAM each On-board FLASH for dual boot support NW V1141 Up to 12 front panel optical ports that can provide Performs as a low-latency, high-bandwidth NIC card, port replicator/aggregator, port mux, or FPGA accelerator card V1142/V1144 Xilinx UltraScale+ FPGA (VU5P-VU11P) One bank of 144Mbit QDR-IV SRAM DV Newsletter CaptureXG 1000 Sixteen 1/10/25/40/100 Gigabit Ethernet SFP+ ports IRIG-A, B and G time synchronization PCAP Next Generation file format Programmable 5-tuple filters Low latency, multi-threaded DMA controller Be the first to receive the latest information on our newest cutting-edge technology. Only available to newsletter subscribers, this exclusive content & latest product information will keep you ahead of the competition. 10-second sign-up at

4 IP Cores PRE-LOADED OR STAND-ALONE Ethernet ExpressXG Complete FPGA design providing Ethernet interface IP, external memory interfaces, DMA controllers, PCIe interface, and software drivers. This IP provides out-ofthe-box operation of an FPGA-based Ethernet interface. Easy to add custom features for specific applications. TCP/UDP Offload Engine Hardware-based implementation of complete TCP/ UDP network stack. Increases bandwidth and latency performance of network interface while decreasing host processor utilization. 1394b - AS5643 PHY AS5643 PHY layer hardware implementation. Includes standard PHY-Link interface. OHCI Link Layer AS5643 OHCI Link layer hardware implementation. Includes standard PHY-Link interface and AXI bus for PCIe or embedded processor interface. GP2Lynx Link Layer AS5643 GP2Lynx Link layer hardware implementation. Includes standard PHY-Link interface. Fibre Channel ExpressFC Complete FPGA design providing network interface IP, external memory interfaces, DMA controllers, PCIe interface, and software drivers. This IP provides out-ofthe-box operation of an FPGA-based Fibre Channel interface. Easy to add custom features for specific applications. Link Layer Complete layer 1/layer 2 solution for Fibre Channel. Provides easy-to-integrate frame interface. Supports rates of 1/2/4/8/16G. Anonymous Subscriber Messaging (ASM) Hardware-based full-network stack implementation of FC-ASM. Provides hardware-based label lookup, DMA controllers, and message chain engines. F-35 compatible interface mode available. Remote Direct Memory Access (RDMA) Hardware-based full-network stack implementation of FC-RDMA. Provides hardware-based buffer mapping, DMA controllers, and message chain engines. F-18/F-15 compatible interface mode available. Offload Engine Hardware-based full-network stack implementation of AS5643. Provides hardware based label lookup, DMA controllers, and message chain engines. F-35 compatible interface mode available. Additional Protocols HOTLink II Complete layer 2 hardware implementation for HOTLink II. Provides easy to integrate frame interface. Supports full-rate, ½ rate, and ¼ rate operation as specified by the standard. F-18 compatible interface implementation. High Speed Data Bus (HSDB) Complete PHY and Mac layer hardware implementation for HSDB. Provides easy to integrate frame interface. F-22 compatible interface implementation. Serial Front Panel Data Port (sfpdp) Designed to the ANSI/VITA specification. The sfpdp core provides a complete hardware implementation of the protocol with an easy-to-integrate frame interface. Audio Video (AV) Hardware-based full-network stack implementation of FC-AV. Provides hardware-based buffer mapping, DMA controllers, and message chain engines. F-18/F-15 compatible interface mode available.

5 Appliances RapXG The RapXG delivers scalable, high-performance packet capture and playback. The RapXG comes standard with essential features, such as accurate time synchronization, programmable 5-tuple filters, PCAP Next Generation file format, a highly efficient PCI Express Gen3 host, a userfriendly GUI, and a feature-rich API for record and playback functions. Quad SFP+ ports supporting optical and copper connectors IRIG-A, B, and G time synchronization PCAP Next Generation file format Programmable capture size and hardware filters Low latency, multi-threaded DMA host interface Programmable Switch The Programmable Switch is a 32-port switch based on a powerful Xilinx UltraScale+ FPGA. This switch is ideal for applications that are not covered by a standard Ethernet or Fibre Channel switch. Applications include avionics testing platforms, in-line packet monitoring, on switch application execution, and security algorithm implementation. FPGA-based 32-port network switch Implicit Fibre Channel mode available for avionics networks Ethernet and Fibre Channel capable, up to 25G per port Embedded x86 processor available for control plane operations Customized functionality available Design & Verification Services Custom Hardware New Wave DV provides a variety of off-the-shelf solutions for high bandwidth, ultra-low latency, and other special purpose networking applications. However, some applications call for hardware that is custom-built to meet unique requirements. For these situations, we provide complete custom hardware design. New Wave DV s team of highly skilled engineers have extensive experience in designing, building, testing, and delivering electronic systems and chips. New Wave DV engineers are proficient in Verilog, VHDL, SystemVerilog, and they are experts in all FPGA vendor parts and tools. New Wave DV engineering resources can be used to create unique applications on existing New Wave DV cards, develop applications for non-new Wave DV cards, or to create completely custom hardware designs. We can produce solutions ranging from custom FPGA IP blocks to turn-key electronic systems. Independent Verification Design verification is one of our core competencies. Our verification engineers will test and prove the integrity of any design, large or small, ASIC or FPGA. We utilize SystemVerilog UVM and are up to speed on the latest constrained random methodologies and modern requirement test plans, to ensure that our clients receive the most thorough and accurate results. New Wave DV creates a verification plan and defines the verification process appropriate for each project. We utilize a variety of advanced design verification techniques, including: Complete simulation environments built around your DUT using UVM Constrained random stimulus generation Coverage-driven reactive test benches Integration of functional coverage assets using PSL/SVA Formal verification techniques We provide function coverage reports and code coverage reports with analyses following all verification processes.

6 ABOUT The New Wave Design and Verification team is made up of passionate engineers who have extensive experience designing, building, testing, and delivering electronic systems. We have combined our highly skilled engineers with our precision-made electronics products and unparalleled service to deliver products that meet your cost, schedule, and technical requirements. CONTACT New Wave Design and Verification, LLC 4950 W 78th St. Minneapolis, MN

5051 & 5052 PCIe Card Overview

5051 & 5052 PCIe Card Overview 5051 & 5052 PCIe Card Overview About New Wave New Wave DV provides high performance network interface cards, system level products, FPGA IP cores, and custom engineering for: High-bandwidth low-latency

More information

Highly Accurate, Record/ Playback of Digitized Signal Data Serves a Variety of Applications

Highly Accurate, Record/ Playback of Digitized Signal Data Serves a Variety of Applications New Wave Design and Verification Highly Accurate, Record/ Playback of Digitized Signal Data Serves a Variety of Applications Using FPGA-based filtering, precision timestamping and packetinspection, a powerful

More information

VXS-621 FPGA & PowerPC VXS Multiprocessor

VXS-621 FPGA & PowerPC VXS Multiprocessor VXS-621 FPGA & PowerPC VXS Multiprocessor Xilinx Virtex -5 FPGA for high performance processing On-board PowerPC CPU for standalone operation, communications management and user applications Two PMC/XMC

More information

XMC-FPGA05F. Programmable Xilinx Virtex -5 FPGA PMC/XMC with Quad Fiber-optics. Data Sheet

XMC-FPGA05F. Programmable Xilinx Virtex -5 FPGA PMC/XMC with Quad Fiber-optics. Data Sheet Data Sheet XMC-FPGA05F Programmable Xilinx Virtex -5 FPGA PMC/XMC with Quad s Applications Remote Sensor Interface Data Recorders Distributed Processing Interconnect Protocol Converter Data Encryption

More information

VXS-610 Dual FPGA and PowerPC VXS Multiprocessor

VXS-610 Dual FPGA and PowerPC VXS Multiprocessor VXS-610 Dual FPGA and PowerPC VXS Multiprocessor Two Xilinx Virtex -5 FPGAs for high performance processing On-board PowerPC CPU for standalone operation, communications management and user applications

More information

INT 1011 TCP Offload Engine (Full Offload)

INT 1011 TCP Offload Engine (Full Offload) INT 1011 TCP Offload Engine (Full Offload) Product brief, features and benefits summary Provides lowest Latency and highest bandwidth. Highly customizable hardware IP block. Easily portable to ASIC flow,

More information

S2C K7 Prodigy Logic Module Series

S2C K7 Prodigy Logic Module Series S2C K7 Prodigy Logic Module Series Low-Cost Fifth Generation Rapid FPGA-based Prototyping Hardware The S2C K7 Prodigy Logic Module is equipped with one Xilinx Kintex-7 XC7K410T or XC7K325T FPGA device

More information

INT-1010 TCP Offload Engine

INT-1010 TCP Offload Engine INT-1010 TCP Offload Engine Product brief, features and benefits summary Highly customizable hardware IP block. Easily portable to ASIC flow, Xilinx or Altera FPGAs INT-1010 is highly flexible that is

More information

Experience with the NetFPGA Program

Experience with the NetFPGA Program Experience with the NetFPGA Program John W. Lockwood Algo-Logic Systems Algo-Logic.com With input from the Stanford University NetFPGA Group & Xilinx XUP Program Sunday, February 21, 2010 FPGA-2010 Pre-Conference

More information

New! New! New! New! New!

New! New! New! New! New! New! New! New! New! New! Model 5950 Features Supports Xilinx Zynq UltraScale+ RFSoC FPGAs 18 GB of DDR4 SDRAM On-board GPS receiver PCI Express (Gen. 1, 2 and 3) interface up to x8 LVDS connections to

More information

Intelop. *As new IP blocks become available, please contact the factory for the latest updated info.

Intelop. *As new IP blocks become available, please contact the factory for the latest updated info. A FPGA based development platform as part of an EDK is available to target intelop provided IPs or other standard IPs. The platform with Virtex-4 FX12 Evaluation Kit provides a complete hardware environment

More information

New! New! New! New! New!

New! New! New! New! New! New! New! New! New! New! Model 5950 Features Supports Xilinx Zynq UltraScale+ RFSoC FPGAs 18 GB of DDR4 SDRAM On-board GPS receiver PCI Express (Gen. 1, 2 and 3) interface up to x8 LVDS connections to

More information

BittWare s XUPP3R is a 3/4-length PCIe x16 card based on the

BittWare s XUPP3R is a 3/4-length PCIe x16 card based on the FPGA PLATFORMS Board Platforms Custom Solutions Technology Partners Integrated Platforms XUPP3R Xilinx UltraScale+ 3/4-Length PCIe Board with Quad QSFP and 512 GBytes DDR4 Xilinx Virtex UltraScale+ VU7P/VU9P/VU11P

More information

1G Bit TCP+UDP Offload Engine (TOE+UOE) Hardware IP Core

1G Bit TCP+UDP Offload Engine (TOE+UOE) Hardware IP Core Intilop Corporation 4800 Great America Pkwy Ste-231 Santa Clara, CA 95054 Ph: 408-496-0333 Fax:408-496-0444 www.intilop.com 1G bit TCP+UDP Offload Engine MAC + Host_IF (Same PHY Port) INT 2511 (Ultra-Low

More information

Calypso-V6 VME / VXS. Extreme Signal Acquisition. and FPGA-based Processing. Without Compromise

Calypso-V6 VME / VXS. Extreme Signal Acquisition. and FPGA-based Processing. Without Compromise The Leader In FPGA-based Sensor I/O Processing Calypso-V6 VME / VXS Extreme Signal Acquisition and FPGA-based Processing Without Compromise Features Two 12-bit ADCs at 3.6 GSPS Also supports 6 channels

More information

INT G bit TCP Offload Engine SOC

INT G bit TCP Offload Engine SOC INT 10011 10 G bit TCP Offload Engine SOC Product brief, features and benefits summary: Highly customizable hardware IP block. Easily portable to ASIC flow, Xilinx/Altera FPGAs or Structured ASIC flow.

More information

100% PACKET CAPTURE. Intelligent FPGA-based Host CPU Offload NIC s & Scalable Platforms. Up to 200Gbps

100% PACKET CAPTURE. Intelligent FPGA-based Host CPU Offload NIC s & Scalable Platforms. Up to 200Gbps 100% PACKET CAPTURE Intelligent FPGA-based Host CPU Offload NIC s & Scalable Platforms Up to 200Gbps Dual Port 100 GigE ANIC-200KFlex (QSFP28) The ANIC-200KFlex FPGA-based PCIe adapter/nic features dual

More information

FPGA Solutions: Modular Architecture for Peak Performance

FPGA Solutions: Modular Architecture for Peak Performance FPGA Solutions: Modular Architecture for Peak Performance Real Time & Embedded Computing Conference Houston, TX June 17, 2004 Andy Reddig President & CTO andyr@tekmicro.com Agenda Company Overview FPGA

More information

Field Programmable Gate Array (FPGA) Devices

Field Programmable Gate Array (FPGA) Devices Field Programmable Gate Array (FPGA) Devices 1 Contents Altera FPGAs and CPLDs CPLDs FPGAs with embedded processors ACEX FPGAs Cyclone I,II FPGAs APEX FPGAs Stratix FPGAs Stratix II,III FPGAs Xilinx FPGAs

More information

10G bit UDP Offload Engine (UOE) MAC+ PCIe SOC IP

10G bit UDP Offload Engine (UOE) MAC+ PCIe SOC IP Intilop Corporation 4800 Great America Pkwy Ste-231 Santa Clara, CA 95054 Ph: 408-496-0333 Fax:408-496-0444 www.intilop.com 10G bit UDP Offload Engine (UOE) MAC+ PCIe INT 15012 (Ultra-Low Latency SXUOE+MAC+PCIe+Host_I/F)

More information

Analog & Digital I/O

Analog & Digital I/O Analog & Digital I/O ANALOG & DIGITAL I/O MODEL DESCRIPTION Cobalt 730 1 GHz and D/A, Virtex-6 - XMC Cobalt 78630 1 GHz and D/A, Virtex-6 - x8 Cobalt 53630 1 GHz and D/A, Virtex-6-3U VPX - Format 1 Cobalt

More information

10 G Bit TCP+UDP Offload Engine (TOE+UOE) Hardware IP Core

10 G Bit TCP+UDP Offload Engine (TOE+UOE) Hardware IP Core Intilop Corporation 4800 Great America Pkwy Ste-231 Santa Clara, CA 95054 Ph: 408-496-0333 Fax:408-496-0444 www.intilop.com 10G bit TCP+UDP Offload Engine MAC + PCIe + Host_IF (Same PHY Port) INT 25012

More information

AMC531 / AMC531C AMC FPGA, Altera EP4S100Gx

AMC531 / AMC531C AMC FPGA, Altera EP4S100Gx KEY FEATURES AMC FPGA, Altera EP4S100Gx FPGA based on the Altera Stratix IV Single module, mid-size per AMC.0 EP4S100Gx in 1517 package Conduction cooled version available Single module, mid-size (full-size

More information

10 Gigabit XGXS/XAUI PCS Core. 1 Introduction. Product Brief Version April 2005

10 Gigabit XGXS/XAUI PCS Core. 1 Introduction. Product Brief Version April 2005 1 Introduction Initially, network managers use 10 Gigabit Ethernet to provide high-speed, local backbone interconnection between large-capacity switches. 10 Gigabit Ethernet enables Internet Service Providers

More information

XMC Products. High-Performance XMC FPGAs, XMC 10gB Ethernet, and XMC Carrier Cards. XMC FPGAs. FPGA Extension I/O Modules.

XMC Products. High-Performance XMC FPGAs, XMC 10gB Ethernet, and XMC Carrier Cards. XMC FPGAs. FPGA Extension I/O Modules. E M B E D D E D C O M P U T I N G & I / O S O L U T I O N S XMC Products XMC FPGAs FPGA Extension I/O Modules XMC 10gB Ethernet XMC Carrier Cards XMC Software Support High-Performance XMC FPGAs, XMC 10gB

More information

3U CompactPCI Intel SBCs F14, F15, F17, F18, F19P

3U CompactPCI Intel SBCs F14, F15, F17, F18, F19P 3U CompactPCI Intel SBCs F14, F15, F17, F18, F19P High computing and graphics performance with forward compatibility for a wide range of industrial applications. 1 Content Processor roadmap Technical data

More information

AMC516 Virtex-7 FPGA Carrier for FMC, AMC

AMC516 Virtex-7 FPGA Carrier for FMC, AMC KEY FEATURES Virtex-7 FPGA Carrier AMC FPGA carrier for FMC per VITA-57 Xilinx Virtex-7 690T FPGA in FFG-1761 package with optional P2040 Supported by DAQ Series data acquisition software AMC Ports 12-15

More information

NetFPGA Hardware Architecture

NetFPGA Hardware Architecture NetFPGA Hardware Architecture Jeffrey Shafer Some slides adapted from Stanford NetFPGA tutorials NetFPGA http://netfpga.org 2 NetFPGA Components Virtex-II Pro 5 FPGA 53,136 logic cells 4,176 Kbit block

More information

RiceNIC. Prototyping Network Interfaces. Jeffrey Shafer Scott Rixner

RiceNIC. Prototyping Network Interfaces. Jeffrey Shafer Scott Rixner RiceNIC Prototyping Network Interfaces Jeffrey Shafer Scott Rixner RiceNIC Overview Gigabit Ethernet Network Interface Card RiceNIC - Prototyping Network Interfaces 2 RiceNIC Overview Reconfigurable and

More information

SBC-COMe FEATURES DESCRIPTION APPLICATIONS SOFTWARE. EnTegra Ltd Tel: 44(0) Web:

SBC-COMe FEATURES DESCRIPTION APPLICATIONS SOFTWARE. EnTegra Ltd Tel: 44(0) Web: A Windows /Linux Embedded Single Board Computer with XMC IO Site FEATURES Combines an industry standard COM CPU module with an XMC IO module in a compact, stand alone design Scalable CPU performance from

More information

Gemini-V6 VME / VXS. Extreme Signal Acquisition. and FPGA-based Processing. Without Compromise

Gemini-V6 VME / VXS. Extreme Signal Acquisition. and FPGA-based Processing. Without Compromise The Leader In FPGA-based Sensor I/O Processing Gemini-V6 VME / VXS Extreme Signal Acquisition and FPGA-based Processing Without Compromise Features One 12-bit ADC channels at 3.6 GSPS, or three channels

More information

CHAMP-FX2. FPGA Accelerator Signal Processing Platform. Data Sheet. Features 6U VPX-REDI (VITA 46 and 48) FPGA signal processing platform

CHAMP-FX2. FPGA Accelerator Signal Processing Platform. Data Sheet. Features 6U VPX-REDI (VITA 46 and 48) FPGA signal processing platform Data Sheet CHAMP-FX2 FPGA Accelerator Signal Processing Platform Features 6U VPX-REDI (VITA 46 and 48) FPGA signal processing platform Two user-programmable Xilinx Virtex -5 FPGA nodes (LX110T or LX220T)

More information

AMC517 Kintex-7 FPGA Carrier for FMC, AMC

AMC517 Kintex-7 FPGA Carrier for FMC, AMC AMC Kintex-7 FPGA Carrier KEY FEATURES AMC FPGA carrier for FMC per VITA-57 Xilinx Kintex-7 410T FPGA in FFG-900 package with optional P2040 Supported by DAQ Series data acquisition software AMC Ports

More information

Early Models in Silicon with SystemC synthesis

Early Models in Silicon with SystemC synthesis Early Models in Silicon with SystemC synthesis Agility Compiler summary C-based design & synthesis for SystemC Pure, standard compliant SystemC/ C++ Most widely used C-synthesis technology Structural SystemC

More information

Getting started with Digilent NetFPGA SUME, a Xilinx Virtex 7 FPGA board for high performance computing and networking systems

Getting started with Digilent NetFPGA SUME, a Xilinx Virtex 7 FPGA board for high performance computing and networking systems Getting started with Digilent NetFPGA SUME, a Xilinx Virtex 7 FPGA board for high performance computing and networking systems Introduction The NetFPGA project is a group to develop open source hardware

More information

Interfacing FPGAs with High Speed Memory Devices

Interfacing FPGAs with High Speed Memory Devices Interfacing FPGAs with High Speed Memory Devices 2002 Agenda Memory Requirements Memory System Bandwidth Do I Need External Memory? Altera External Memory Interface Support Memory Interface Challenges

More information

40Gbps+ Full Line Rate, Programmable Network Accelerators for Low Latency Applications SAAHPC 19 th July 2011

40Gbps+ Full Line Rate, Programmable Network Accelerators for Low Latency Applications SAAHPC 19 th July 2011 40Gbps+ Full Line Rate, Programmable Network Accelerators for Low Latency Applications SAAHPC 19 th July 2011 Allan Cantle President & Founder www.nallatech.com Company Overview ISI + Nallatech + Innovative

More information

10 Gigabit Ethernet 10GBase-R PCS Core. 1 Introduction. Product Brief Version August 2004

10 Gigabit Ethernet 10GBase-R PCS Core. 1 Introduction. Product Brief Version August 2004 1 Introduction Initially, 10 Gigabit Ethernet (10 GbE) is used by network managers to provide high-speed, local backbone interconnection between large-capacity switches, as it enables Internet Service

More information

DESIGN AND IMPLEMENTATION OF AN AVIONICS FULL DUPLEX ETHERNET (A664) DATA ACQUISITION SYSTEM

DESIGN AND IMPLEMENTATION OF AN AVIONICS FULL DUPLEX ETHERNET (A664) DATA ACQUISITION SYSTEM DESIGN AND IMPLEMENTATION OF AN AVIONICS FULL DUPLEX ETHERNET (A664) DATA ACQUISITION SYSTEM Alberto Perez, Technical Manager, Test & Integration John Hildin, Director of Network s John Roach, Vice President

More information

PE2G4SFPI80 Quad Port SFP Gigabit Ethernet PCI Express Server Adapter Intel 82580EB Based

PE2G4SFPI80 Quad Port SFP Gigabit Ethernet PCI Express Server Adapter Intel 82580EB Based PE2G4SFPI80 Quad Port SFP Gigabit Ethernet PCI Express Server Adapter Intel 82580EB Based Product Description Silicom s Quad Port SFP Gigabit Ethernet PCI Express Server adapter is PCI-Express X4 SFP Gigabit

More information

Accelerating System Designs Requiring High-Bandwidth Connectivity with Targeted Reference Designs

Accelerating System Designs Requiring High-Bandwidth Connectivity with Targeted Reference Designs White Paper: Spartan-6 and Virtex-6 FPGAs WP359 (v1.0) December 8, 2009 Accelerating System Designs Requiring High-Bandwidth Connectivity with Targeted Reference Designs By: Navneet Rao FPGAs that provide

More information

Enyx soft-hardware design services and development framework for FPGA & SoC

Enyx soft-hardware design services and development framework for FPGA & SoC soft-hardware design services and development framework for FPGA & SoC Smart NIC Smart Switch Your custom hardware hardware acceleration experts 3rd party IP Cores AXI ARM DMA CPU Your own soft-hardware

More information

AD GSPS Analog Input XMC/PMC with Xilinx Virtex -5 FPGA. Data Sheet

AD GSPS Analog Input XMC/PMC with Xilinx Virtex -5 FPGA. Data Sheet Data Sheet 3GSPS Analog Input XMC/PMC with Xilinx Virtex -5 FPGA Applications Electronic Warfare (EW) Spectral Analysis RADAR Features 3GSPS, 8-bit ADC Xilinx Virtex-5 SX95T FPGA (user programmable) Dual

More information

1G bit TCP Offload Engine SOC IP

1G bit TCP Offload Engine SOC IP Enterprise Class, Network Hardened TCP/UDP Acceleration Technology, Globally proven interoperability and rock solid reliability since 2009 All Stages of Full TCP Stack in hardware plus more advanced functionality

More information

QuiXilica V5 Architecture

QuiXilica V5 Architecture QuiXilica V5 Architecture: The High Performance Sensor I/O Processing Solution for the Latest Generation and Beyond Andrew Reddig President, CTO TEK Microsystems, Inc. Military sensor data processing applications

More information

FPGA Augmented ASICs: The Time Has Come

FPGA Augmented ASICs: The Time Has Come FPGA Augmented ASICs: The Time Has Come David Riddoch Steve Pope Copyright 2012 Solarflare Communications, Inc. All Rights Reserved. Hardware acceleration is Niche (With the obvious exception of graphics

More information

10 G bit TCP Offload Engine + PCIe/DMA SOC IP

10 G bit TCP Offload Engine + PCIe/DMA SOC IP Intilop Corporation 4800 Great America Pkwy Ste-231 Santa Clara, CA 95054 Ph: 408-496-0333 Fax:408-496-0444 www.intilop.com 10 G bit TCP Offload Engine + PCIe/DMA SOC IP INT 10012 (Very-Low Latency XTOE+PCIe+DMA+Host_I/F)

More information

Signal Conversion in a Modular Open Standard Form Factor. CASPER Workshop August 2017 Saeed Karamooz, VadaTech

Signal Conversion in a Modular Open Standard Form Factor. CASPER Workshop August 2017 Saeed Karamooz, VadaTech Signal Conversion in a Modular Open Standard Form Factor CASPER Workshop August 2017 Saeed Karamooz, VadaTech At VadaTech we are technology leaders First-to-market silicon Continuous innovation Open systems

More information

White Paper The Need for a High-Bandwidth Memory Architecture in Programmable Logic Devices

White Paper The Need for a High-Bandwidth Memory Architecture in Programmable Logic Devices Introduction White Paper The Need for a High-Bandwidth Memory Architecture in Programmable Logic Devices One of the challenges faced by engineers designing communications equipment is that memory devices

More information

Maximizing heterogeneous system performance with ARM interconnect and CCIX

Maximizing heterogeneous system performance with ARM interconnect and CCIX Maximizing heterogeneous system performance with ARM interconnect and CCIX Neil Parris, Director of product marketing Systems and software group, ARM Teratec June 2017 Intelligent flexible cloud to enable

More information

25G bit-1k Sess TCP+UDP Offload + Host_IF. IP Cores for FPGAs and SoCs

25G bit-1k Sess TCP+UDP Offload + Host_IF. IP Cores for FPGAs and SoCs Enterprise Class, Network Hardened TCP/UDP Acceleration Technology, Globally proven interoperability and rock solid reliability since 2009 All Stages of Full TCP Stack in hardware plus more advanced functionality

More information

XMC-RFSOC-A. XMC Module Xilinx Zynq UltraScale+ RFSOC. Overview. Key Features. Typical Applications. Advanced Information Subject To Change

XMC-RFSOC-A. XMC Module Xilinx Zynq UltraScale+ RFSOC. Overview. Key Features. Typical Applications. Advanced Information Subject To Change Advanced Information Subject To Change XMC-RFSOC-A XMC Module Xilinx Zynq UltraScale+ RFSOC Overview PanaTeQ s XMC-RFSOC-A is a XMC module based on the Zynq UltraScale+ RFSoC device from Xilinx. The Zynq

More information

A-GEAR 10Gigabit Ethernet Server Adapter X520 2xSFP+

A-GEAR 10Gigabit Ethernet Server Adapter X520 2xSFP+ Product Specification NIC-10G-2BF A-GEAR 10Gigabit Ethernet Server Adapter X520 2xSFP+ Apply Dual-port 10 Gigabit Fiber SFP+ server connections, These Server Adapters Provide Ultimate Flexibility and Scalability

More information

PE2G4SFPI35L Quad Port SFP Gigabit Ethernet PCI Express Server Adapter Intel i350am4 Based

PE2G4SFPI35L Quad Port SFP Gigabit Ethernet PCI Express Server Adapter Intel i350am4 Based PE2G4SFPI35L Quad Port SFP Gigabit Ethernet PCI Express Server Adapter Intel i350am4 Based Product Description Silicom s Quad Port SFP Gigabit Ethernet PCI Express Server adapter is PCI-Express X4 SFP

More information

PE2G4B19L Quad Port Copper Gigabit Ethernet PCI Express Server Adapter Broadcom BCM5719 Based

PE2G4B19L Quad Port Copper Gigabit Ethernet PCI Express Server Adapter Broadcom BCM5719 Based PE2G4B19L Quad Port Copper Gigabit Ethernet PCI Express Server Adapter Broadcom BCM5719 Based Product Description Silicom s Quad Port Copper Gigabit Ethernet PCI Express Server adapter is PCI-Express X4

More information

Strategies for Deploying RFSoC Technology for SIGINT, DRFM and Radar Applications. Rodger Hosking Pentek, Inc. WInnForum Webinar November 8, 2018

Strategies for Deploying RFSoC Technology for SIGINT, DRFM and Radar Applications. Rodger Hosking Pentek, Inc. WInnForum Webinar November 8, 2018 Strategies for Deploying RFSoC Technology for SIGINT, DRFM and Radar Applications Rodger Hosking Pentek, Inc. WInnForum Webinar November 8, 2018 1 Topics Xilinx RFSoC Overview Impact of Latency on Applications

More information

Jakub Cabal et al. CESNET

Jakub Cabal et al. CESNET CONFIGURABLE FPGA PACKET PARSER FOR TERABIT NETWORKS WITH GUARANTEED WIRE- SPEED THROUGHPUT Jakub Cabal et al. CESNET 2018/02/27 FPGA, Monterey, USA Packet parsing INTRODUCTION It is among basic operations

More information

10G bit-16k Sess TCP+UDP Offload Engine + MAC + Host_IF. IP Cores for FPGAs and SoCs

10G bit-16k Sess TCP+UDP Offload Engine + MAC + Host_IF. IP Cores for FPGAs and SoCs Enterprise Class, Network Hardened TCP/UDP Acceleration Technology, Globally proven interoperability and rock solid reliability since 2009 All Stages of Full TCP Stack in hardware plus more advanced functionality

More information

C870 Core i7 3U VPX SBC

C870 Core i7 3U VPX SBC C870 Core i7 3U VPX SBC Rugged 3U VPX Single-Slot SBC Core i7 @ 2.53/2.0/1.33 GHz Processor Two Cores/Four Threads (Intel Hyper-Threading Technology) Intel Virtualization Technology for Directed I/O (Intel

More information

The world s most reliable and mature full hardware ultra-low latency TCP, MAC and PCS IP Cores.

The world s most reliable and mature full hardware ultra-low latency TCP, MAC and PCS IP Cores. nxtcp Ultra-low latency TCP/IP + MAC + PCS IP core for FPGAs nxmac + nxpcs Ultra-low latency MAC + PCS IP core for FPGAs hardware acceleration exper ts Best-in-class ultra-low latency from wire to user

More information

2014 LENOVO INTERNAL. ALL RIGHTS RESERVED.

2014 LENOVO INTERNAL. ALL RIGHTS RESERVED. 2014 LENOVO INTERNAL. ALL RIGHTS RESERVED. Connectivity Categories and Selection Considerations NIC HBA CNA Primary Purpose Basic Ethernet Connectivity Connection to SAN/DAS Converged Network and SAN connectivity

More information

INT Gbit Ethernet MAC Engine

INT Gbit Ethernet MAC Engine intelop INT-10000 10-Gbit Ethernet MAC Product Brief, features and benefits summary Highly customizable hardware IP block. Easily portable to Structured ASIC flow, Custom ASICs/SoCs, Xilinx FPGAs INT-10000

More information

PCIe 10G SFP+ Network Card

PCIe 10G SFP+ Network Card PCIe 10G SFP+ Network Card User Manual Ver. 1.00 All brand names and trademarks are properties of their respective owners. Contents: Chapter 1: Introduction... 3 1.1 Product Introduction... 3 1.2 Features...

More information

XMC-ZU1. XMC Module Xilinx Zynq UltraScale+ MPSoC. Overview. Key Features. Typical Applications

XMC-ZU1. XMC Module Xilinx Zynq UltraScale+ MPSoC. Overview. Key Features. Typical Applications XMC-ZU1 XMC Module Xilinx Zynq UltraScale+ MPSoC Overview PanaTeQ s XMC-ZU1 is a XMC module based on the Zynq UltraScale+ MultiProcessor SoC device from Xilinx. The Zynq UltraScale+ integrates a Quad-core

More information

Avoid Bottlenecks Using PCI Express-Based Embedded Systems

Avoid Bottlenecks Using PCI Express-Based Embedded Systems Avoid Bottlenecks Using PCI Express-Based Embedded Systems Implementing efficient data movement is a critical element in high-performance embedded systems, and the advent of PCI Express has presented us

More information

Embedded Tech Trends 2014 Rodger H. Hosking Pentek, Inc. VPX for Rugged, Conduction-Cooled Software Radio Virtex-7 Applications

Embedded Tech Trends 2014 Rodger H. Hosking Pentek, Inc. VPX for Rugged, Conduction-Cooled Software Radio Virtex-7 Applications Embedded Tech Trends 2014 Rodger H. Hosking Pentek, Inc. VPX for Rugged, Conduction-Cooled Software Radio Virtex-7 Applications System Essentials: Rugged Software Radio Industry Standard Open Architectures

More information

Rapid Platform Deployment: Allows clients to concentrate their efforts on application software.

Rapid Platform Deployment: Allows clients to concentrate their efforts on application software. Overview Aliathon Ltd. in partnership with Nallatech brings to market a demo design based on the Universal Network Probe technology described in Aliathon Application Note 06. This design demonstrate the

More information

Design of Scalable Network Considering Diameter and Cable Delay

Design of Scalable Network Considering Diameter and Cable Delay Tohoku Design of Scalable etwork Considering Diameter and Cable Delay Kentaro Sano Tohoku University, JAPA Agenda Introduction Assumption Preliminary evaluation & candidate networks Cable length and delay

More information

ARINC 818 on Copper The Successor to HOTLink II Video Links? A White Paper by Jon Alexander

ARINC 818 on Copper The Successor to HOTLink II Video Links? A White Paper by Jon Alexander ARINC 818 on Copper The Successor to HOTLink II Video Links? A White Paper by Jon Alexander GRT s new Matrix ARINC 818 card with High Speed Coax (HSC) Common RG59 coaxial cable with DIN 1.0 / 2.3 connector

More information

MIL-STD-1553 (T4240/T4160/T4080) 12/8/4 2 PMC/XMC 2.0 WWDT, ETR, RTC, 4 GB DDR3

MIL-STD-1553 (T4240/T4160/T4080) 12/8/4 2 PMC/XMC 2.0 WWDT, ETR, RTC, 4 GB DDR3 C11 Rugged 6U VPX Single-Slot SBC Freescale QorIQ Multicore SOC 1/8/4 e6500 Dual Thread Cores (T440/T4160/T4080) Altivec Unit Secure Boot and Trust Architecture.0 4 GB DDR3 with ECC 56 MB NOR Flash Memory

More information

New! New! New! New! New!

New! New! New! New! New! New! New! New! New! New! Model 3320 Features Sold as the: FlexorSet Model 5973-320 FlexorSet Model 7070-320 Supports Xilinx Virtex-7 VXT s GateXpress supports dynamic reconfiguration across Two 3.0 GHz*

More information

Schematic. A: Overview of the Integrated Detector Readout Electronics and DAQ-System. optical Gbit link. 1GB DDR Ram.

Schematic. A: Overview of the Integrated Detector Readout Electronics and DAQ-System. optical Gbit link. 1GB DDR Ram. A: Overview of the Integrated Detector Readout Electronics and DAQ-System N s CASCADE Detector Frontend (X0) (X) (Y0) (Y) optional: CIPix- Board (T) Optical Gigabit Link CDR.0 FPGA based readout board

More information

New Initiatives and Technologies Brighten Embedded Software Radio

New Initiatives and Technologies Brighten Embedded Software Radio New Initiatives and Technologies Brighten Embedded Software Radio Embedded Tech Trends January 2018 Rodger Hosking Pentek, Inc. Sensor Open System Architecture (SOSA) Consortium of Air Force, Navy, Army,

More information

6.9. Communicating to the Outside World: Cluster Networking

6.9. Communicating to the Outside World: Cluster Networking 6.9 Communicating to the Outside World: Cluster Networking This online section describes the networking hardware and software used to connect the nodes of cluster together. As there are whole books and

More information

FPGAs and Networking

FPGAs and Networking FPGAs and Networking Marc Kelly & Richard Hughes-Jones University of Manchester 12th July 27 1 Overview of Work Looking into the usage of FPGA's to directly connect to Ethernet for DAQ readout purposes.

More information

C912 Freescale QorIQ T4 3U VPX SBC

C912 Freescale QorIQ T4 3U VPX SBC Freescale QorIQ T4 3U VPX SBC Rugged 3U VPX Single-Slot SBC Freescale QorIQ Multicore SOC Processor 8/4 e6500 Dual Thread Cores (T4160/T4080) AltiVec Unit Memory Resources 4 GB DDR3 @ 1600 MT/s with ECC,

More information

Gate Estimate. Practical (60% util)* (1000's) Max (100% util)* (1000's)

Gate Estimate. Practical (60% util)* (1000's) Max (100% util)* (1000's) The Product Brief October 07 Ver. 1.3 Group DN9000K10PCIe-4GL XilinxVirtex-5 Based ASIC Prototyping Engine, 4-lane PCI Express (Genesys Logic PHYs) Features PCI Express (4-lane) logic prototyping system

More information

Compute Node Design for DAQ and Trigger Subsystem in Giessen. Justus Liebig University in Giessen

Compute Node Design for DAQ and Trigger Subsystem in Giessen. Justus Liebig University in Giessen Compute Node Design for DAQ and Trigger Subsystem in Giessen Justus Liebig University in Giessen Outline Design goals Current work in Giessen Hardware Software Future work Justus Liebig University in Giessen,

More information

Programmable Logic Design Grzegorz Budzyń Lecture. 15: Advanced hardware in FPGA structures

Programmable Logic Design Grzegorz Budzyń Lecture. 15: Advanced hardware in FPGA structures Programmable Logic Design Grzegorz Budzyń Lecture 15: Advanced hardware in FPGA structures Plan Introduction PowerPC block RocketIO Introduction Introduction The larger the logical chip, the more additional

More information

C802 Core i7 3U CompactPCI SBC

C802 Core i7 3U CompactPCI SBC C802 Core i7 3U CompactPCI SBC Rugged 3U CompactPCI Single-Slot SBC Core i7 @ 2.53/2.0/1.33 GHz Processor Two Cores/Four Threads (Intel Hyper-Threading Technology) Intel Virtualization Technology for Directed

More information

PE310G4TSF4I71 Quad Port SFP+ 10 Gigabit Ethernet PCI Express Time Stamp Server Adapter Intel Based

PE310G4TSF4I71 Quad Port SFP+ 10 Gigabit Ethernet PCI Express Time Stamp Server Adapter Intel Based PE310G4TSF4I71 Quad Port SFP+ 10 Gigabit Ethernet PCI Express Time Stamp Server Adapter Intel Based Product Description Silicom s 40 Gigabit Ethernet PCI Express Time Stamping server adapter is designed

More information

Ensemble 6000 Series OpenVPX HCD6210 Dual QorIQ T4240 Processing Module

Ensemble 6000 Series OpenVPX HCD6210 Dual QorIQ T4240 Processing Module Ensemble 6000 Series OpenVPX HCD6210 Dual QorIQ T4240 Processing Module Next-Generation High Density Processing With I/O in a Single VPX slot OpenVPX The Ensemble 6000 Series OpenVPX HCD6210 High Compute

More information

PE2G6SFPI35 Six Port SFP Gigabit Ethernet PCI Express Server Adapter Intel i350am4 Based

PE2G6SFPI35 Six Port SFP Gigabit Ethernet PCI Express Server Adapter Intel i350am4 Based PE2G6SFPI35 Six Port SFP Gigabit Ethernet PCI Express Server Adapter Intel i350am4 Based Product Description Silicom s Six Port SFP Gigabit Ethernet PCI Express Server adapter is PCI-Express X8 network

More information

System-on-a-Programmable-Chip (SOPC) Development Board

System-on-a-Programmable-Chip (SOPC) Development Board System-on-a-Programmable-Chip (SOPC) Development Board Solution Brief 47 March 2000, ver. 1 Target Applications: Embedded microprocessor-based solutions Family: APEX TM 20K Ordering Code: SOPC-BOARD/A4E

More information

Design and Verification of FPGA Applications

Design and Verification of FPGA Applications Design and Verification of FPGA Applications Giuseppe Ridinò Paola Vallauri MathWorks giuseppe.ridino@mathworks.it paola.vallauri@mathworks.it Torino, 19 Maggio 2016, INAF 2016 The MathWorks, Inc. 1 Agenda

More information

FM680 User Manual V1.4 FM680. User Manual for Virtex-6 XMC card

FM680 User Manual V1.4 FM680. User Manual for Virtex-6 XMC card FM680 User Manual for Virtex-6 XMC card 4DSP LLC, 955 S Virginia Street, Suite 214, Reno, NV 89502, USA 4DSP BV,Ondernemingsweg 66f, 2404 HN, Alphen a/d Rijn, Netherlands Email: support@4dsp.com This document

More information

MIL-STD-1553 (T4240/T4160/T4080) 12/8/4 2 PMC/XMC 2.0 WWDT, ETR, RTC, 4 GB DDR3

MIL-STD-1553 (T4240/T4160/T4080) 12/8/4 2 PMC/XMC 2.0 WWDT, ETR, RTC, 4 GB DDR3 Rugged 6U VME Single-Slot SBC Freescale QorIQ Multicore SOC 1/8/4 e6500 Dual Thread Cores (T440/T4160/T4080) Altivec Unit Secure Boot and Trust Architecture.0 4 GB DDR3 with ECC 56 MB NOR Flash Memory

More information

Towards a new Timing System for Particle Accelerators

Towards a new Timing System for Particle Accelerators Towards a new Timing System for Particle Accelerators Overview of the work of the project interest group Patrick Loschmidt Austrian Academy of Sciences Intention Introduce you to the GMT renovation project

More information

Introduction to TCP/IP Offload Engine (TOE)

Introduction to TCP/IP Offload Engine (TOE) Introduction to TCP/IP Offload Engine (TOE) Version 1.0, April 2002 Authored By: Eric Yeh, Hewlett Packard Herman Chao, QLogic Corp. Venu Mannem, Adaptec, Inc. Joe Gervais, Alacritech Bradley Booth, Intel

More information

nxtcp Standard Edition 25G/10G/1G TCP/IP + MAC IP Core for FPGAs nxudp Standard Edition 25G/10G/1G UDP/IP + MAC IP Core for FPGAs

nxtcp Standard Edition 25G/10G/1G TCP/IP + MAC IP Core for FPGAs nxudp Standard Edition 25G/10G/1G UDP/IP + MAC IP Core for FPGAs nxtcp Standard Edition TCP/IP + MAC IP Core for FPGAs nxudp Standard Edition UDP/IP + MAC IP Core for FPGAs hardware acceleration experts Retransmission buffer (Internal/External Memory) FPGA nxtcp / nxudp

More information

H.264 AVC 4k Decoder V.1.0, 2014

H.264 AVC 4k Decoder V.1.0, 2014 SOC H.264 AVC 4k Video Decoder Datasheet System-On-Chip (SOC) Technologies 1. Key Features 1. Profile: High profile 2. Resolution: 4k (3840x2160) 3. Frame Rate: up to 60fps 4. Chroma Format: 4:2:0 or 4:2:2

More information

Ethernet Switch. WAN Gateway. Figure 1: Switched LAN Example

Ethernet Switch. WAN Gateway. Figure 1: Switched LAN Example 1 Introduction An Ethernet switch is used to interconnect a number of Ethernet LANs (Local Area Networks), forming a large Ethernet network. Different ports of the switch are connected to different LAN

More information

N V M e o v e r F a b r i c s -

N V M e o v e r F a b r i c s - N V M e o v e r F a b r i c s - H i g h p e r f o r m a n c e S S D s n e t w o r k e d f o r c o m p o s a b l e i n f r a s t r u c t u r e Rob Davis, VP Storage Technology, Mellanox OCP Evolution Server

More information

The Jade Family. Form Factors. The Jade Architecture. Synchronization. Ruggedization. Pentek, Inc.

The Jade Family. Form Factors. The Jade Architecture. Synchronization. Ruggedization. Pentek, Inc. The Jade Family The Jade TM family is the latest board family from Pentek. Based on the Xilinx Kintex UltraScale FPGAs, it complements the Cobalt and Onyx families with a new set of board-level products

More information

Nutaq μdigitizer FPGA-based, multichannel, high-speed DAQ solutions PRODUCT SHEET

Nutaq μdigitizer FPGA-based, multichannel, high-speed DAQ solutions PRODUCT SHEET Nutaq μdigitizer FPGA-based, multichannel, high-speed DAQ solutions PRODUCT SHEET QUEBEC I MONTREAL I NEW YORK I nutaq.com Nutaq μdigitizer Supports a wide variety of high-speed I/O A/D and D/A converters

More information

An Intelligent NIC Design Xin Song

An Intelligent NIC Design Xin Song 2nd International Conference on Advances in Mechanical Engineering and Industrial Informatics (AMEII 2016) An Intelligent NIC Design Xin Song School of Electronic and Information Engineering Tianjin Vocational

More information

CEC 450 Real-Time Systems

CEC 450 Real-Time Systems CEC 450 Real-Time Systems Lecture 9 Device Interfaces October 20, 2015 Sam Siewert This Week Exam 1 86.4 Ave, 4.93 Std Dev, 91 High Solutions Posted on Canvas Questions? Monday Went Over in Class Assignment

More information

Implementing Ultra Low Latency Data Center Services with Programmable Logic

Implementing Ultra Low Latency Data Center Services with Programmable Logic Implementing Ultra Low Latency Data Center Services with Programmable Logic John W. Lockwood, CEO: Algo-Logic Systems, Inc. http://algo-logic.com Solutions@Algo-Logic.com (408) 707-3740 2255-D Martin Ave.,

More information

LightSpeed1000 (w/ GigE and USB 2.0) OC-3/STM-1, OC-12/STM-4 Analysis and Emulation Card

LightSpeed1000 (w/ GigE and USB 2.0) OC-3/STM-1, OC-12/STM-4 Analysis and Emulation Card Wirespeed Record/Playback/ Processing of ATM, PoS, RAW, and Ethernet Traffic LightSpeed1000 (w/ GigE and USB 2.0) OC-3/STM-1, OC-12/STM-4 Analysis and Emulation Card x4 PCIExpress, USB 2.0, and Gigabit

More information

C H A P T E R GIGABIT ETHERNET PROTOCOL

C H A P T E R GIGABIT ETHERNET PROTOCOL C H A P T E R GIGABIT ETHERNET PROTOCOL 2 39 2.1 Objectives of Research Ethernet protocol has been a robust and dominant technology and it is found to be present on more than 90 percent of all networked

More information