Virtual Memory. User memory model so far:! In reality they share the same memory space! Separate Instruction and Data memory!!

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Allison Austin
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1 Virtual Memory User memory model so far:! Separate Instruction and Data memory!! In reality they share the same memory space!!! 0x User space Instruction memory 0x7fffffff Data memory MicroComuter Engineering VirtualMemory slide 1!

2 Virtual to Physical Address Mapping 0x User space Instruction and Data 2 GB Virtual address Physical address Physical memory 0x7fffffff Virtual memory 2 GB, HUGE amount Physical memory only 16 MB MicroComuter Engineering VirtualMemory slide 2!

3 Address Mapping CP0 MIPS PIPELINE 32 Instr Data Arbiter 32-bit Virtual Address bit Physical Address Physical memory 16 Mb MicroComuter Engineering VirtualMemory slide 3!

4 User 1 2 GB Page 0 Virtual Address Virtual Address 32-bit Page 1. Page x Selects Page # x Page x 1024 Bytes Offset within page #x Page n 22 2 Pages 10 2 Addresses MicroComuter Engineering VirtualMemory slide 4!

5 Virtual Address 2 GB Page 0 Page 1. Page x Page n Virtual Memory Not Allocated Yet Primary Memory Physical memory 16 MB Page x Page 1 Secondary Storage Hard Disk 2 GB Page 0 MicroComuter Engineering VirtualMemory slide 5!

6 Memory Resident Pages Only very few pages are RESIDENT in physical! Virtual 32-bit Address 31 Selects Page # x Offset Address Translation of page #x Physical 24-bit Address MicroComuter Engineering VirtualMemory slide 6!

7 Page Fault What about a NON RESIDENT page?! We know the Virtual Address, but:! No Physical Address, since the page is on Hard Disk (SWAPPED)!! What about a not allocated page! We know the Virtual Address, but:! We try to access a Virtual Address that we have not (yet) access to, that is an ERROR!! In both cases we get a PAGE FAULT! MicroComuter Engineering VirtualMemory slide 7!

8 Virtual Address 2 GB Page Resident Page Table Physical Memory Page x Page x. Y Physical Addr [23:10] Hard Disk Page y N Place on Hard Disk Page y For Non Resident Pages we get a PAGE FAULT MicroComuter Engineering VirtualMemory slide 8!

9 Virtual Address 2 Gb Resident Swapping Physical Memory. Page y Page y Y Physical Addr [23:10] Place on Hard Disk Secondary Storage Page y The OS copies Page y to physical memory and restarts the failing user instruction MicroComuter Engineering VirtualMemory slide 9!

10 Page Fault and the OS A Page Fault is handled by the Kernel (OS)! 1) If physical memory not full! Copy the page from hard disk to a empty page X in physical memory! Update the Page Table, Resident = YES, Physical Addr [23:10]=X! Restart the failing instruction in the user program! 2) If physical memory full! Choose one page X from physical memory, store it on hard disk at XX! Update the Page Table (X), Resident = NO, place on HD = XX! Proceed with 1)!! What if page X is unchanged (only read operations), skip storing to hard disk, just set Resident = NO! MicroComuter Engineering VirtualMemory slide 10!

11 Multiple User Processes Virtual memory n * 2 Gb 0x x7fffffff 0x x7fffffff User 1 User 2. Virtual address Page Table 1 Page Table 2 Physical address HD address 16 Mbyte User n User 1 0x x7fffffff User n Page Table n User n User 1 User 2 User 1 User 2 MicroComuter Engineering VirtualMemory slide 11!

12 Where do we store the Page Tables? We store the Page Tables in Kernel memory! Protected from User access!! Dirty Resident 16 Mbyte User Memory 22 2 entries huge array! D R Physical Addr [23:10] Place on Hard Disk Store only allocated pages Kernel Memory Page Table Page Table 1 Page Table 2 n MicroComuter Engineering VirtualMemory slide 12!

13 Address Mapping CP0 MIPS PIPELINE User Memory 32 Instr Data bit Virtual Address 24-bit Physical Address User process 2 running Here we need page table 2 for address mapping Kernel Memory Page Table Page Table 1 Page Table 2 n MicroComuter Engineering VirtualMemory slide 13!

14 Translation Lookaside Buffer (TLB) CP0 MIPS PIPELINE On TLB hit, the 32-bit virtual address is translated into a 24-bit physical address by hardware User Memory We never call the Kernel! Virtual Address D R Physical Addr [23:10] 24 Kernel Memory Page Table Page Table 1 Page Table 2 n MicroComuter Engineering VirtualMemory slide 14!

15 Memory Hierarchy Hardware is FAST but EXPENSIVE 14 No need to use more than 2 entries STILL TO BIG! Make is smaller Mb = 2 pages User Memory Valid bit V 22-bit Page # Select a subset of the Page Table and store it in the TLB D Physical Addr [23:10] 24 Kernel Memory Page Table 2 MicroComuter Engineering VirtualMemory slide 15!

16 Address Translation A TLB hit, we get a physical address! The Page # found in TLB and Valid entry (V-bit)! If a Write operation, set Dirty (D-bit)! A TLB miss, causes a TLB miss exception! If Page NOT Resident in Physical memory,! Page Fault and the OS slide! if page X is swapped to hard disk and X in TLB, clear V bit! If Page Resident in Physical memory! Find a free TLB entry and update it! 1) 22-bit Page #, set V-bit, clear D-bit, 14-bit physical address! If TLB full, chose a TLB entry! if D-bit, update Page Table Dirty bit, proceed with 1)! MicroComuter Engineering VirtualMemory slide 16!

17 TLB control CP0 MIPS PIPELINE Control Signals TLB MISS R/W Page Table Data bus 32 Virtual Addr MicroComuter Engineering VirtualMemory slide 17!

Translation Buffers (TLB s)

Translation Buffers (TLB s) To perform virtual to physical address translation we need to look-up a page table Since page table is in memory, need to access memory Much too time consuming; 20 cycles or