Type-C application using PI3USB30532 and PI3USB31532 By Paul Li. Table of Content
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1 Type-C application using PI3USB3053 and PI3USB353 By Paul Li Table of Content.0 Introduction.0 Why passive MUX (PI3USB3X53) is better than active MUX in notebook design? 3.0 PI3USB3X53 in source-host: Notebook, tablet, AIO and desktop PC 4.0 What are the recommended maximum traces for PI3USB3X53 in Intel notebook design? 5.0 PI3USB3X53 in sink-device: Monitor and HDTV 6.0 PI3USB3X53 in sink-device: Docking station 7.0 The IC control of PI3USB3X Power and power de-coupling 9.0 Layout guideline 0.0 Appendix: application Reference Schematics Page of 8 ANXXX 7//06
2 .0 Introduction The PI3USB3053, PI3USB353 type-c cross switch family is developed using cutting-edge technology to achieve high performance of DP., DP.3, USB 3.0, USB 3. signals in type-c applications. PI3USB3X53 is fully compliant to type- C specifications. PI3USB3X53 was first to the market and successfully designed in many and various applications, such as notebook, tablet, AIO, PC, monitor, HDTV, docking stations, etc. PI3USB3X53 was also designed in Intel reference schematic and designed in Intel customer reference demonstration tablet..0 Why passive MUX (PI3USB3X53) is better than active MUX in notebook design? The market requests notebooks: Running for 6-8 hours in battery operation Boot-up after power-off for 6-8 days Intel mobile CPU/chipset can now achieve 6W power consumption, thus: The ~0.4W to ~0.6W power consumption from an active MUX is way too high and not reasonable. Especially when compared to the <0.003W power consumption from PI3USB3X53, which is a 99% power saving compared to an active MUX. 3.0 PI3USB3X53 in source-host: Notebook, tablet, AIO and desktop PC Figure, PI3USB3053, PI3USB353 in notebook, tablet all-in-one and desktop PC Page of 8 ANXXX 7//06
3 4.0 What are the recommended maximum traces for PI3USB3X53 in Intel notebook design? 4. DP., DP.3 In Intel Kabylake design guideline, Intel recommends maximum 8 DP. trace without passive MUX and 4. with passive MUX as to pass DP. compliance test. Intel deducted 3.9 trace from the 8 DP. trace for the passive MUX, which is conservative for a high performance passive MUX such as PI3USB3X53, as explained in figure, figure 3a, figure 3b and in table- below. Based on the PI3USB3053 DP. eye compliance test results in figure 3a and figure 3b, as well the trace data in figure and table-, it is recommended as below. Maximum 6. trace for DP. (5.4Gbps) path, as: Intel DP. source PI3USB3X53 type-c connector Maximum 4.0 trace for DP.3 (8Gbps) path, as: Intel DP.3 source PI3USB353 type-c connector (Assuming the layout and schematics are as recommended as using 90ohm traces without chokes, etc., and in reasonable system conditions) 4. USB3.0, USB3. Based on the PI3USB3053 USB 3.0 eye compliance test results in figure 4a and figure 4b, as well the trace data in figure and table-, it is recommended as below. Maximum 8.5 trace for USB3.0 (5Gbps) path, as: USB3.0 host PI3USB3X53 type-c connector Maximum 4.5 trace for USB3. (0Gbps) path, as: USB3. host PI3USB353 type-c connector (Assuming the layout and schematics are as recommended below and in reasonable system conditions) Table the insertion loss of PI3USB3X53 versus Intel trace board Insertion loss of 3 Per inch PI3USB3053 PI3USB353 trace on Intel trace board 3053: Insertion loss 353: Insertion loss 3053: equivalent trace length (loss of 3053/ trace) 3053: goodmax DP. trace in Intel 8 trace topology 353: equivalent trace length (loss of 353/ trace) 353: goodmax DP. trace in Intel 8 trace topology NA Insertion loss at 5Gbps (USB3.0) -.db -0.70db -.db.7 (.db/0.70db) NA -.06db.5 (.06db/0.70db) Insertion loss at -.3db -0.77db -.3db db Gbps (DP.) (.3db/0.77db) ( ) (.3db/0.77db) ( ) Insertion loss at -3.db -.07db NA NA NA -.63db.5 NA 8Gbps (DP.3) (.63db/.07db) Insertion loss at -3.96db -.3db NA NA NA -.68db.7 NA 0Gbps (USB3.) (.68db/.3db) Table the insertion loss of the 3 FR4 differential trace was measured using Intel trace board and Agilent N530A 0GHz Network Analyzer, as setup in figure-. Note: The data above is not linear, because the performances vary with different switch-routings and signal-types between PI3USB3053 and PI3USB353, while PI3USB353 has better performance than PI3USB3053 mostly at higher speed. NA is for not applicable. Page 3 of 8 ANXXX 7//06
4 4.3 The insertion loss of 3 differential trace on Intel trace board Figure the insertion loss of 3 FR4 differential trace on Intel trace board is measured using Agilent N530A 0GHz Network Analyzer (chart by James Liu) 4.4 The PI3USB3053 Intel Haswell MB DP. eye compliance test result Page 4 of 8 ANXXX 7//06
5 Figure 3a the eye of DP. (5.4Gbps) compliance test using PI3USB3053 setup (figure 3b) with Asus H97i-plus MB (Intel Haswell) and 7 trace passed the DP. HBR compliance test 3. using Tektronix scope at 400mV, 3.5db pre-emphasis. The upper waveform is at T3 with emulation cable in scope. The lower waveform is at T without emulation cable (waveform by Jerry Chou). Page 5 of 8 ANXXX 7//06
6 4.5 The test setup of 4.4 Figure 3b the test setup of PI3USB3053 with 7 trace ( ) using Intel Haswell DP. source passed DP. (5.4Gbps) eye compliance test 3. as in figure 3a Page 6 of 8 ANXXX 7//06
7 Figure 4a the Tx and Rx eyes passed the USB 3.0 (5Gbps) compliance test at the USB 3.0 connector of notebook (Intel Haswell) without PI3USB3053 EV board. To be compared to figure 4b with PI3USB3053 EVB (waveform by Jerry Chou) Page 7 of 8 ANXXX 7//06
8 Figure 4b the Tx and Rx eyes passed USB 3.0 (5Gbps) compliance test with 0. trace ( ) using notebook (Intel Haswell) and PI3USB3053 EV board. To be compared to figure 4a without PI3USB3053 EV board (waveform by Jerry Chou). Page 8 of 8 ANXXX 7//06
9 5.0 PI3USB3X53 in sink-device: Monitor and HDTV Figure 5, PI3USB3053, PI3USB353 in monitor and HDTV No active DP re-driver and USB3.0 re-driver needed in type-c MUX (PI3USB3053) or between the switches in cascading (PI3USB3053, PI3WVR4, PI3PCIE34). o Because there are sufficient total source and sink equalization, as: Up to 9db output pre-emphasis (equalization) in DP source and USB3.0 Tx Up to 9db input equalization in DP scalar and USB3.0 Rx receiver. o The total 8db equalization in source and sink is sufficient to compensate the estimated total insertion loss from the topology in figure 5: Max 7.7db from total 0 traces Max 4db from m type-cable Max.5db from PI3USEB3053 Max.5db from PI3WVR4 or PI3PCIE34 Page 9 of 8 ANXXX 7//06
10 6.0 PI3USB3X53 in sink-device: Docking station Figure 6, PI3USB3053, PI3USB353 in docking station 7.0 The IC control of PI3USB3X53 PI3USB3X53 has total three IC registers as Conf [:0], which is mapped between the IC control signals and the configuration tables (source, sink) as in figure-7. When using IC interface to control PI3USB3X53, the IC controller (in PD or MCU) will need sending total three bytes to PI3USB3053 in sequence as: Start # byte for address as (assuming A_A0 set to 00, while last 0 for write) # byte for chip-id as fixed #3 byte for Conf [:0] control as (assuming Conf [:0]= as for USB3+DPx swapped) Stop (must have stop, otherwise uncertainty may occur) Page 0 of 8 ANXXX 7//06
11 Figure 7, The IC-control of the configuration table for source-sink (source-sink tables are the same) IC-controls PI3USB3053 in real application For both source and sink applications, when a type-c plug is plugging into the source or sink type-c connectors with PI3USB3053 and PD, the IC controller (in PD or MCU) shall IC-control PI3USB3053 as: DPx4 only, non-swap: Start (last 0 for write) stop DPx4 only, swapped: Start stop USB3.0 only, non-swap: Start stop USB3.0 only, swapped: Start stop USB3+DPx, non-swap: Start stop USB3+DPx, swapped: Start stop Page of 8 ANXXX 7//06
12 8.0 Power and power de-coupling Use 0.uf in size of 040 for all the Vdd (any power pins) pins of the IC device, as close to the Vdd pins as possible, within -3mm if feasible. Use dedicated Vdd and planes for to minimize the jitters coupled between channel trough power sources. 9.0 Layout guideline 9. Recommend 90 ohm differential impedance trace for differential DP and USB 3.0 signals Figure 8, the trace width and clearance Use mils for trace-space-trace for the micro-strip lines (the traces on top and bottom layers) for 90 ohm differential impedance. Use mils for trace-space-trace for the strip-lines (the traces inside layers) for 90 ohm differential impedance. Use FR4. Using standard 4 to 8 layers stack-up with 0.06 inch thick PCB. For micro-strip lines, using ½ OZ Cu plated is ok. For strip-lines in 6 plus players, using OZ Cu is better. The trace length miss-matching shall be less than 5 mils for the + and traces in the same pairs More pair-to-pair spacing for minimal crosstalk Target differential Zo of 90 ohm ±5% Page of 8 ANXXX 7//06
13 9. The PCB Layers Stackup No new PCB technology required. Use FR4 is fine. Using standard 4 to 8 layers stack-up with 0.06 inch thick PCB. For micro strip lines, using ½ OZ Cu plated is ok. For strip line in 6 plus players, using OZ Cu is better. Figure 9, the stackup Stack-up Plane Material Thickness (mil) Solder mask Mask paint. Signal Copper.9 Prepreg Vcc Copper.4 Core 47 Vss Copper.4 Prepreg Signal Copper.9 Solder mask Mask paint. Total The Layout Guidance for the Trace Routings Page 3 of 8 ANXXX 7//06
14 Figure 0, The layout guidance for the trace routings Don t use EMI chokes, because PI3USB3053 and PI3USB353 are passive switches not having EMI issues. The differential traces shall be away from the strong EMI source and devices, such as TTL, switching-power traces and devices, with at least 30mil to 50mil space. No other components shall piggy ride on the differential traces. 0 Appendix: application Reference Schematics Page 4 of 8 ANXXX 7//06
15 RX+/TX+ RX-/TX- AUX+ AUX- P CONF0/A CONF/SCL CONF/SDA DP0+ DP # C7 6-C8 3 a re "mus t h ave " to pr eve nt n on- DP c omp lia nt 3. 3V s ign als fro m p lug -in as rea l-se en- case. C67 0u 0.u C68 0.u C69 0.u C70 C7 0.u 0.u C7 0.u C73 0.u C74 R53 NC R56 4.7K CONF/SDA CONF/SCL CONF0/A R54 NC (for IC) R55 NC (for IC) Vbus control Source charging circuit No -cho kes be twee n an d t ype -C c onn ecto r, bec ause is a p assi ve swi tch wit hou t EM I i ssue. Use 0.uf if output swing >.V or using re-drivers DP source D0+ D0- D3+ AUX- D3- AUX+ R57 0 R58 0 R59 0 R60 0 R6 0 R6 0 R63 0 R64 0 C84 0.u C85 0.u ADDR MODE DP+ DP- DP+ DP- DP3+ DP3- TX+/RX+ TX-/RX- A0 U RX+/TX+ RX-/TX- TX+/RX+ TX-/RX- TX+/RX+ TX-/RX- RX+/TX+ RX-/TX- SBU/SBU SBU/SBU PI3USB C76 0.u C77 0.u C78 0.u C79 0.u C80 0.u C8 0.u C8 0.u C83 0.u RX+ RX- TX+ TX- TX+ TX- RX+ RX- 00uf C75 B A B A B3 A0 B4 A9 B5 A8 B6 A7 B7 A6 B8 A5 B9 A4 B0 A3 B A B A J6 TX+ RX+ TX- RX- CC SBU SBU CC RX- TX- RX+ TX+ USB3 controller TX+ C86 0.u TX- C87 0.u RX+ RX- R67 00K R68 00K R65 M R66 M Type-C Recep. KUSB-8-A-P ST, USB /- RX+ RX- TX+ TX- TVS CONF/ SDA CONF/ SCL CONF0/ A See source truth table for the control of CONF[:0] PD controller Vbus control CC CC TX+ TX- RX+ RX- TVS PI3USB3053 reference schematic for source application Contact Diodes local sales for TVS PI3USB3053 DFP-source reference schematic for type-c PD/DP/ALT application Page 5 of 8 ANXXX 7//06
16 RX+/TX+ RX-/TX- AUX+ AUX- P CONF0/A CONF/SCL CONF/SDA DP0+ DP # C5 5-C6, C63 are "m ust hav e" to prev ent no n-dp co mpl iant 3. 3V si gnal s f rom plu g-i n a s re al- see n-ca se. C46 0u 0.u C47 0.u C48 0.u C49 C50 0.u 0.u C5 0.u C5 0.u R45 C53 NC R48 4.7K CONF/SDA CONF/SCL CONF0/A R46 NC (for IC) R47 NC (for IC) Vbus control Sink charging circuit No -cho kes be twee n an d t ype -C c onn ect or, bec aus e is a p assi ve swi tch wit hou t EM I i ssu e. DP receiver D0+ D0- D3+ D3- AUX+ AUX- ADDR0 3 MODE DP+ DP- U RX+/TX+ RX-/TX- TX+/RX+ TX-/RX- TX+/RX+ TX-/RX- RX+/TX+ RX-/TX- PI3USB3053 C55 0.uTX+ C56 0.u TX- C57 0.u RX+ 4 C58 0.u RX- 5 6 DP+ C59 0.u RX+ 7 DP- 8 C60 0.u RX- 9 DP3+ 0 DP3- C6 0.u TX+ C6 0.u TX+/RX+ 3 C63 0.u TX- 3 TX-/RX- C64 0.u 4 SBU/SBU A0 SBU/SBU uf C54 B A B A B3 A0 B4 A9 B5 A8 B6 A7 B7 A6 B8 A5 B9 A4 B0 A3 B A B A J5 TX+ RX+ TX- RX- CC SBU SBU CC RX- TX- RX+ TX+ USB3 controller R5 M R5 M R49 M R50 M Type-C Recep. KUSB-8-A-P ST, TX+ C65 0.u TX- C66 0.u RX+ RX- USB /- TX+ TX- RX+ RX- TVS CONF/ SDA CONF/ SCL CONF0/ A See sink truth table for the control of CONF[:0] PD controller Vbus control PI3USB3053 reference schematic for sink application CC CC RX+ RX- TVS TX+ TX- Contact Diodes local sales for TVS PI3USB3053 UFP-sink reference schematic for type-c PD/DP/ALT application Page 6 of 8 ANXXX 7//06
17 RX+/TX+ RX-/TX- AUX+ AUX- P CONF0/A CONF/SCL CONF/SDA DP0+ DP # C 8-C 5 are "m ust hav e" t o p reve nt non- DP comp lia nt 3.3V si gnal s f rom plu g-in as rea l-s een- cas e. C09 0u 0.u C0 0.u C 0.u CC3 0.u 0.u C4 0.u C5 0.u R77 C6 NC R80 4.7K CONF/SDA CONF/SCL CONF0/A R78 NC (for IC) R79 NC (for IC) Vbus control Source charging circuit No -cho kes bet wee n 3 53 and ty pe-c co nnec tor, be cau se 3 53 is a pa ssi ve s wit ch w ith out EMI iss ue. Use 0.uf if output swing >.V or using re-drivers DP source USB3 controller D0+ D3+ AUX+ R8 0 R8 0 R83 0 R84 0 R85 0 R86 0 R87 0 R88 0 C60.u C70.u R380 NC TX+ C80.u AUX- TX- C90.u RX+ RX- R38 70K ADDR MODE DP+ DP- DP+ DP- DP3+ DP3- TX+/RX+ TX-/RX- MODE A0 U RX+/TX+ RX-/TX- TX+/RX+ TX-/RX- TX+/RX+ TX-/RX- RX+/TX+ RX-/TX- SBU/SBU SBU/SBU PI3USB353 R9 00K R9 00K C80.u C90.u C00.u C0.u C0.u C30.u C40.u C50.u R89 M RX+ RX- TX+ TX- TX+ RX+ R90 M 00uf C7 B A B A B3 A0 B4 A9 B5 A8 B6 A7 B7 A6 B8 A5 B9 A4 B0 A3 B A B A J8 TX- RX- D0- D3- TX+ RX+ TX- RX- CC SBU SBU CC RX- TX- RX+ TX+ Type-C Recep. KUSB-8-A-P ST, USB /- RX+ RX- TX+ TX- TVS CONF/ SDA CONF/ SCL CONF0/ A See source truth table for the control of CONF[:0] PD controller Vbus control CC CC TX+ TX- RX+ RX- TVS PI3USB353 reference schematic for source application PI3USB353 DFP-source reference schematic for type-c PD/DP/ALT application Contact Diodes local sales for TVS Page 7 of 8 ANXXX 7//06
18 RX+/TX+ RX-/TX- AUX+ AUX- P CONF0/A CONF/SCL CONF/SDA DP0+ DP # C9 7-C 03, C 05 a re "mu st h ave " t o pr eve nt n on- DP comp lia nt 3.3V si gnal s f rom plu g-i n a s re al- see n-ca se. C88 0u 0.u C89 0.u C90 0.u C9 C9 0.u 0.u C93 0.u C94 0.u C95 R69 NC R7 4.7K CONF/SDA CONF/SCL CONF0/A R70 NC (for IC) R7 NC (for IC) Vbus control Sink charging circuit No -cho kes be twee n 3 53 an d t ype -C c onn ecto r, bec ause 3 53 is a p assi ve swi tch wit hou t EM I i ssue. DP receiver C040.u C060.u R80 NC ADDR0 MODE DP+ DP- DP+ DP- DP3+ DP3- TX+/RX+ TX-/RX- MODE A0 U RX+/TX+ RX-/TX- TX+/RX+ TX-/RX- TX+/RX+ TX-/RX- RX+/TX+ RX-/TX- SBU/SBU SBU/SBU PI3USB D0+ D0- D3+ D3- AUX+ AUX- C97 0.u TX+ C98 0.u TX- C99 0.u RX+ C000.u RX- C00.u RX+ C00.u RX- C030.u TX+ C050.u TX- 00uf C96 B A B A B3 A0 B4 A9 B5 A8 B6 A7 B7 A6 B8 A5 B9 A4 B0 A3 B A B A J7 TX+ RX+ TX- RX- CC SBU SBU CC RX- TX- RX+ TX+ USB3 controller R8 70K R75 M R76 M R73 M R74 M Type-C Recep. KUSB-8-A-P ST, TX+ C070.u TX- C080.u RX+ RX- USB /- TX+ TX- RX+ RX- TVS CONF/ SDA CONF/ SCL CONF0/ A See sink truth table for the control of CONF[:0] PD controller Vbus control CC CC RX+ RX- TX+ TX- TVS PI3USB353 reference schematic for sink application PI3USB353 UFP-sink reference schematic for type-c PD/DP/ALT application Contact Diodes local sales for TVS Page 8 of 8 ANXXX 7//06
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