±15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers

Transcription

1 19-477; Rev 1; 1/99 ±15k ESD-Protected, Single/Dual/Octal, General Description The are single, dual, and octal switch debouncers that provide clean interfacing of mechanical switches to digital systems. They accept one or more bouncing inputs from a mechanical switch and produce a clean digital output after a short, preset qualification delay. Both the switch opening bounce and the switch closing bounce are removed. Robust switch inputs handle ±5 levels and are ±15k ESDprotected for use in harsh industrial environments. They feature single-supply operation from +.7 to Undervoltage lockout circuitry ensures the output is in the correct state upon power-up. The single MAX6816 and dual MAX6817 are offered in SOT packages and require no external components. Their low supply current makes them ideal for use in portable equipment. The MAX6818 octal switch debouncer is designed for data-bus interfacing. The MAX6818 monitors switches and provides a switch change-of-state output (CH), simplifying microprocessor (µp) polling and interrupts. Additionally, the MAX6818 has three-state outputs controlled by an enable (EN) pin, and is pin-compatible with the LS573 octal latch (except for the CH pin), allowing easy interfacing to a digital data bus. µp Switch Interfacing Industrial Instruments PC-Based Instruments Portable Instruments Automotive Applications Membrane Keypads Applications Typical Operating Circuit Features Robust Inputs can Exceed Power Supplies up to ±5 ESD Protection for Input Pins ±15k Human Body Model ±8k IEC 1-4-, Contact Discharge ±15k IEC 1-4-, Air-Gap Discharge Small SOT Packages (4 and 6 pins) Single-Supply Operation from +.7 to +5.5 Single (MAX6816), Dual (MAX6817), and Octal (MAX6818) ersions Available No External Components Required 6µA Supply Current Three-State Outputs for Directly Interfacing Switches to µp Data Bus (MAX6818) Switch Change-of-State Output Simplifies Polling and Interrupts (MAX6818) Pin-Compatible with LS573 (MAX6818) PART TOP IEW Ordering Information TEMP. RANGE PIN- PACKAGE SOT TOP MARK MAX6816EUS-T MAX6817EUT-T MAX6818EAP -4 C to +85 C -4 C to +85 C -4 C to +85 C 4 SOT143 6 SOT3-6 SSOP KABA AAAU Note: There is a minimum order increment of 5 pieces for SOT packages. Pin Configurations GND 1 4 MECHANICAL SWITCH MAX6816.1µF µp MAX6816 IN GND OUT DEBOUNCED OUTPUT RESET IN SOT143 3 OUT Pin Configurations continued at end of data sheet. Maxim Integrated Products 1 For free samples & the latest literature: or phone For small orders, phone

2 ABSOLUTE MAXIMUM RATINGS oltage (with respect to GND) to +6 IN_ (Switch Inputs)...-3 to +3 EN to +6 OUT_, CH to ( +.3) OUT Short-Circuit Duration (One or Two Outputs to GND)...Continuous Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Continuous Power Dissipation (T A = +7 C) 4-Pin SOT143 (derate 4.mW/ C above +7 C)...3mW 6-Pin SOT3 (derate 8.7mW/ C above +7 C)...691mW -Pin SSOP (derate 8.mW/ C above +7 C)...64mW Operating Temperature Range...-4 C to +85 C Storage Temperature Range C to +16 C Lead Temperature (soldering, 1sec)...+3 C ( = +.7 to +5.5, T A = -4 C to +85 C, unless otherwise noted. Typical values are at = +5, T A = +5 C.) (Note 1) Operating oltage Range Supply Current Debounce Duration Input Threshold Input Hysteresis IN Input Current EN Pulse Width EN Input Current PARAMETER Input Pull-Up Resistance Input oltage Range Undervoltage-Lockout Threshold OUT_, CH Output oltage EN Threshold EN Low to Out Active Propagation Delay EN High to Out Three-State Propagation Delay EN Low to CH Out High Propagation Delay OUT_ Three-State Leakage Current ESD CHARACTERISTICS ESD Protection SYMBOL CONDITIONS MIN TYP MAX I CC = 5, I OUT =, IN_ = 6 t DP MAX MAX6816/MAX IL.8 IH = 5.4 = I IN IN = ±15 ±1 IN OL I SINK = 1.6mA.4 OH I SOURCE =.4mA - 1. t EN = = I IL ±1 t PE t PD t PC R L = 1kΩ, C L = 1pF R L = 1kΩ, C L = 15pF R L = 1kΩ, C L = 5pF UNITS OUT = or ±1 µa IN_ IEC1-4- Air Discharge IEC1-4- Contact Discharge Human Body Model ±15 ±8 ±15 µa ms m kω ma ns µa ns ns ns k Note 1: MAX6816 and MAX6817 production testing is done at T A = +5 C; over-temperature limits are guaranteed by design.

3 (T A = +5 C, unless otherwise noted.) SUPPLY CURRENT (µa) SUPPLY CURRENT vs. TEMPERATURE = 5 = OUTPUT LOGIC LEEL () TEMPERATURE ( C) MAX6816 TOC1 IN (5/div) OUT (/div) OUTPUT LOGIC LEEL vs. SUPPLY OLTAGE OH, I SOURCE =.4mA OL, I SINK = 1.6mA SUPPLY OLTAGE () DEBOUNCE OF CLOSING SWITCH = 5 MAX6816 toc4 1ms/div Typical Operating Characteristics LOGIC THRESHOLD () MAX6816 TOC IN (5/div) OUT (/div) DEBOUNCE OF OPENING SWITCH = 5 1ms/div MAX6818 EN INPUT LOGIC THRESHOLD vs. SUPPLY OLTAGE SUPPLY OLTAGE () MAX6816 toc5 MAX6816 TOC3 DEBOUNCE DELAY PERIOD (ms) DEBOUNCE DELAY PERIOD vs. TEMPERATURE = 3 = 5 MAX6816 toc6 CC UNDEROLTAGE LOCKOUT () UNDEROLTAGE LOCKOUT vs. TEMPERATURE MAX6816 toc TEMPERATURE ( C) TEMPERATURE ( C) 3

4 PIN MAX6816 MAX6817 MAX6818 1, , NAME 1 1 GND Ground IN IN1, IN OUT, OUT1 OUT8 OUT1 OSC. IN1 IN8 OUT EN CH D R Switch Input Switch Inputs Switch Inputs CMOS Debounced Output CMOS Debounced Outputs CMOS Debounced Outputs +.7 to +5.5 Supply oltage FUNCTION Pin Description Active-Low, Three-State Enable Input for outputs. Resets CH. Tie to GND to always enable outputs. Change-of-State Output. Goes low on switch input change of state. Resets on EN. Leave unconnected if not used. COUNTER Q D LOAD Q OUT IN ESD PROTECTION R PU UNDER- OLTAGE LOCKOUT MAX6816 MAX6817 MAX6818 Figure 1. Block Diagram Detailed Description Theory of Operation The are designed to eliminate the extraneous level changes that result from interfacing with mechanical switches (switch bounce). irtually all mechanical switches bounce upon opening or closing. These switch debouncers remove bounce when a switch opens or closes by requiring that sequentially clocked inputs remain in the same state for a number of sampling periods. The output does not change until the input is stable for a duration of 4ms. The circuit block diagram (Figure 1) shows the functional blocks consisting of an on-chip oscillator, counter, exclusive-nor gate, and D flip-flop. When the input does not equal the output, the XNOR gate issues a counter reset. When the switch input state is stable for the full qualification period, the counter clocks the flip-flop, updating the output. Figure shows the typical opening and closing switch debounce operation. On the MAX6818, the change output (CH) is updated simultaneously with the switch outputs. Undervoltage Lockout The undervoltage lockout circuitry ensures that the outputs are at the correct state on power-up. While the supply voltage is below the undervoltage threshold (typically 1.9), the debounce circuitry remains transparent. Switch states are present at the logic outputs without delay. 4

5 IN1 OUT1 IN OUT CH Figure. Input Characteristics IN (/div) - t DP MAX6818 ONLY EN OUT1 OUT8 OUT1 OUT8 CH t EN 1/ 1/ t PE t PE t PC 1/ 1/ 1/ OUT NORMALLY LOW OUT NORMALLY HIGH Figure 4. MAX6818 µp-interface Timing Diagram SW1 SW8 IN1 IN8 + MAX6818.1µF EN CH OUT1 OUT8 I/O IRQ D D7 tpd OL +.5 OH -.5 t PD + µp 4 OUT (/div) Figure 5. MAX6818 Typical µp Interfacing Circuit ms/div Figure 3. Switch Input ±5 Fault Tolerance Robust Switch Inputs The switch inputs on the have overvoltage clamping diodes to protect against damaging fault conditions. Switch input voltages can safely swing ±5 to ground (Figure 3). Proprietary ESD-protection structures protect against high ESD encountered in harsh industrial environments, membrane keypads, and portable applications. They are designed to withstand ±15k per the IEC1-4- Air Gap Discharge Test and ±8k per the IEC1-4- Contact Discharge Test. Since there are 63kΩ (typical) pull-up resistors connected to each input, driving an input to -5 will draw approximately.5ma (up to 4mA for eight inputs) from the supply. Driving an input to +5 will cause approximately.3ma of current (up to.6ma for eight inputs) to flow back into the supply. If the total system supply current is less than the current flowing back into the supply, will rise above normal levels. In some low-current systems, a zener diode on may be required. ±15k ESD Protection As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The have extra protection against static electricity. Maxim's engineers have developed state-of-the-art structures to protect against ESD of ±15k at the switch inputs without 5

6 HIGH- OLTAGE DC SOURCE AMPERES I P 1% 9% 36.8% 1% R C 1M CHARGE-CURRENT LIMIT RESISTOR Cs 1pF t RL R D 15Ω DISCHARGE RESISTANCE STORAGE CAPACITOR Figure 6a. Human Body ESD Test Model Ir TIME t DL CURRENT WAEFORM DEICE UNDER TEST PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) HIGH- OLTAGE DC SOURCE IPEAK R C 5M to 1M CHARGE CURRENT LIMIT RESISTOR I 1% 9% Cs 15pF R D 33Ω DISCHARGE RESISTANCE STORAGE CAPACITOR Figure 7a. IEC1-4- ESD Test Model DEICE UNDER TEST 1% Figure 6b. Human Body Current Waveform damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, the MAX6816/MAX6817/ MAX6818 keep working without latchup, whereas other solutions can latch and must be powered down to remove latchup. ESD protection can be tested in various ways; these products are characterized for protection to the following limits: 1) ±15k using the Human Body Model ) ±8k using the Contact-Discharge method specified in IEC1-4- 3) ±15k using IEC1-4- s Air-Gap method. ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. tr =.7ns to 1ns 3ns 6ns Figure 7b. IEC1-4- ESD Generator Current Waveform Human Body Model Figure 6a shows the Human Body Model and Figure 6b shows the current waveform it generates when discharged into a low impedance. This model consists of a 1pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5kΩ resistor. IEC1-4- The IEC1-4- standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX6816/ MAX6817/MAX6818 help you design equipment that t 6

7 meets Level 4 (the highest level) of IEC1-4-, without the need for additional ESD-protection components. The major difference between tests done using the Human Body Model and IEC1-4- is higher peak current in IEC1-4-, because series resistance is lower in the IEC1-4- model. Hence, the ESD withstand voltage measured to IEC1-4- is generally lower than that measured using the Human Body Model. Figure 7a shows the IEC1-4- model and Figure 7b shows the current waveform for the 8k, IEC1-4-, Level 4, ESD Contact-Discharge test. The Air-Gap test involves approaching the device with a charged probe. The Contact-Discharge method connects the probe to the device before the probe is energized. TOP IEW Machine Model The Machine Model for ESD tests all pins using a pf storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. MAX6818 µp Interfacing The MAX6818 has an output enable (EN) input that allows switch outputs to be three-stated on the µp data bus until polled by the µp. Also, state changes at the switch inputs are detected, and an output (CH) goes low after the debounce period to signal the µp. Figure 4 shows the timing diagram for enabling outputs and reading data. If the output enable is not used, tie EN to GND to always enable the switch outputs. If EN is low, CH is always high. If a change of state is not required, leave CH unconnected. Pin Configurations (continued) EN IN OUT1 IN1 1 6 OUT1 IN IN OUT OUT3 GND MAX IN4 IN5 5 6 MAX OUT4 OUT5 IN 3 4 OUT IN6 IN OUT6 OUT7 SOT3-6 IN8 9 1 OUT8 GND 1 11 CH SSOP Chip Information MAX6816 TRANSISTOR COUNT: 84 MAX6817 TRANSISTOR COUNT: 497 MAX6818 TRANSISTOR COUNT: 13 SUBSTRATE CONNECTED TO GND 7

8 Package Information SOT1434.EPS 8

9 Package Information (continued) 6LSOT.EPS 9

10 Package Information (continued) SSOP.EPS 1

11 NOTES 11

12 NOTES Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 1 Maxim Integrated Products, 1 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.