Application Note No. 100

Transcription

1 Application Note, Rev. 1.2, May 2007 Application Note No. 100 ESD Protection for High-Speed Applications 1- & 2-channel low capacitance bi-directional ESD diode in ultra-small TSLP package Small Signal Discretes

2 Edition Published by Infineon Technologies AG München, Germany Infineon Technologies AG All Rights Reserved. LEGAL DISCLAIMER THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. INFINEON TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND (INCLUDING WITHOUT LIMITATION WARRANTIES OF NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY) WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office ( Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

3 Application Note No. 100 Revision History: , Rev. 1.2 Previous Version: , Rev. 1.1 Page Subjects (major changes since last revision) all small changes in figure descriptions Application Note 3 Rev. 1.2,

4 ESD Protection for High-Speed Applications 1 ESD Protection for High-Speed Applications Due growing requirements in electronic applications, modern IC s need to operate on higher frequencies while having a smaller fabrication geometry. Therefore, todays electronic systems suffer from higher ESD susceptibility and ESD protection is an increasingly important issue. Basically designers require devices in the smallest possible size, which must not effect digital and analog signal quality. These two requirements have to be combined with highest level of ESD protection. Infineon Technologies offers various reliable and efficient solutions to match the customer needs. Our ESD protection diodes excel because of their flexibility in use combined with smallest available size on the market and lowest capacitance values. ESD8V0L1B-02LRH ESD8V0L2B-03L AN100_Pinconfiguration.vsd Figure 1 ESD8V0L1B-02LRH & ESD8V0L2B-03L 2 Target Application The Infineon ESD8V0L low capacitance series offers protection of high speed data interfaces such as USB 2.0, 10/100 Ethernet, Firewire, Video, Serial/Parallel and LAN/WAN ports. Despite of their small size, this ESD protection series exceeds IEC standard and protects ESD voltages up to 25 kv contact discharge. 3 Design Flexibility & Board Space Saving Infineon TSLP packages have an extremely small form factor. In comparison with a SC79, the TSLP-2-7 package has not only smaller dimensions but offers lowest height of max. 0.4 mm, which is a benchmark in the market. Especially in the fast developing Mobile Phones and Consumer/IT market, for which the ESD8V0L series was developed, reduced height requirements are of utmost importance. For this reason, using TSLP packages saves space and increases design flexibility. Figure 2 TSLP-Package next to sugar crystal Application Note 4 Rev. 1.2,

5 Design Flexibility & Board Space Saving SC-79 TSLP-2-7 AN100_SC79_vs_TSLP_2_7.vs Figure 3 SC79 in comparison with TSLP-2-7 Application Note 5 Rev. 1.2,

6 Application Examples 4 Application Examples Connector 2 protected signal lines, level up to ±8V (bi -directional) or +14V (uni -directional) 1 2 I/O I/O ESD sensitive device ESD8V0L2B -03L 3 C L = 4 pf Pin 3 should be connected directly to a ground plane on the board. AN100_Bi-directional_2singllines.vsd Figure 4 Bi-directional protection of two high-speed data lines, e.g. USB 2.0 Connec tor Protected high -speed signal line, level up to ±22V (bi -directional) ESD8V0L2B -03L 2 3 I/O C L = 2 pf ESD sensitive device 1 Pin 1 (or pin 2) should be connected directly to a ground plane on the board. Pin 3 is not connected. AN100_Bi-directional_highspeedlline.vs Figure 5 Bi-directional protection of one high-speed data-line, e.g. USB 2.0 Connector Protected signal line, level up to ±8V (bi -directional) or +14V (uni -directional) ESD8V0L1B -02LRH 2 1 C L = 8.5 pf I/O ESD sensitive device Pin 1 should be connected directly to a ground plane on the board. AN100_Bi-directional_1singlline.vsd Figure 6 Bi-directional protection of one signal line 5 High Speed Capability For data integrity of high frequency data transmission, ESD-diode capacitance is an essential feature. Figure 4 and Figure 5 give an example, how high-speed signal lines, e.g. USB 2.0, can be protected easily. To get an reliable ESD protection for the USB 2.0 hub and the USB 2.0 device, ESD protection has to be implemented in both units. Application Note 6 Rev. 1.2,

7 High Speed Capability To compare the effect of different ESD-diode parasitic capacitance values with the use of eye-pattern simulation, a USB 2.0 test-setup was evaluated according USB 2.0 specification [1]. The USB 2.0 test template #6 was used to show the effect of the entire USB 2.0 transmission link, starting at the USB 2.0 driver s output (transmitter output pins, TP1) and ends at data out. The link setup covers PCB capacitance effects at TX and RX side of maximal 5 pf each, USB-cable (5m length) and the input capacitance of the receiver which is limited to 5 pf at each differential RX input port. The environment conditions for simulation are displayed in Figure 7. There are several ways to use the ESD protection solution ESD8V0L2B-03L in the application. The most cost effective solution is shown in Figure 4. The differential data lines of the USB 2.0 transmission link should be connected to pin1 and pin2 of the ESD8V0L2B-03L. Pin3 of the diode is grounded. The resulting line capacitance provided by each diode is 4 pf. Differential line to line capacitance is 2 pf. Driver / TX Modulation data TX 45 Ohm Switch PCB ESD diode TP1 Conector Twisted pair [Ohm] Z_com = 30 (+- 30%) Z_diff = 90 (+-15%) Conector ESD diode PCB Receiver / RX 45 Ohm RX Diff. amplifier gain=1 Data out DC DC current 17.5mA 45 Ohm TX PCB ESD diode ESD diode PCB 45 Ohm RX Figure 7 USB 2.0 test setup #6 with parasitics of 15 pf per line according to [1] Parasitic effects from protection devices not considered AN100_USB2_Test_Setup.vsd Application Note 7 Rev. 1.2,

8 High Speed Capability Figure 8 AN100_Transmission_simulation_4pF.vsd Simulation result of a differential USB Mbit/s - data transmission, using ESD8VOL2B-03L according Figure 4. Line capacitance load would increase by 4 pf at the USB 2.0 hub and at the USB 2.0 device Further reduction of the line capacitance can be realized by using one ESD8V0L2B-03L for each line. Connecting pin1 (or pin2) of an ESD8V0L2B-03L diode to one USB data line, the other pin to ground, the capacitance value of the protection diode is reduced down to 2 pf. Doing this, pin3 is kept floating (unconnected) (Figure 5). The second USB data line is protected in the same way. This solution with 2 pf parasitics provides a further safety margain for high-speed data transmission and correspondly the data integrity. Application Note 8 Rev. 1.2,

9 High Speed Capability Figure 9 AN100_transmission_simulation_2pF.vsd Simulation result of differential USB Mbit/s data transmission, using ESD8V0L2B-03L according Figure 5. Line capacitance load would increase by 2 pf at the USB 2.0 hub and at the USB 2.0 device Both configurations can handle ESD pulses exceeding IEC , 15 kv contact discharge. If even higher ratings are required, a configuration with the one-channel Infineon diode ESD8V0L1B-02LRH according Figure 6 is recommended. Up to 25 kv contact discharge can be achieved with this one-channel device. Using the ESD8V0L2B-03L ESD diode in a USB 2.0 data link, the data integrity is not affected. For the configuration described in Figure 4 and Figure 5 the resulting eye pattern fulfills the USB 2.0 test specification with safety margin, even if a USB 2.0 driver and receiver capacitance of 15 pf in total (incl. PCB effects) is assumed. On the other hand a standard ESD protection diode with C typ 10 pf parasitic capacitance, which is still common in the market, might fail in this USB test set-up and in the application accordingly (Figure 10). Application Note 9 Rev. 1.2,

10 Multilayer Varistors Cannot Substitute AN100_transmission_simulation.vsd Figure 10 USB Mbit/s - data transmission simulation with 4 conventional 10 pf ESD diodes which affects the signal integrity 6 Multilayer Varistors Cannot Substitute Multilayer Varistors do not provide the high performance and quality of semiconductor diodes required for protection of technology driven applications. Designers using varistors have to deal with degrading effects as well as high and imprecise clamping voltages, which involves the risk of damaged IC s and malfunctions in the circuit. Another major disadvantage compared to ESD protection diodes is a high leakage current, which is not feasible in mobile applications. Additionally handling of ESD protection diodes in TSLP packages in the production is easy whereas multilayer varistors often face solderability issues and yield loss in the production. Table 1 Parameter Values Parameter Condition Value V RWMmax 14 V (V+) 8 V (V-) I RWM 3 V, 25 C 100 na max. C L 0 V, 1 MHz 2 pf, 4 pf, 8.5 pf typ. IEC (contact) >15 kv IEC (5/50 ns) >40 A [1] Application Note 10 Rev. 1.2,