DC Output* PO1: 12 V up to 40 A PO2: 12 V up to 40 A PO3: 5 V up to 12 A 12V_Aux: 12 V up to 1 A. 3.3V_Aux: 3.3 V up to 12 A

Transcription

1 VPX6A1000 SERIES 6U VPX / VITA 62 COMPLIANT, HIGH DENSITY, SIX OUTPUTS DC / DC CONVERTERS Up to W Applications Military (Airborne, ground-fix, shipboard), Ruggedized, Telecom, Industrial Special Features VITA 62 standard compliant High power up to 1000W cont. High density up to 18W/in 3 High efficiency up to 90% Wide input voltage range Input / Output isolation Remote sense (@ PO# outputs) External On/Off Inhibit External On/Off Enable Fixed switching freq. (250 khz) External sync. capability EMI filters included I 2 C communication PO# outputs parallelable Indefinite short-circuit protection with auto-recovery Over-voltage protection Over-temperature shutdown with auto-recovery Reverse input protection Conduction cooled via card edge Electrical Specifications DC Input Steady-State: 18 to 36 V DC Operates through overvoltage transients IAW MIL- STD-704(A-F) and MIL-STD- 1275(A-D) No damage due to transients IAW MIL-STD-704(A-F) and MIL-STD-1275(A-D) DC Output* PO1: 12 V up to 40 A PO2: 12 V up to 40 A PO3: 5 V up to 12 A +12V_Aux: +12 V up to 1 A 12V_Aux: 12 V up to 1 A 3.3V_Aux: 3.3 V up to 12 A Isolation Input to Output: 200 V DC Input to Case: 200 V DC Output to Case: 100 V DC Line/Load regulation Up to ±1% (Low to high input line voltage, no load to full load, 55 C to +85 C). Efficiency 88% - Typical (Nominal line voltage, full loads, room temperature) EMC Designed to meet MIL-STD-461F (/w 5µH LISN): CE101, CE102, CS101 Ripple and Noise Typically less than 50 mv p-p (max. 100 mv p-p ), measured across a 0.1 μf capacitor, with 10 μf capacitor across load. Load Transient Overshoot and Undershoot Output dynamic response of less than 5% at load Step of 30%-90%. Output returns to regulation in less than 1 ms Communication I 2 C protocol available for voltages, currents and temperature for all positive voltages (GAx, SCL, SDA) * All PO# outputs have remote sense lines for voltage drop compensation and current share ability File Name: VPX6A1000cat Rev (B) Date: 2018/01/08 Page 1 of 7

2 Protections * Input Reverse Polarity Protection Protection for unlimited time, up to -48 V DC. Under-Voltage Lockout Unit shuts down if input voltage drops below 16.5 ± 1 V. Automatic restart when input voltage rises above 19 ± 1 V. Minimum hysteresis: 2 V. Over-Voltage Lockout Unit shuts down if input voltage rises above 55 ± 2 V. Automatic restart when input voltage falls below 38 ± 2 V. Lockout is delayed by at least 100ms from the onset of the over-voltage state, to allow operation through normal transients, per MIL-STD-704 and MIL-STD Output Over-Voltage Protection Overload / Short-Circuit Protection Continuous protection (10-30% above maximum current) for unlimited time (Hiccup). Automatic recovery when overload/short-circuit removed. General Over Temperature Protection Automatic shutdown in case internal temperature (communicated via I 2 C) rises above 105 ± 5 C. Operation guaranteed at card edge temperature up to +85 C under full load conditions. Environmental Conditions Designed to meet MIL-STD-810G Temperature Operating: 55 C to +85 C at unit edge (consult factory) Storage: 55 C to +125 C Fungus Does not support fungus growth, in accordance with the guidelines of MIL-STD-454, Requirement 4. Altitude Method 500.5, Procedure I & II Storage/Air Transport: 40 kft Operation/Air carriage: 70 kft Humidity Method 507.5, Up to 95% RH Salt Fog: Method Shock Method g, 11 ms saw-tooth (all directions) Vibration Shock: Saw-tooth, 20 g peak, 11 ms. Vibration: Figure 514.6E-1. General minimum integrity exposure. (1 hour per axis.) Environmental Stress Screening (ESS) Including random vibration and thermal cycles is also available. Please consult factory for details. * Thresholds and protections can be modified / removed please consult factory. File Name: VPX6A1000cat Rev (B) Date: 2018/01/08 Page 2 of 7

3 Pin Assignment Connector PO CHASSIS NEG_FLT_OUT POS_FLT_OUT 1P1 2P1 3P1 4P1 5P1 6P1 7P1 8P1 1P2 2P2 3P2 4P2 5P2 6P2 7P2 8P2 1P3 2P3 3P3 4P3 5P3 6P3 7P3 8P3 1P4 2P4 3P4 4P4 5P4 6P4 7P4 8P4 1P5 2P5 3P5 4P5 5P5 6P5 7P5 8P5 P2 7Pin P1 P2 P3 P4 P5 Pin Number P7 P6 P5 P4 P3 P2 P1 Signal Name POS_FLT_OUT NEG_FLT_OUT CHASSIS_GND 1P6 2P6 3P6 4P6 5P6 6P6 7P6 8P6 1P7 2P7 3P7 4P7 5P7 6P7 7P7 8P7 P6 P7 File Name: VPX6A1000cat Rev (B) Date: 2018/01/08 Page 3 of 7

4 File Name: VPX6A1000cat Rev (B) Date: 2017/08/27 Page 4 of 7 Connector P1: Pin # Signal Name P10 12V/20A_PO1 P9 12V/20A_PO2 A9 PO1_SENSE B9 PO2_SENSE C9 PO3_SENSE D9 UD0 A8 PO1_SENSE_RTN B8 PO2_SENSE_RTN C8 PO3_SENSE_RTN D8 UD1 A7 PO1_SHARE B7 PO2_SHARE C7 PO3_SHARE D7 SIGNAL_RTN P8 P7 A6 +CLK B6 -CLK C6-12V_AUX D6 NC1 A5 GAP* B5 GA4* C5 SCL D5 SDA A4 GA3* B4 GA2* C4 GA1* D4 GA0* A3 UD2 B3 +12V_AUX C3 NC2 D3 NC3 P6 P5 P4 P3 A2 NC4 B2 FAIL C2 INHIBIT* D2 ENABLE* A1 3.3V/10A_SENSE B1 3.3V/10A_SENSE_RTN C1 UD5 D1 UD6 P1 46Pin 1P1 2P1 3P1 4P1 5P1 6P1 7P1 8P1 1P2 2P2 3P2 4P2 5P2 6P2 7P2 8P2 A1 B1 C1 D1 A2 B2 C2 D2 A3 B3 C3 D3 A4 B4 C4 D4 A5 B5 C5 D5 A6 B6 C6 D6 A7 B7 C7 D7 A8 B8 C8 D8 1P3 2P3 3P3 4P3 5P3 6P3 7P3 8P3 1P4 2P4 3P4 4P4 5P4 6P4 7P4 8P4 1P5 2P5 3P5 4P5 5P5 6P5 7P5 8P5 1P6 2P6 3P6 4P6 5P6 6P6 7P6 8P6 1P7 2P7 3P7 4P7 5P7 6P7 7P7 8P7 1P8 2P8 3P8 4P8 5P8 6P8 7P8 8P8 1P9 2P9 3P9 4P9 5P9 6P9 7P9 8P9 1P10 2P10 3P10 4P10 5P10 6P10 7P10 8P10 A9 B9 C9 D9 UD0 12V/20A_PO1 12V/20A_PO2 3.3V/10A_SENSE_RTN 3.3V/10A_SENSE 3.3V/10A PO1_SENSE PO3_SENSE_RTN PO3_SENSE PO2_SENSE_RTN PO2_SENSE PO1_SENSE_RTN GA1 GA2 GA3 INHIBIT ENABLE FAIL SCL SIGNAL_RTN GA4 GAP GA0 SDA PO2_SHARE PO1_SHARE UD1 UD2-12V_AUX NC1 PO3_SHARE UD6 UD5 NC4 +12V_AUX NC2 NC3 UD4 UD3 +CLK (-)CLK

5 Functions and Signals (according to VITA 62.0) Signal No. Signal Name Type Description 1 FAIL* Output 2 INHIBIT* Input 3 ENABLE* Input 4 PO#_SHARE Bidirectional 5 6 PO#_SENSE PO#_SENSE_RTN GA4* GA0* & GAP* Input Input Indicates to other modules in the system that a failure has occurred in the module. This signal is normally low, and during fail changes to logic high. Controls power supply outputs. Connecting this signal to SIG_RTN turns the output power OFF. Controls the input power to the power supply. This signal in conjunction with INHIBIT* turns the output power ON and OFF. Please refer to Table 1 for combination of INHIBIT* & ENABLE*. Enables current share between two paralleled outputs on two devices. Connect required outputs (same voltage) of both devices in parallel, and their appropriate SHARE signals for proper operation. Used to correct output voltage at regulation point, when voltage droop occurs due to current flowing through output wires. This feature is limited up to approximately 0.5V above nominal voltage. Used for geographical addressing. GA4* is the most significant bit and GA0* is the least significant bit. GAP* indicates the parity. 7 SCL Bidirectional I2C bus Clock 8 SDA Bidirectional I2C bus Data Through this bus the power supply module's temperature can be shared. 9 UD0 UD6 Bidirectional User defined signals. Contact factory for further information. ENABLE* Low Low High High INHIBIT* Low High Low High 3.3V_AUX ON ON OFF OFF Power Status OFF ON OFF OFF NOTE: All Signals with an asterisk (*) suffix represent signals which are "active low". File Name: VPX6A1000cat Rev (B) Date: 2018/01/08 Page 5 of 7

6 Outline Drawing File Name: VPX6A1000cat Rev (B) Date: 2018/01/08 Page 6 of 7

7 Notes 1. Dimensions are in Inches [mm] 2. Tolerance is:.xx 0.01 IN.XXX IN 3. Weight: Approx. 3 lbs (1.36 kg) Note: Specifications are subject to change without prior notice by the manufacturer. File Name: VPX6A1000cat Rev (B) Date: 2018/01/08 Page 7 of 7