AADL : about scheduling analysis
|
|
- Theodore Davis
- 5 years ago
- Views:
Transcription
1 AADL : about schedulng analyss Schedulng analyss, what s t? Embedded real-tme crtcal systems have temporal constrants to meet (e.g. deadlne). Many systems are bult wth operatng systems provdng multtaskng facltes Tasks may have deadlne. But, tasks make temporal constrants analyss dffcult to do : We must take the task schedulng nto account n order to check task temporal constrants. Schedulng (or schedulablty) analyss. page 2
2 Summary 1. Issues about real-tme schedulng analyss : AADL to the rescue 2. Bascs on schedulng analyss : fxed-prorty schedulng for unprocessor archtectures 3. AADL components/propertes to schedulng analyss page 3 Real-Tme schedulng theory 1. A set of smplfed tasks models (to model functons of the system) 2. A set of analytcal methods (called feasblty tests) Example: R Deadlne = C + hp( ) R C P 3. A set of schedulng algorthms: buld the full schedulng/gantt dagram R page 4
3 Real-Tme schedulng theory s hard to apply Real-Tme schedulng theory Theoretcal results defned from 1974 to 1994: feasblty tests exst for unprocessor archtectures Now supported at a decent level by POSIX 1003 real-tme operatng systems, ARINC653, Industry demandng Yet, hard to use page 5 Real-Tme schedulng theory s hard to apply Requres strong theoretcal knowledge/sklls Numerous theoretcal results: how to choose the rght one? Numerous assumptons for each result. How to abstract/model a system to verfy deadlnes? How to ntegrate schedulng analyss n the engneerng process? When to apply t? What about tools? It s the role of an ADL to hde those detals page 6
4 AADL to the rescue? AADL helps modelng a full system, ncludng hardware, task sets, connectons, operatng system features, All of these elements are mandatory to apply real-tme schedulng theory Examples: an AADL model can nclude Task executon tme or task deadlne or task release tmes Schedulng parameters However, n many cases, the models stay too complex Multprocessor archtectures, shared buffers or buses, page 7 Summary 1. Issues about real-tme schedulng analyss : AADL to the rescue 2. Bascs on schedulng analyss : fxed-prorty schedulng for unprocessor archtectures 3. AADL components/propertes to schedulng analyss page 8
5 Real-tme schedulng theory : models of task Task smplfed model: sequence of statements + data. page 9 Usual knd of tasks: Independent tasks or dependent tasks. Perodc and sporadc tasks (crtcal functons) : have several obs and release tmes Aperodc tasks (non crtcal functons) : only one ob and one release tme Real-tme schedulng theory : models of task Usual parameters of a perodc task : Perod: P (duraton between two release tmes). A task starts a ob for each release tme. Deadlne to meet: D, tmng constrant to meet. Frst task release tme (frst ob): S. Worst case executon tme of each ob: C (or capacty or WCET). Prorty: allows the scheduler to choose the task to run page 10
6 Real-tme schedulng theory : models of task page 11 Unprocessor fxed prorty schedulng Fxed prorty schedulng : Schedulng based on fxed prorty => prortes do not change durng executon tme. Prortes are assgned at desgn tme (off-lne). Effcent and smple feasblty tests. Scheduler easy to mplement nto real-tme operatng systems. Rate Monotonc prorty assgnment : Optmal assgnment n the case of fxed prorty schedulng and unprocessor. Perodc tasks only. page 12
7 Unprocessor fxed prorty schedulng Two steps: 1. Rate monotonc prorty assgnment: the hghest prorty tasks have the smallest perods. Prortes are assgned off-lne (e.g. at desgn tme, before executon). 2. Fxed prorty schedulng: at any tme, run the ready task whch has the hghest prorty level. page 13 Unprocessor fxed prorty schedulng Rate Monotonc assgnment and preemptve fxed prorty schedulng: Assumng VxWorks prorty levels (hgh=0 ; low=255) T1 : C1=6, P1=10, Pro1=0 T2 : C2=9, P2=30, Pro2=1 page 14
8 Unprocessor fxed prorty schedulng Feasblty/Schedulablty tests to predct on desgn-tme f deadlne wll be met: page Run smulatons on hyperperod = [0,LCM(P)]. Suffcent and necessary condton. 2. Processor utlzaton factor test: = /.(2-1) (about 69%) Rate Monotonc assgnment and preemptve schedulng. Suffcent but not necessary condton. 3. Task worst case response tme, noted R : delay between task release tme and task completon tme. Any prorty assgnment but preemptve schedulng. Unprocessor fxed prorty schedulng Compute R, task worst case response tme: Task response tme = task capacty + delay the task has to wat for hgher prorty task. Or: R = C + hp() watng tme due to or R = C + hp( ) R C P hp() s the set of tasks whch have a hgher prorty than task. returns the smallest nteger not smaller than x. page 16
9 Unprocessor fxed prorty schedulng page 17 Unprocessor fxed prorty schedulng Example: T1(P1=7, C1=3), T2 (P2=12, C2=2), T3 (P3=20, C3=5) 1 =1=3 "1=3 2 =2=2 2 =C = =5 2 =C = =5 "2=5 3 =3=5 3 =C =C =C =C =C page = = = = =18 "3=18
10 Unprocessor fxed prorty schedulng Example wth the AADL case study: dsplay_panel thread whch dsplays data. P=100, C=20. recever thread whch sends data. P=250, C=50. analyser thread whch analyzes data. P=500, C=150. Processor utlzaton factor test: U=20/ /500+50/250=0.7 Bound=3.(2 $ 1)=0.779 U Bound => deadlnes wll be met. Task response tme: & '(')*+,- =330, &./+0)'*_0'(,) =20, & -,2,/3,- =70. Run smulatons on hyperperod: [0,LCM(P)] = [0,500]. page 19 Unprocessor fxed prorty schedulng page 20
11 Fxed prorty and shared resources Prevous tasks were ndependent does not really exst n true lfe. Task dependences : Shared resources. E.g. wth AADL: threads may wat for AADL protected data component access. Precedences between tasks. E.g wth AADL: threads exchange data by data port connectons. page 21 Fxed prorty and shared resources Shared resources are modeled by semaphores for schedulng analyss. We use specfc semaphores mplementng nhertance protocols: To take care of prorty nverson. To compute worst case task watng tme for the access to a shared resource. Blockng tme B. Inhertance protocols: PIP (Prorty nhertance protocol), can not be used wth more than one shared resource due to deadlock. PCP (Prorty Celng Protocol), mplemented n most of real-tme operatng systems (e.g. VxWorks). Several mplementatons of PCP exsts: OPCP, ICPP, page 22
12 Fxed prorty and shared resources What s Prorty nverson: a low prorty task blocks a hgh prorty task 5 = worst case on the shared resource watng tme. page 23 Fxed prorty and shared resources ICPP (Immedate Celng Prorty Protocol): Celng prorty of a resource = maxmum fxed prorty of the tasks whch use t. Dynamc task prorty = maxmum of ts own fxed prorty and the celng prortes of any resources t has locked. 5 =longest crtcal secton ; prevent deadlocks page 24
13 Fxed prorty and shared resources How to take nto account the watng tme B: Processor utlzaton factor test :,1 > 9: :;: +9 <= ;.(2? 1) Worst case response tme : R = B + C + hp( ) R C P page 25 To conclude on schedulng analyss Many feasblty tests: dependng on task, processor, scheduler, shared resource, dependences, multprocessor, herarchcal, dstrbuted, R = B + C + hp( ) R C P R R = C + C + max( Ck k hp( )) hp ( ) P R = C + hp( ) R C P R = w + J Many assumptons : requre preemptve, fxed prorty schedulng, synchronous perodc, ndependent tasks, deadlnes on requests w = C + hp( ) R + J C P Many feasblty tests. Many assumptons How to choose them? page 26
14 Summary 1. Issues about real-tme schedulng analyss : AADL to the rescue 2. Bascs on schedulng analyss : fxed-prorty schedulng for unprocessor archtectures 3. AADL components/propertes to schedulng analyss page 27 AADL to the rescue? Issues: Ensure all requred model elements are gven for the analyss Ensure model elements are complant wth analyss requrements/assumptons AADL helps for the frst ssue: page 28 AADL as a pvot language between tools. Internatonal standard. Close to the real-tme schedulng theory: real-tme schedulng analyss concepts can be found. Ex: Component categores: thread, data, processor Property: Deadlne, Fxed Prorty, ICPP, Celng Prorty,
15 Property sets for schedulng analyss Propertes related to processor component: Preemptve_Scheduler : aadlboolean apples to (processor); Schedulng_Protocol: nhert lst of Supported_Schedulng_Protocols apples to (vrtual processor, processor); -- RATE_MONOTONIC_PROTOCOL, -- POSIX_1003_HIGHEST_PRIORITY_FIRST_PROTOCOL,.. page 29 Property sets for schedulng analyss Propertes related to the threads/data components: Compute_Executon_Tme: Tme_Range apples to (thread, subprogram, ); Deadlne: nhert Tme => Perod apples to (thread, ); Perod: nhert Tme apples to (thread, ); Dspatch_Protocol: Supported_Dspatch_Protocols apples to (thread); -- Perodc, Sporadc, Tmed, Hybrd, Aperodc, Backgr... Prorty: nhert aadlnteger apples to (thread,, dat page 30 Concurrency_Control_Protocol: Supported_Concurrency_Control_Protocols apples to (dat -- None, PCP, ICPP,
16 Property sets for schedulng analyss Example: thread mplementaton recever.mpl propertes Dspatch_Protocol => Perodc; Compute_Executon_Tme => 31 ms.. 50 ms; Deadlne => 250 ms; Perod => 250 ms; end recever.mpl; data mplementaton target_poston.mpl propertes Concurrency_Control_Protocol => PRIORITY_CEILING_PROTOCOL; end target_poston.mpl; page 31 process mplementaton processng.others subcomponents recever : thread recever.mpl; analyzer : thread analyzer.mpl; target : data target_poston.mpl;... processor mplementaton leon2 propertes Schedulng_Protocol => RATE_MONOTONIC_PROTOCOL; end leon2; Preemptve_Scheduler => true; system mplementaton radar.smple subcomponents man : process processng.others; cpu : processor leon2;... Cheddar : a framework to access schedulablty of AADL models Cheddar tool = analyss framework (queueng system theory & real-tme schedulng theory) + nternal ADL (archtecture descrpton language) + varous standard ADL parsers (AADL, MARTE UML) + smple model edtor + Two versons : Open source (Cheddar) : educatonal and research. Commercal product (AADLInspector) : Elldss Tech product. Supports : Elldss Tech., Consel régonal de Bretagne, BMO, EGIDE/Campus France, Thales Communcaton, BPI France page 32
17 Cheddar : a framework to access schedulablty of AADL models Demos: Schedulng analyss of the radar example wth Cheddar.. And wth AADLInspector also page 33
Real-time Scheduling
Real-tme Schedulng COE718: Embedded System Desgn http://www.ee.ryerson.ca/~courses/coe718/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrcal and Computer Engneerng Ryerson Unversty Overvew RTX
More informationLecture 7 Real Time Task Scheduling. Forrest Brewer
Lecture 7 Real Tme Task Schedulng Forrest Brewer Real Tme ANSI defnes real tme as A Real tme process s a process whch delvers the results of processng n a gven tme span A data may requre processng at a
More informationMultitasking and Real-time Scheduling
Multtaskng and Real-tme Schedulng EE8205: Embedded Computer Systems http://www.ee.ryerson.ca/~courses/ee8205/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrcal and Computer Engneerng Ryerson Unversty
More informationScheduling. In general, a scheduling scheme provides two features: An algorithm for ordering the use of system resources (in particular the CPUs)
Schedulng Goal To understand the role that schedulng and schedulablty analyss plays n predctng that real-tme applcatons meet ther deadlnes Topcs Smple process model The cyclc executve approach Process-based
More informationMultitasking and Real-time Scheduling
Multtaskng and Real-tme Schedulng EE8205: Embedded Computer Systems http://www.ee.ryerson.ca/~courses/ee8205/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrcal and Computer Engneerng Ryerson Unversty
More informationVerification by testing
Real-Tme Systems Specfcaton Implementaton System models Executon-tme analyss Verfcaton Verfcaton by testng Dad? How do they know how much weght a brdge can handle? They drve bgger and bgger trucks over
More informationReal-Time Systems. Real-Time Systems. Verification by testing. Verification by testing
EDA222/DIT161 Real-Tme Systems, Chalmers/GU, 2014/2015 Lecture #8 Real-Tme Systems Real-Tme Systems Lecture #8 Specfcaton Professor Jan Jonsson Implementaton System models Executon-tme analyss Department
More informationA comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform
A comparson of MPCP and MSRP when sharng resources n the Janus multple-processor on a chp platform Paolo Ga, Marco D Natale, Guseppe Lpar, Scuola Superore Sant Anna, Psa, Italy {pj,marco,lpar}@sssup.t
More informationRavenscar Computational Model compliant AADL Simulation on LEON2
Ravenscar Computatonal Model complant AADL Smulaton on LEON2 Roberto VARONA-GÓMEZ, Eugeno VILLAR TEISA, GIM, Unversdad de Cantabra 39005 Santander, Span {roberto, vllar}@tesauncanes Ana-Isabel RODRÍGUEZ-RODRÍGUEZ
More informationArchitectural Optimization & Design of Embedded Systems based on AADL Performance Analysis
Amercan Journal of Computer Archtecture 2012, 1(2): 21-36 DOI: 10.5923/j.ajca.20120102.02 Archtectural Optmzaton & Desgn of Embedded Roberto Varona-Gómez 1,*, Eugeno Vllar 1, Ana Isabe l Rodrígue z 2,
More informationMaintaining temporal validity of real-time data on non-continuously executing resources
Mantanng temporal valdty of real-tme data on non-contnuously executng resources Tan Ba, Hong Lu and Juan Yang Hunan Insttute of Scence and Technology, College of Computer Scence, 44, Yueyang, Chna Wuhan
More informationPerfecting Preemption Threshold Scheduling for Object-Oriented Real-Time System Design: From The Perspective of Real-Time Synchronization
Perfectng Preempton Threshold Schedulng for Obect-Orented Real-Tme System Desgn: From The Perspectve of Real-Tme Synchronzaton Saehwa Km School of Electrcal Engneerng and Computer Scence Seoul Natonal
More informationA mathematical programming approach to the analysis, design and scheduling of offshore oilfields
17 th European Symposum on Computer Aded Process Engneerng ESCAPE17 V. Plesu and P.S. Agach (Edtors) 2007 Elsever B.V. All rghts reserved. 1 A mathematcal programmng approach to the analyss, desgn and
More informationIntroduction to Programming. Lecture 13: Container data structures. Container data structures. Topics for this lecture. A basic issue with containers
1 2 Introducton to Programmng Bertrand Meyer Lecture 13: Contaner data structures Last revsed 1 December 2003 Topcs for ths lecture 3 Contaner data structures 4 Contaners and genercty Contan other objects
More informationMixed-Criticality Scheduling on Multiprocessors using Task Grouping
Mxed-Crtcalty Schedulng on Multprocessors usng Task Groupng Jankang Ren Lnh Th Xuan Phan School of Software Technology, Dalan Unversty of Technology, Chna Computer and Informaton Scence Department, Unversty
More informationAn Investigation into Server Parameter Selection for Hierarchical Fixed Priority Pre-emptive Systems
An Investgaton nto Server Parameter Selecton for Herarchcal Fxed Prorty Pre-emptve Systems R.I. Davs and A. Burns Real-Tme Systems Research Group, Department of omputer Scence, Unversty of York, YO10 5DD,
More informationReal-time Fault-tolerant Scheduling Algorithm for Distributed Computing Systems
Real-tme Fault-tolerant Schedulng Algorthm for Dstrbuted Computng Systems Yun Lng, Y Ouyang College of Computer Scence and Informaton Engneerng Zheang Gongshang Unversty Postal code: 310018 P.R.CHINA {ylng,
More informationParallelism for Nested Loops with Non-uniform and Flow Dependences
Parallelsm for Nested Loops wth Non-unform and Flow Dependences Sam-Jn Jeong Dept. of Informaton & Communcaton Engneerng, Cheonan Unversty, 5, Anseo-dong, Cheonan, Chungnam, 330-80, Korea. seong@cheonan.ac.kr
More informationA Frame Packing Mechanism Using PDO Communication Service within CANopen
28 A Frame Packng Mechansm Usng PDO Communcaton Servce wthn CANopen Mnkoo Kang and Kejn Park Dvson of Industral & Informaton Systems Engneerng, Ajou Unversty, Suwon, Gyeongg-do, South Korea Summary The
More informationLoad Balancing for Hex-Cell Interconnection Network
Int. J. Communcatons, Network and System Scences,,, - Publshed Onlne Aprl n ScRes. http://www.scrp.org/journal/jcns http://dx.do.org/./jcns.. Load Balancng for Hex-Cell Interconnecton Network Saher Manaseer,
More informationCourse Introduction. Algorithm 8/31/2017. COSC 320 Advanced Data Structures and Algorithms. COSC 320 Advanced Data Structures and Algorithms
Course Introducton Course Topcs Exams, abs, Proects A quc loo at a few algorthms 1 Advanced Data Structures and Algorthms Descrpton: We are gong to dscuss algorthm complexty analyss, algorthm desgn technques
More informationVirtual Machine Migration based on Trust Measurement of Computer Node
Appled Mechancs and Materals Onlne: 2014-04-04 ISSN: 1662-7482, Vols. 536-537, pp 678-682 do:10.4028/www.scentfc.net/amm.536-537.678 2014 Trans Tech Publcatons, Swtzerland Vrtual Machne Mgraton based on
More informationTolerating Transient Faults in Statically Scheduled Safety-Critical Embedded Systems
Toleratng Transent Faults n Statcally Scheduled Safety-Crtcal Embedded Systems Nagaraan Kandasamy *, John P. Hayes *, and Bran T. Murray ** * Department of Electrcal Engneerng ** Delph Automotve Systems
More informationELEC 377 Operating Systems. Week 6 Class 3
ELEC 377 Operatng Systems Week 6 Class 3 Last Class Memory Management Memory Pagng Pagng Structure ELEC 377 Operatng Systems Today Pagng Szes Vrtual Memory Concept Demand Pagng ELEC 377 Operatng Systems
More informationEvaluation of Parallel Processing Systems through Queuing Model
ISSN 2278-309 Vkas Shnde, Internatonal Journal of Advanced Volume Trends 4, n Computer No.2, March Scence - and Aprl Engneerng, 205 4(2), March - Aprl 205, 36-43 Internatonal Journal of Advanced Trends
More informationOn-line Scheduling Algorithm with Precedence Constraint in Embeded Real-time System
00 rd Internatonal Conference on Coputer and Electrcal Engneerng (ICCEE 00 IPCSIT vol (0 (0 IACSIT Press, Sngapore DOI: 077/IPCSIT0VNo80 On-lne Schedulng Algorth wth Precedence Constrant n Ebeded Real-te
More informationA protocol for mixed-criticality management in switched Ethernet networks
A protocol for mxed-crtcalty management n swtched Ethernet networks Olver CROS, Laurent GEORGE Unversté Pars-Est, LIGM / ESIEE, France cros@ece.fr,lgeorge@eee.org Xaotng LI ECE Pars / LACSC, France xaotng.l@ece.fr
More informationFibre-Optic AWG-based Real-Time Networks
Fbre-Optc AWG-based Real-Tme Networks Krstna Kunert, Annette Böhm, Magnus Jonsson, School of Informaton Scence, Computer and Electrcal Engneerng, Halmstad Unversty {Magnus.Jonsson, Krstna.Kunert}@de.hh.se
More informationAssembler. Building a Modern Computer From First Principles.
Assembler Buldng a Modern Computer From Frst Prncples www.nand2tetrs.org Elements of Computng Systems, Nsan & Schocken, MIT Press, www.nand2tetrs.org, Chapter 6: Assembler slde Where we are at: Human Thought
More informationTwo-Stage Data Distribution for Distributed Surveillance Video Processing with Hybrid Storage Architecture
Two-Stage Data Dstrbuton for Dstrbuted Survellance Vdeo Processng wth Hybrd Storage Archtecture Yangyang Gao, Hatao Zhang, Bngchang Tang, Yanpe Zhu, Huadong Ma Bejng Key Lab of Intellgent Telecomm. Software
More informationCompiler Design. Spring Register Allocation. Sample Exercises and Solutions. Prof. Pedro C. Diniz
Compler Desgn Sprng 2014 Regster Allocaton Sample Exercses and Solutons Prof. Pedro C. Dnz USC / Informaton Scences Insttute 4676 Admralty Way, Sute 1001 Marna del Rey, Calforna 90292 pedro@s.edu Regster
More informationA Brute-Force Schedulability Analysis for Formal Model under Logical Execution Time Assumption
A Brute-Force Schedulablty Analyss for Formal Model under Logcal Executon Tme Assumpton Perre-Emmanuel Hladk To cte ths verson: Perre-Emmanuel Hladk. A Brute-Force Schedulablty Analyss for Formal Model
More informationCHAPTER 2 PROPOSED IMPROVED PARTICLE SWARM OPTIMIZATION
24 CHAPTER 2 PROPOSED IMPROVED PARTICLE SWARM OPTIMIZATION The present chapter proposes an IPSO approach for multprocessor task schedulng problem wth two classfcatons, namely, statc ndependent tasks and
More informationA Generic and Compositional Framework for Multicore Response Time Analysis
A Generc and Compostonal Framework for Multcore Response Tme Analyss Sebastan Altmeyer Unversty of Luxembourg Unversty of Amsterdam Clare Maza Grenoble INP Vermag Robert I. Davs Unversty of York INRIA,
More informationNetwork Cloud. Internal Network. Internal Network. Internal Network. Border Switch. Border Switch. Border Switch. Network. Internal. Border.
Multplexng VBR Trac Flows wth Guaranteed Applcaton-level QoS Usng Statstcal Rate Monotonc Schedulng Ala K. Atlas and Azer Bestavros Computer Scence Department Boston Unversty Boston, MA 0225 fakatlas,
More informationHalmstad University Post-Print
Halmstad Unversty Post-Prnt Admsson Control for Swtched Realtme Ethernet Schedulng Analyss versus etwor Calculus Xng Fan and Magnus Jonsson.B.: When ctng ths wor cte the orgnal artcle. Orgnal Publcaton:
More informationThe Control Server: A Computational Model for Real Time Control Tasks
5th Euromcro Conference on Real Tme Systems, Porto, Portugal, July 2003. The Control Server: A Computatonal Model for Real Tme Control Tasks Anton Cervn Department of Automatc Control Lund nsttute of Technology
More informationConcurrent Apriori Data Mining Algorithms
Concurrent Apror Data Mnng Algorthms Vassl Halatchev Department of Electrcal Engneerng and Computer Scence York Unversty, Toronto October 8, 2015 Outlne Why t s mportant Introducton to Assocaton Rule Mnng
More informationA QoS-aware Scheduling Scheme for Software-Defined Storage Oriented iscsi Target
A QoS-aware Schedulng Scheme for Software-Defned Storage Orented SCSI Target Xanghu Meng 1,2, Xuewen Zeng 1, Xao Chen 1, Xaozhou Ye 1,* 1 Natonal Network New Meda Engneerng Research Center, Insttute of
More informationBounding DMA Interference on Hard-Real-Time Embedded Systems *
JOURNAL OF INFORMATION SCIENCE AND ENGINEERING 22, 1229-1247 (2006) Boundng DMA Interference on Hard-Real-Tme Embedded Systems * TAI-YI HUANG, CHIH-CHIEH CHOU AND PO-YUAN CHEN Department of Computer Scence
More informationDesign and Analysis of Algorithms
Desgn and Analyss of Algorthms Heaps and Heapsort Reference: CLRS Chapter 6 Topcs: Heaps Heapsort Prorty queue Huo Hongwe Recap and overvew The story so far... Inserton sort runnng tme of Θ(n 2 ); sorts
More informationWITH rapid improvements of wireless technologies,
JOURNAL OF SYSTEMS ARCHITECTURE, SPECIAL ISSUE: HIGHLY-RELIABLE CPS, VOL. 00, NO. 0, MONTH 013 1 Adaptve GTS Allocaton n IEEE 80.15.4 for Real-Tme Wreless Sensor Networks Feng Xa, Ruonan Hao, Je L, Naxue
More informationVirtual Memory. Background. No. 10. Virtual Memory: concept. Logical Memory Space (review) Demand Paging(1) Virtual Memory
Background EECS. Operatng System Fundamentals No. Vrtual Memory Prof. Hu Jang Department of Electrcal Engneerng and Computer Scence, York Unversty Memory-management methods normally requres the entre process
More informationThe Codesign Challenge
ECE 4530 Codesgn Challenge Fall 2007 Hardware/Software Codesgn The Codesgn Challenge Objectves In the codesgn challenge, your task s to accelerate a gven software reference mplementaton as fast as possble.
More informationAvaya T3 Telephones connected to Integral 5 Setting up and using conference bridge Appendix to user s guide
Avaya T3 Telephones connected to Integral 5 Settng up and usng conference brdge Appendx to user s gude Issue 1 Integral 5 Software Release 2.6 September 2009 Use conference room Use conference room Your
More informationwith `ook-ahead for Broadcast WDM Networks TR May 14, 1996 Abstract
HPeR-`: A Hgh Performance Reservaton Protocol wth `ook-ahead for Broadcast WDM Networks Vjay Svaraman George N. Rouskas TR-96-06 May 14, 1996 Abstract We consder the problem of coordnatng access to the
More informationRoutability Driven Modification Method of Monotonic Via Assignment for 2-layer Ball Grid Array Packages
Routablty Drven Modfcaton Method of Monotonc Va Assgnment for 2-layer Ball Grd Array Pacages Yoch Tomoa Atsush Taahash Department of Communcatons and Integrated Systems, Toyo Insttute of Technology 2 12
More informationRAP. Speed/RAP/CODA. Real-time Systems. Modeling the sensor networks. Real-time Systems. Modeling the sensor networks. Real-time systems:
Speed/RAP/CODA Presented by Octav Chpara Real-tme Systems Many wreless sensor network applcatons requre real-tme support Survellance and trackng Border patrol Fre fghtng Real-tme systems: Hard real-tme:
More informationAn Optimal Algorithm for Prufer Codes *
J. Software Engneerng & Applcatons, 2009, 2: 111-115 do:10.4236/jsea.2009.22016 Publshed Onlne July 2009 (www.scrp.org/journal/jsea) An Optmal Algorthm for Prufer Codes * Xaodong Wang 1, 2, Le Wang 3,
More informationDESIGNING TRANSMISSION SCHEDULES FOR WIRELESS AD HOC NETWORKS TO MAXIMIZE NETWORK THROUGHPUT
DESIGNING TRANSMISSION SCHEDULES FOR WIRELESS AD HOC NETWORKS TO MAXIMIZE NETWORK THROUGHPUT Bran J. Wolf, Joseph L. Hammond, and Harlan B. Russell Dept. of Electrcal and Computer Engneerng, Clemson Unversty,
More informationAdaptive Network Resource Management in IEEE Wireless Random Access MAC
Adaptve Network Resource Management n IEEE 802.11 Wreless Random Access MAC Hao Wang, Changcheng Huang, James Yan Department of Systems and Computer Engneerng Carleton Unversty, Ottawa, ON, Canada Abstract
More informationAdaptive Resource Allocation Control with On-Line Search for Fair QoS Level
Adaptve Resource Allocaton Control wth On-Lne Search for Far QoS Level Fumko Harada, Toshmtsu Usho, Graduate School of Engneerng Scence Osaka Unversty {harada@hopf, usho@}sysesosaka-uacjp Yukkazu akamoto
More informationPriority-Based Scheduling Algorithm for Downlink Traffics in IEEE Networks
Prorty-Based Schedulng Algorthm for Downlnk Traffcs n IEEE 80.6 Networks Ja-Mng Lang, Jen-Jee Chen, You-Chun Wang, Yu-Chee Tseng, and Bao-Shuh P. Ln Department of Computer Scence Natonal Chao-Tung Unversty,
More informationNUMERICAL SOLVING OPTIMAL CONTROL PROBLEMS BY THE METHOD OF VARIATIONS
ARPN Journal of Engneerng and Appled Scences 006-017 Asan Research Publshng Network (ARPN). All rghts reserved. NUMERICAL SOLVING OPTIMAL CONTROL PROBLEMS BY THE METHOD OF VARIATIONS Igor Grgoryev, Svetlana
More informationReliability and Energy-aware Cache Reconfiguration for Embedded Systems
Relablty and Energy-aware Cache Reconfguraton for Embedded Systems Yuanwen Huang and Prabhat Mshra Department of Computer and Informaton Scence and Engneerng Unversty of Florda, Ganesvlle FL 326-62, USA
More informationReal-Time Guarantees. Traffic Characteristics. Flow Control
Real-Tme Guarantees Requrements on RT communcaton protocols: delay (response s) small jtter small throughput hgh error detecton at recever (and sender) small error detecton latency no thrashng under peak
More informationEnhanced Signaling Scheme with Admission Control in the Hybrid Optical Wireless (HOW) Networks
Enhanced Sgnalng Scheme wth Admsson Control n the Hybrd Optcal Wreless (HOW) Networks Yng Yan, Hao Yu, Henrk Wessng, and Lars Dttmann Department of Photoncs Techncal Unversty of Denmark Lyngby, Denmark
More informationStorage Binding in RTL synthesis
Storage Bndng n RTL synthess Pe Zhang Danel D. Gajsk Techncal Report ICS-0-37 August 0th, 200 Center for Embedded Computer Systems Department of Informaton and Computer Scence Unersty of Calforna, Irne
More informationImproved Resource Allocation Algorithms for Practical Image Encoding in a Ubiquitous Computing Environment
JOURNAL OF COMPUTERS, VOL. 4, NO. 9, SEPTEMBER 2009 873 Improved Resource Allocaton Algorthms for Practcal Image Encodng n a Ubqutous Computng Envronment Manxong Dong, Long Zheng, Kaoru Ota, Song Guo School
More informationIP Camera Configuration Software Instruction Manual
IP Camera 9483 - Confguraton Software Instructon Manual VBD 612-4 (10.14) Dear Customer, Wth your purchase of ths IP Camera, you have chosen a qualty product manufactured by RADEMACHER. Thank you for the
More informationA Predictable Execution Model for COTS-based Embedded Systems
2011 17th IEEE Real-Tme and Embedded Technology and Applcatons Symposum A Predctable Executon Model for COTS-based Embedded Systems Rodolfo Pellzzon, Emlano Bett, Stanley Bak, Gang Yao, John Crswell, Marco
More informationCompiling Process Networks to Interaction Nets
Complng Process Networks to Interacton Nets Ian Macke LIX, CNRS UMR 7161, École Polytechnque, 91128 Palaseau Cede, France Kahn process networks are a model of computaton based on a collecton of sequental,
More informationCS 268: Lecture 8 Router Support for Congestion Control
CS 268: Lecture 8 Router Support for Congeston Control Ion Stoca Computer Scence Dvson Department of Electrcal Engneerng and Computer Scences Unversty of Calforna, Berkeley Berkeley, CA 9472-1776 Router
More informationDesign and implementation of priority and timewindow based traffic scheduling and routingspectrum allocation mechanism in elastic optical networks
Journal of Physcs: Conference Seres PAPER OPEN ACCESS Desgn and mplementaton of prorty and tmewndow based traffc schedulng and routngspectrum allocaton mechansm n elastc optcal networks To cte ths artcle:
More informationSpace-Optimal, Wait-Free Real-Time Synchronization
1 Space-Optmal, Wat-Free Real-Tme Synchronzaton Hyeonjoong Cho, Bnoy Ravndran ECE Dept., Vrgna Tech Blacksburg, VA 24061, USA {hjcho,bnoy}@vt.edu E. Douglas Jensen The MITRE Corporaton Bedford, MA 01730,
More informationComparison of Heuristics for Scheduling Independent Tasks on Heterogeneous Distributed Environments
Comparson of Heurstcs for Schedulng Independent Tasks on Heterogeneous Dstrbuted Envronments Hesam Izakan¹, Ath Abraham², Senor Member, IEEE, Václav Snášel³ ¹ Islamc Azad Unversty, Ramsar Branch, Ramsar,
More informationCombined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors Λ
Combned Functonal Parttonng and Communcaton Speed Selecton for Networked Voltage-Scalable Processors Λ Jnfeng Lu, Pa H. Chou, Nader Bagherzadeh epartment of Electrcal & Computer Engneerng Unversty of Calforna,
More informationReliability and Performance Models for Grid Computing
Relablty and Performance Models for Grd Computng Yuan-Shun Da,2, Jack Dongarra,3,4 Department of Electrcal Engneerng and Computer Scence, Unversty of Tennessee, Knoxvlle 2 Department of Industral and Informaton
More informationHIERARCHICAL SCHEDULING WITH ADAPTIVE WEIGHTS FOR W-ATM *
Copyrght Notce c 1999 IEEE. Personal use of ths materal s permtted. However, permsson to reprnt/republsh ths materal for advertsng or promotonal purposes or for creatng new collectve wors for resale or
More informationA Free-Collision MAC Proposal for Networks
12th Brazlan Workshop on Real-Tme and Embedded Systems 89 A Free-Collson MAC Proposal for 802.11 Networks Omar Alment 1,2, Gullermo Fredrch 1, Gullermo Reggan 1 1 SITIC Group Unversdad Tecnológca Naconal
More informationREAL-TIME and embedded systems are applied in many
95 IEEE TRANSACTIONS ON COMPUTERS, VOL. 57, NO. 7, JULY 008 Deferrable Schedulng for Mantanng Real-Tme Data Freshness: Algorthms, Analyss, and Results Mng Xong, Member, IEEE, Song Han, Student Member,
More informationTECHNIQUE OF FORMATION HOMOGENEOUS SAMPLE SAME OBJECTS. Muradaliyev A.Z.
TECHNIQUE OF FORMATION HOMOGENEOUS SAMPLE SAME OBJECTS Muradalyev AZ Azerbajan Scentfc-Research and Desgn-Prospectng Insttute of Energetc AZ1012, Ave HZardab-94 E-mal:aydn_murad@yahoocom Importance of
More informationScheduling analysis of AADL architecture models
Scheduling analysis of AADL architecture models Frank Singhoff+, Pierre Dissaux* +Lab-STICC/CNRS UMR 6285, Université de Bretagne Occidentale, France *Ellidiss Technologies, France Outline Goal: overview
More informationCommunication Speed Selection and Functional Partitioning for Low-Energy On-Chip Networked Multiprocessor
ommuncaton Speed Selecton and Functonal Parttonng for Low-Energy On-hp Networed ultprocessor Jnfeng Lu, Pa H. hou, Nader Bagherzadeh epartment of Electrcal & omputer Engneerng Unversty of alforna, Irvne,
More informationAchieving class-based QoS for transactional workloads
Achevng class-based QoS for transactonal workloads Banca Schroeder Mor Harchol-Balter Carnege Mellon Unversty Department of Computer Scence Pttsburgh, PA USA @cs.cmu.edu Arun Iyengar Erch
More informationChapter 1. Introduction
Chapter 1 Introducton 1.1 Parallel Processng There s a contnual demand for greater computatonal speed from a computer system than s currently possble (.e. sequental systems). Areas need great computatonal
More informationBalanced Ant Colony Algorithm for Scheduling DAG to Grid Heterogeneous System
Internatonal Journal of Scentfc & Engneerng Research Volume 2, Issue 6, June-2011 1 Balanced Ant Colony Algorthm for Schedulng DAG to Grd Heterogeneous System Mrs. Smtha Jha Abstract- Ant Colony Optmzaton
More informationAn Online Delay Efficient Multi-Class Packet Scheduler for Heterogeneous M2M Uplink Traffic
An Onlne Delay Effcent Mult-Class Packet Scheduler for Heterogeneous M2M Uplnk Traffc Akshay Kumar, Ahmed Abdelhad and Charles Clancy Hume Center, Vrgna Tech Emal:{akshay2, aabdelhad, tcc}@vt.edu Abstract
More informationExtending STI for Demanding Hard-Real-Time Systems
Extendng STI for Demandng Hard-Real-Tme Systems Benamn Welch Shobht Kanaua Adarsh Seetharam Deepaksrvats Thrumala Center for Embedded Systems Research North Carolna State Unversty Ralegh, NC 27695-7256
More informationAssembler. Shimon Schocken. Spring Elements of Computing Systems 1 Assembler (Ch. 6) Compiler. abstract interface.
IDC Herzlya Shmon Schocken Assembler Shmon Schocken Sprng 2005 Elements of Computng Systems 1 Assembler (Ch. 6) Where we are at: Human Thought Abstract desgn Chapters 9, 12 abstract nterface H.L. Language
More informationThe Greedy Method. Outline and Reading. Change Money Problem. Greedy Algorithms. Applications of the Greedy Strategy. The Greedy Method Technique
//00 :0 AM Outlne and Readng The Greedy Method The Greedy Method Technque (secton.) Fractonal Knapsack Problem (secton..) Task Schedulng (secton..) Mnmum Spannng Trees (secton.) Change Money Problem Greedy
More informationResponse-Time Guarantees in ATM Networks
Response-Tme Guarantees n ATM Networks Andreas Ermedahl Hans Hansson Mkael Sjödn Department of Computer Systems Uppsala Unversty Sweden E-mal: febbe,hansh,mcg@docs.uu.se Abstract We present a method for
More informationSolutions for Real-Time Communication over Best-Effort Networks
Solutons for Real-Tme Communcaton over Best-Effort Networks Anca Hangan, Ramona Marfevc, Gheorghe Sebestyen Techncal Unversty of Cluj-Napoca, Computer Scence Department {Anca.Hangan, Ramona.Marfevc, Gheorghe.Sebestyen}@cs.utcluj.ro
More informationDLK Pro the all-rounder for mobile data downloading. Tailor-made for various requirements.
DLK Pro the all-rounder for moble data downloadng Talor-made for varous requrements www.dtco.vdo.com Smply brllant, brllantly smple Always the rght soluton The DLK Pro s the VDO product famly, whch sets
More informationHybrid Job Scheduling Mechanism Using a Backfill-based Multi-queue Strategy in Distributed Grid Computing
IJCSNS Internatonal Journal of Computer Scence and Network Securty, VOL.12 No.9, September 2012 39 Hybrd Job Schedulng Mechansm Usng a Backfll-based Mult-queue Strategy n Dstrbuted Grd Computng Ken Park
More informationDynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution
Dynamc Voltage Scalng of Supply and Body Bas Explotng Software Runtme Dstrbuton Sungpack Hong EE Department Stanford Unversty Sungjoo Yoo, Byeong Bn, Kyu-Myung Cho, Soo-Kwan Eo Samsung Electroncs Taehwan
More informationA Model Based on Multi-agent for Dynamic Bandwidth Allocation in Networks Guang LU, Jian-Wen QI
216 Jont Internatonal Conference on Artfcal Intellgence and Computer Engneerng (AICE 216) and Internatonal Conference on etwork and Communcaton Securty (CS 216) ISB: 978-1-6595-362-5 A Model Based on Mult-agent
More informationOverview. Basic Setup [9] Motivation and Tasks. Modularization 2008/2/20 IMPROVED COVERAGE CONTROL USING ONLY LOCAL INFORMATION
Overvew 2 IMPROVED COVERAGE CONTROL USING ONLY LOCAL INFORMATION Introducton Mult- Smulator MASIM Theoretcal Work and Smulaton Results Concluson Jay Wagenpfel, Adran Trachte Motvaton and Tasks Basc Setup
More informationTECHNICAL REPORT AN OPTIMAL DISTRIBUTED PROTOCOL FOR FAST CONVERGENCE TO MAXMIN RATE ALLOCATION. Jordi Ros and Wei K Tsai
TECHNICAL REPORT AN OPTIMAL DISTRIUTED PROTOCOL FOR FAST CONVERGENCE TO MAXMIN RATE ALLOCATION Jord Ros and We K Tsa Department of Electrcal and Computer Engneerng Unversty of Calforna, Irvne 1 AN OPTIMAL
More informationChannel 0. Channel 1 Channel 2. Channel 3 Channel 4. Channel 5 Channel 6 Channel 7
Optmzed Regonal Cachng for On-Demand Data Delvery Derek L. Eager Mchael C. Ferrs Mary K. Vernon Unversty of Saskatchewan Unversty of Wsconsn Madson Saskatoon, SK Canada S7N 5A9 Madson, WI 5376 eager@cs.usask.ca
More informationEfficient Distributed File System (EDFS)
Effcent Dstrbuted Fle System (EDFS) (Sem-Centralzed) Debessay(Debsh) Fesehaye, Rahul Malk & Klara Naherstedt Unversty of Illnos-Urbana Champagn Contents Problem Statement, Related Work, EDFS Desgn Rate
More informationCombined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors
Combned Functonal Parttonng and Communcaton Speed Selecton for Networked Voltage-Scalable Processors Jnfeng Lu, Pa H. Chou, Nader Bagherzadeh epartment of Electrcal & Computer Engneerng Unversty of Calforna,
More informationApplication of Improved Fish Swarm Algorithm in Cloud Computing Resource Scheduling
, pp.40-45 http://dx.do.org/10.14257/astl.2017.143.08 Applcaton of Improved Fsh Swarm Algorthm n Cloud Computng Resource Schedulng Yu Lu, Fangtao Lu School of Informaton Engneerng, Chongqng Vocatonal Insttute
More informationSimulation Based Analysis of FAST TCP using OMNET++
Smulaton Based Analyss of FAST TCP usng OMNET++ Umar ul Hassan 04030038@lums.edu.pk Md Term Report CS678 Topcs n Internet Research Sprng, 2006 Introducton Internet traffc s doublng roughly every 3 months
More informationAdaptive Connection Admission Control for Mission Critical Real-Time Communication Networks Abstract 1 Introduction
Adaptve Connecton Admsson Control for Msson Crtcal Real-Tme Communcaton etwors B. Devalla, A. Sahoo, Y. Guan, C. L, R. Bettat and W. Zhao Department of Computer Scence, Texas A&M Unversty, College Staton,
More informationTechnical Report. i-game: An Implicit GTS Allocation Mechanism in IEEE for Time- Sensitive Wireless Sensor Networks
www.hurray.sep.pp.pt Techncal Report -GAME: An Implct GTS Allocaton Mechansm n IEEE 802.15.4 for Tme- Senstve Wreless Sensor etworks Ans Koubaa Máro Alves Eduardo Tovar TR-060706 Verson: 1.0 Date: Jul
More informationA Knowledge Sharing Resource Library Platform Based on Multivariate Large Data Predictive Compensation
A Knowledge Sharng Resource Lbrary Platform Based on Multvarate Large Data Predctve Compensaton Yng Wang Informaton Engneerng Insttute, Informaton Teachng Appled Technology Extenson Center, Chongqng Vocatonal
More informationBurst Round Robin as a Proportional-Share Scheduling Algorithm
Burst Round Robn as a Proportonal-Share Schedulng Algorthm Tarek Helmy * Abdelkader Dekdouk ** * College of Computer Scence & Engneerng, Kng Fahd Unversty of Petroleum and Mnerals, Dhahran 31261, Saud
More informationAssignment # 2. Farrukh Jabeen Algorithms 510 Assignment #2 Due Date: June 15, 2009.
Farrukh Jabeen Algorthms 51 Assgnment #2 Due Date: June 15, 29. Assgnment # 2 Chapter 3 Dscrete Fourer Transforms Implement the FFT for the DFT. Descrbed n sectons 3.1 and 3.2. Delverables: 1. Concse descrpton
More informationState of the Art in Differentiated
Outlne Dfferentated Servces on the Internet Explct Allocaton of Best Effort Packet Delvery Servce, D. Clark and W. Fang A Two bt Dfferentated Servces Archtecture for the Internet, K. Nchols, V. Jacobson,
More information