A KASSPER Real-Time Signal Processor Testbed

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A KASSPER Real-Time Signal Processor Testbed Glenn Schrader 244 Wood St. exington MA, 02420 Phone: (781)981-2579 Fax: (781)981-5255 gschrad@ll.mit.

1 A KASSPER Real-Time Signal Processor Testbed Glenn Schrader 244 Wood St. exington MA, Phone: (781) Fax: (781) The Knowledge Aided Sensor Signal Processing and Expert Reasoning (KASSPER) Program is a Defense Advanced Research Projects Agency (DARPA) program which has the goal of improving the performance of Ground Moving Target Indicator (GMTI) radar systems by incorporating external sources of knowledge into the signal processing chain. The KASSPER Real-Time Signal Processor Testbed and its associated Signal Processing Architecture is a prototype radar system scheduling and signal processing framework that has been developed at Massachusetts Institute of Technology incoln aboratory (MIT ). A typical scenario in which KASSPER processing could be useful is depicted in Fig. 1. Note that the GMTI clutter environment is heterogeneous (trees, open areas, an urban area, etc). By taking advantage of prior knowledge about this environment (i.e. locations of roads, terrain contours, types of ground cover, etc.), processing algorithms can have an opportunity to improve their performance by avoiding invalid assumptions about the environment. A top level diagram of the KASSPER architecture is shown in Fig. 2. The components of this architecture that are different from a conventional radar signal processor are the knowledge database, knowledge cache, and the look-ahead scheduler. Fig. 1. A representative KASSPER problem. This work is sponsored by the Defense Advanced Research Projects Agency, under Air Force Contract F C Opinions, interpretations, conclusions, and recommendations are those of the author and are not necessarily endorsed by the United States Government.

2 Report Documentation Page Form Approved OMB No Public reporting burden for the collection of information is estimated to average 1 hour per response, including the time for reviewing instructions, searching existing data sources, gathering and maintaining the data needed, and completing and reviewing the collection of information. Send comments regarding this burden estimate or any other aspect of this collection of information, including suggestions for reducing this burden, to Washington Headquarters Services, Directorate for Information Operations and Reports, 1215 Jefferson Davis Highway, Suite 1204, Arlington VA Respondents should be aware that notwithstanding any other provision of law, no person shall be subject to a penalty for failing to comply with a collection of information if it does not display a currently valid OMB control number. 1. REPORT DATE 01 FEB REPORT TYPE N/A 3. DATES COVERED - 4. TITE AND SUBTITE A KASSPERReal-Time Embedded Signal Processor Testbed 5a. CONTRACT NUMBER 5b. GRANT NUMBER 5c. PROGRAM EEMENT NUMBER 6. AUTHOR(S) 5d. PROJECT NUMBER 5e. TASK NUMBER 5f. WORK UNIT NUMBER 7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) Massachusetts Institute of Technologyincoln aboratory 8. PERFORMING ORGANIZATION REPORT NUMBER 9. SPONSORING/MONITORING AGENCY NAME(S) AND ADDRESS(ES) 10. SPONSOR/MONITOR S ACRONYM(S) 12. DISTRIBUTION/AVAIABIITY STATEMENT Approved for public release, distribution unlimited 11. SPONSOR/MONITOR S REPORT NUMBER(S) 13. SUPPEMENTARY NOTES See also ADM001742, HPEC-7 Volume 1, Proceedings of the Eighth Annual High Performance Embedded Computing (HPEC) Workshops, September 2004., The original document contains color images. 14. ABSTRACT 15. SUBJECT TERMS 16. SECURITY CASSIFICATION OF: 17. IMITATION OF ABSTRACT UU a. REPORT unclassified b. ABSTRACT unclassified c. THIS PAGE unclassified 18. NUMBER OF PAGES 31 19a. NAME OF RESPONSIBE PERSON Standard Form 298 (Rev. 8-98) Prescribed by ANSI Std Z39-18

The knowledge database stores the 'knowledge' that both the the signal processing chain and the scheduler need to perform 'intelligent' processing.

3 The knowledge database stores the 'knowledge' that both the the signal processing chain and the scheduler need to perform 'intelligent' processing. The knowledge database reformats the knowledge data into a form that is usable by the processing chain during a pre-mission data load. During system operation, the knowledge cache holds the portion of the knowledge store that is within the radar s field of view. The knowledge pre-processing step performs real-time operations such as transformations between geographic coordinates and radar system coordinates. Fig. 2 KASSPER Architecture Block Diagram An important factor in the performance of knowledge aided signal processing algorithms is that the application of knowledge must be performed locally. This tends to cause the signal processing to be done at a finer grain than is comfortable for achieving good computational efficiency. As an aid to making processor scaling choices for knowledge aided algorithms, signal processing and knowledge database benchmarks have been developed in order to quantify the efficiencies that will actually be achievable. This talk will discuss the design of the testbed, its architecture; the testbed s software to hardware mapping, knowledge aided processing algorithms, as well as computational performance data that have been collected for important knowledge-aided processing kernels. A number of topics (such as the look-ahead scheduler) are currently areas of ongoing research. An overview of the potential benefits as well as a vision of how the architecture will incorporate knowledge aided scheduling will be presented.

4 A KASSPER Real-Time Embedded Signal Processor Testbed Glenn Schrader Massachusetts Institute of Technology incoln aboratory 28 September 2004 This work is sponsored by the Defense Advanced Research Projects Agency, under Air Force Contract F C Opinions, interpretations, conclusions, and recommendations are those of the author and are not necessarily endorsed by the United States Government. HPEC 2004 KASSPER Testbed-1

5 Outline KASSPER Program Overview KASSPER Processor Testbed Computational Kernel Benchmarks STAP Weight Application Knowledge Database Pre-processing Summary HPEC 2004 KASSPER Testbed-2

Knowledge-Aided Sensor Signal Processing and Expert Reasoning (KASSPER) MIT Program Objectives Develop systems-oriented approach to revolutionize ISR signal processing for operation in difficult

6 Knowledge-Aided Sensor Signal Processing and Expert Reasoning (KASSPER) MIT Program Objectives Develop systems-oriented approach to revolutionize ISR signal processing for operation in difficult environments Develop and evaluate highperformance integrated radar system/algorithm approaches Incorporate knowledge into radar resource scheduling, signal, and data processing functions Define, develop, and demonstrate appropriate real-time signal processing architecture Ground Moving Target Indication (GMTI) Search HPEC 2004 KASSPER Testbed-3 Synthetic Aperture Radar (SAR) Stripmap SAR Spot GMTI Track

Representative KASSPER Problem Radar System Challenges Heterogenous clutter environments Clutter discretes Dense target environments Results in decreased system performance (e.g. higher Minimum Detectable Velocity, Probability of Detection vs.

7 Representative KASSPER Problem Radar System Challenges Heterogenous clutter environments Clutter discretes Dense target environments Results in decreased system performance (e.g. higher Minimum Detectable Velocity, Probability of Detection vs. False Alarm Rate) KASSPER System Characteristics Knowledge Processing Knowledge-enabled Algorithms Knowledge ISR Repository Platform Multi-function Radar with KASSPER Multiple Waveforms System + Algorithms Intelligent Scheduling Knowledge Types Mission Goals Static Knowledge Dynamic Knowledge Convoy B auncher Convoy A. HPEC 2004 KASSPER Testbed-4

8 Outline KASSPER Program Overview KASSPER Processor Testbed Computational Kernel Benchmarks STAP Weight Application Knowledge Database Pre-processing Summary HPEC 2004 KASSPER Testbed-5

9 High evel KASSPER Architecture Intertial Navigation System (INS), Global Positioning System (GPS), etc. Sensor Data ook-ahead Scheduler Signal Processing Target Detects Data Processor (Tracker, etc) Track Data Knowledge Database e.g. Mission Knowledge e.g. Terrain Knowledge e.g. Real-time Intelligence Operator HPEC 2004 KASSPER Testbed-6 Static (i.e. Off-line ) Knowledge Source External System

10 Baseline Signal Processing Chain GMTI Signal Processing Raw Sensor Data INS, GPS, etc Data Input Task Beamformer Task GMTI Functional Pipeline Filtering Filter Task Task Detect Task Data Output Task Target Detects Data Processor (Tracker, etc) ook-ahead Scheduler Knowledge Processing Track Data Knowledge Database Baseline data cube sizes: 3 channels x 131 pulses x 1676 range cells 12 channels x 35 pulses x 1666 range cells. HPEC 2004 KASSPER Testbed-7

11 KASSPER Real-Time Processor Testbed INS, GPS, etc Processing Architecture Sensor Data Software Architecture ook-ahead Scheduler Signal Processing Results Data Processor (Tracker, etc) Knowledge Database Application Application Application Parallel Vector ibrary (PV) Kernel Kernel Kernel Off-line Knowledge Source (DTED, VMAP, etc) KASSPER Signal Processor Sensor Data Storage Surrogate for actual radar system HPEC 2004 KASSPER Testbed-8 Knowledge Storage Rapid Prototyping High evel Abstractions Scalability Productivity Rapid Algorithm Insertion 120 PPC G4 500 MHZ 4 GFlop/Sec/CPU = 480 GFlop/Sec

12 KASSPER Knowledge-Aided Processing Benefits HPEC 2004 KASSPER Testbed-9

13 Outline KASSPER Program Overview KASSPER Processor Testbed Computational Kernel Benchmarks STAP Weight Application Knowledge Database Pre-processing Summary HPEC 2004 KASSPER Testbed-10

14 Space Time Adaptive Processing (STAP) Range cell of interest? Training Data (A) Steering Vector (v) HPEC 2004 KASSPER Testbed-11 sample 1 sample 2 Solve for weights ( R=A H A, W=R -1 v) sample N-1 sample N STAP Weights (W) Training samples are chosen to form an estimate of the background Multiplying the STAP Weights by the data at a range cell suppresses features that are similar to the features that were in the training data X Range cell/w suppressed clutter

15 Space Time Adaptive Processing (STAP) Breaks Assumptions Range cell of interest? Training Data (A) Steering Vector (v) sample 1 sample 2 Solve for weights ( R=A H A, W=R -1 v) sample N-1 sample N STAP Weights (W) X Range cell/w suppressed clutter Simple training selection approaches may lead to degraded performance since the clutter in training set may not match the clutter in the range cell of interest HPEC 2004 KASSPER Testbed-12

16 Space Time Adaptive Processing (STAP) Range cell of interest? Training Data (A) Steering Vector (v) sample sample 1 2 Solve for weights ( R=A H A, W=R -1 v) sample N-1 STAP Weights (W) sample N X Range cell/w suppressed clutter Use of terrain knowledge to select training samples can mitigate the degradation HPEC 2004 KASSPER Testbed-13

17 STAP Weights and Knowledge STAP weights computed from training samples within a training region To improve processor efficiency, many designs apply weights across a swath of range (i.e. matrix multiply) With knowledge enhanced STAP techniques, MUST assume that adjacent range cells will not use the same weights (i.e. weight selection/computation is data dependant) STAP Input Training STAP Input select 1 of N Training * Weights * Weights External data STAP Output STAP Output HPEC 2004 KASSPER Testbed-14 Equivalent to Matrix Multiply since same weights are used for all columns Cannot use Matrix Multiply since the weights applied to each column are data dependant

18 Benchmark Algorithm Overview Benchmark Reference Algorithm (Single Weight Multiply) STAP Output = Weights X STAP Input Benchmark Data Dependant Algorithm (Multiple Weight Multiply) STAP Input Training Set STAP Weights N pre-computed Weight vectors * Weights applied to a column selected sequentially modulo N STAP Output Benchmark s goal is to determine the achievable performance compared to the well-known matrix multiply algorithm. HPEC 2004 KASSPER Testbed-15

19 Test Case Overview Data Set J x K x Single Weight Multiply K J X X K Multiple Weight Multiply K J N K N = # of weight matrices = 10 J and K dimension length Complex Data Single precision interleaved Two test architectures PowerPC G4 (500Mhz) Pentium 4 (2.8Ghz) HPEC 2004 KASSPER Testbed-16 dimension length Four test cases Single weight multiply/wo cache flush Single weight multiply/w cache flush Multiple weight multiply/wo cache flush Multiple weight multiply/w cache flush

20 Data Set #1 - xx Single Weight Multiply X MFOP/Sec MFOP/Sec Multiple Weight Multiply 10 X ength () ength () Single/wo flush Single/w flush Multiple/wo flush Multiple/w flush HPEC 2004 KASSPER Testbed-17

21 Data Set #2 32x32x Single Weight Multiply X 32 MFOP/Sec MFOP/Sec Multiple Weight Multiply X ength () ength () Single/wo flush Single/w flush Multiple/wo flush Multiple/w flush HPEC 2004 KASSPER Testbed-18

22 Data Set #3 20x20x Single Weight Multiply X 20 MFOP/Sec MFOP/Sec Multiple Weight Multiply X ength () ength () Single/wo flush Single/w flush Multiple/wo flush Multiple/w flush HPEC 2004 KASSPER Testbed-19

23 Data Set #4 12x12x Single Weight Multiply X 12 MFOP/Sec MFOP/Sec Multiple Weight Multiply X ength () ength () Single/wo flush Single/w flush Multiple/wo flush Multiple/w flush HPEC 2004 KASSPER Testbed-20

24 Data Set #5 8x8x Single Weight Multiply 8 8 X 8 MFOP/Sec MFOP/Sec Multiple Weight Multiply X 8 ength () ength () Single/wo flush Single/w flush Multiple/wo flush Multiple/w flush HPEC 2004 KASSPER Testbed-21

25 Performance Observations Data dependent processing cannot be optimized as well Branching prevents compilers from unrolling loops to improve pipelining Data dependent processing does not allow efficient reuse of already loaded data Algorithms cannot make simplifying assumptions about already having the data that is needed. Data dependent processing does not vectorize Using either Altivec or SSE is very difficult since data movement patterns become data dependant Higher memory bandwidth reduces cache impact Actual performance scales roughly with clock rate rather than theoretical peak performance Approx 3x to 10x performance degradation, Processing efficiency of 2-5% depending on CPU architecture. HPEC 2004 KASSPER Testbed-22

26 Outline KASSPER Program Overview KASSPER Processor Testbed Computational Kernel Benchmarks STAP Weight Application Knowledge Database Pre-processing Summary HPEC 2004 KASSPER Testbed-23

27 Knowledge Database Architecture Knowledge Manager New Knowledge (Time Critial Targets, etc) ookup GPS, INS, User Inputs, Update etc Command ook-ahead Scheduler Off-line Pre-Processing Knowledge Database Sensor Data oad/ Store/ Send New Knowledge Stored Data Signal Processing Results Stored Data Downstream Processing (Tracker, etc) Stored Data oad Knowledge Cache Knowledge Store Store Send Knowledge Processing Off-line Knowledge Reformatter Raw a priori Raster & Vector Knowledge (DTED,VMAP,etc) HPEC 2004 KASSPER Testbed-24

Static Knowledge Vector Data Each feature represented by a set of point locations: Points

e. forest, urban, etc) Standard Vector Formats Vector Smart Map (VMAP) Matrix Data

28 Static Knowledge Vector Data Each feature represented by a set of point locations: Points - longitude and latitude (i.e. towers, etc) ines - list of points, first and last points are not connected (i.e. roads, rail, etc) Areas - list of points, first and last point are connected (i.e. forest, urban, etc) Standard Vector Formats Vector Smart Map (VMAP) Matrix Data Rectangular arrays of evenly spaced data points Standard Raster Formats Digital Terrain Elevation Data (DTED) Trees (area) Roads (line) DTED HPEC 2004 KASSPER Testbed-25

29 Terrain Interpolation Sampled Terrain Height & Type data Data Geographic Position N Slant Range Terain Height Earth Radius Converting from radar to geographic coordinates requires iterative refinement of estimate HPEC 2004 KASSPER Testbed-26

30 Terrain Interpolation Performance Results CPU Type Time per interpolation Processing Rate P uSec/interpolation 144MFlop/sec (1.2%) G uSec/interpolation 46MFlop/sec (2.3%) Data dependent processing does not vectorize Using either Altivec or SSE is very difficult Data dependent processing cannot be optimized as well Compilers cannot unroll loops to improve pipelining Data dependent processing does not allow efficient reuse of already loaded data Algorithms cannot make simplifying assumptions about already having the data that is needed Processing efficiency of 1-3% depending on CPU architecture. HPEC 2004 KASSPER Testbed-27

31 Outline KASSPER Program Overview KASSPER Processor Testbed Computational Kernel Benchmarks STAP Weight Application Knowledge Database Pre-processing Summary HPEC 2004 KASSPER Testbed-28

32 Summary Observations The use of knowledge processing provides a significant system performance improvement Compared to traditional signal processing algorithms, the implementation of knowledge enabled algorithms can result in a factor of 4 or 5 lower CPU efficiency (as low as 1%-5%) Next-generation systems that employ cognitive algorithms are likely to have similar performance issues Important Research Directions Heterogeneous processors (i.e. a mix of COTS CPUs, FPGAs, GPUs, etc) can improve efficiency by better matching hardware to the individual problems being solved. For what class of systems is the current technology adequate? Are emerging architectures for cognitive information processing needed (e.g. Polymorphous Computing Architecture PCA, Application Specific Instruction set Processors - ASIPs)? HPEC 2004 KASSPER Testbed-29

Dana Sinno MIT Lincoln Laboratory 244 Wood Street Lexington, MA phone:

Dana Sinno MIT Lincoln Laboratory 244 Wood Street Lexington, MA phone: Self-Organizing Networks (SONets) with Application to Target Tracking Dana Sinno 244 Wood Street Lexington, MA 02420-9108 phone: 781-981-4526 email: @ll.mit.edu Abstract The growing interest in large arrays