IN THE UNITED STATES PATENT AND TRADEMARK OFFICE

Transcription

1 IN THE UNITED STATES PATENT AND TRADEMARK OFFICE In the Inter Partes Review of: Trial Number: To Be Assigned U.S. Patent No. 8,237,294 Filed: January 29, 2010 Issued: August 7, 2012 Inventor(s): Naohide Takamoto, Takeshi Matsumura Assignee: Nitto Denko Corporation Title: Dicing Tape-Integrated Wafer Back Surface Protective Film Panel: To Be Assigned Mail Stop Inter Partes Review Commissioner for Patents P.O. Box 1450 Alexandria, VA PETITION FOR INTER PARTES REVIEW UNDER 37 C.F.R

2 TABLE OF CONTENTS I. MANDATORY NOTICES PURSUANT TO 37 C.F.R. 42.8(a)(1)... 1 A. 37 C.F.R. 42.8(b)(1): Real Parties-In-Interest... 1 B. 37 C.F.R. 42.8(b)(2): Related Matters... 1 C. 37 C.F.R. 42.8(b)(3) and (4): Lead and Back-Up Counsel and Service Information... 1 II. PAYMENT OF FEES PURSUANT TO 37 C.F.R III. GROUNDS FOR STANDING PURSUANT TO 37 C.F.R (A)... 3 IV. 37 C.F.R (B): IDENTIFICATION OF CHALLENGE... 3 A. 37 C.F.R (b)(1): Claims for Which IPR Is Requested... 3 B. 37 C.F.R (b)(2): The Specific Art and Statutory Ground(s) on Which the Challenge is Based... 3 C. 37 C.F.R (b)(4): How the Challenged Claims are Unpatentable... 4 D. 37 C.F.R (b)(5): Evidence Supporting Challenge... 4 V. THERE IS A REASONABLE LIKELIHOOD THAT THE CHALLENGED CLAIMS ARE UNPATENTABLE A. Description of the Alleged Invention of the 294 Patent... 4 B. Summary of the Prosecution History of the 294 Patent...10 C. 37 C.F.R (b)(3): Claim Construction...12 D. Summary of Invalidity Arguments...17 E. The Challenged Claims Are Invalid in View of the Prior Art The Saiki Reference Saiki Anticipates the 294 Patent...23 VI. CONCLUSION...45 i

3 On behalf of Petitioner, LINTEC Corporation ( LINTEC ) and in accordance with 35 U.S.C. 311 and 37 C.F.R , inter partes review ( IPR ) is respectfully requested of Claims 1-5 ( the Challenged Claims ) of U.S. Patent No. 8,237,294 ( the 294 Patent ), attached hereto as Exhibit I. MANDATORY NOTICES PURSUANT TO 37 C.F.R. 42.8(a)(1) Pursuant to 37 C.F.R. 42.8(a)(1), the mandatory notices identified in 37 C.F.R. 42.8(b) are provided below as part of this Petition. A. 37 C.F.R. 42.8(b)(1): Real Parties-In-Interest LINTEC is the real party-in-interest. B. 37 C.F.R. 42.8(b)(2): Related Matters LINTEC is not aware of any proceedings in which the 294 patent is currently the subject. C. 37 C.F.R. 42.8(b)(3) and (4): Lead and Back-Up Counsel and Service Information Petitioner provides the following designation of counsel: Lead Counsel Mainak H. Mehta, Reg. No. 46,924 Back-up Counsel Robert H. Sloss, pending decision on 1 Petitioner lists the exhibits referred to in this Petition in the attached Appendix A. 1

4 pro hac vice motion Procopio, Cory, Hargreaves & Savitch LLP Procopio, Cory, Hargreaves & Savitch LLP 1020 Marsh Road 1020 Marsh Road Menlo Park, CA Menlo Park, CA Telephone: (650) Telephone: (650) Facsimile: (650) Facsimile: (650) Pursuant to 37 C.F.R (b), Powers of Attorney from LINTEC accompany this Petition. Please address all correspondence to lead and backup counsel. Petitioner consents to electronic service by at II. PAYMENT OF FEES PURSUANT TO 37 C.F.R The undersigned is paying the required fees by credit card, and authorizes the Office to charge any additional required fees set forth in 37 C.F.R (a) for this Petition, to Deposit Account No , as may be required. Review of five (5) claims is requested, and thus no excess claim fees are required. The undersigned further authorizes payment for any additional fees that may be due in connection with this Petition to be charged to the above-referenced Deposit Account. 2

5 III. GROUNDS FOR STANDING PURSUANT TO 37 C.F.R (A) Petitioner certifies that the 294 Patent is available for IPR and that Petitioner is not barred or estopped from requesting IPR of the Challenged Claims on the grounds identified in the Petition. IV. 37 C.F.R (B): IDENTIFICATION OF CHALLENGE Petitioner requests that the Challenged Claims be found unpatentable. A. 37 C.F.R (b)(1): Claims for Which IPR Is Requested Petitioner requests IPR of the Challenged Claims. B. 37 C.F.R (b)(2): The Specific Art and Statutory Ground(s) on Which the Challenge is Based IPR of the Challenged Claims is requested in view of Japanese P u b l i s h e d P a t e n t A p p l i c a t i o n No. JP to Saiki, et al. ( Saiki ). Saiki was filed on November 12, 2004 and published on June 1, Saiki is prior art under 35 U.S.C. 102(b), 2 and claims 1-5 are anticipated by Saiki. Saiki is attached hereto as Ex A certified translation of Saiki is attached hereto as Ex Reference to 35 U.S.C. 102 throughout this Petition is to the pre-aia version of this provision, applicable to the 294 Patent. 3

6 C. 37 C.F.R (b)(4): How the Challenged Claims are Unpatentable A detailed explanation of how the construed Challenged Claims are unpatentable, including the identification of where each element is found in the prior art, is provided in the discussion comparing the Challenged Claims to the prior art in Section V. D. 37 C.F.R (b)(5): Evidence Supporting Challenge An Appendix of Exhibits identifying all exhibits supporting this Petition, and assigning them exhibit numbers, is attached. Additionally, the relevance of the evidence to the challenge raised, including identifying specific portions of the evidence that support the challenge, may be found in Section V. Petitioner submits as Ex a declaration of Ron Maltiel in support of this Petition in accordance with 37 C.F.R Petitioner also attaches as Appendix B a Statement of Facts. V. THERE IS A REASONABLE LIKELIHOOD THAT THE CHALLENGED CLAIMS ARE UNPATENTABLE. A. Description of the Alleged Invention of the 294 Patent The 294 Patent includes a total of five claims, one independent claim (independent claim 1) and four dependent claims (claims 2, 3, 4 and 5). The 4

7 independent claim is directed to a dicing tape-integrated wafer back surface protective film that includes a dicing tape consisting of a base material and a pressure-sensitive adhesive layer formed on the base material. (Ex. 1001, column 31, lines 5-7.) A wafer back surface protective film is formed on the pressuresensitive adhesive layer of the dicing tape, in which the wafer back surface protective film is colored. (Ex. 1001, column 31, lines 9-15.) In the Abstract, the 294 Patent discloses that it is preferable that the colored wafer back surface protective film has a laser marking ability. The dicing tapeintegrated wafer back surface protective film can be suitably used for a flip chipmounted semiconductor device. (Ex. 1001, Abstract.) As shown in Figure 1, the dicing tape-integrated wafer back surface protective film 1 of the 294 Patent includes a dicing tape 3 having a base material 31 and a pressure-sensitive adhesive layer 32, formed on the base material 31. A wafer back surface protective film 2 is formed on the pressure-sensitive adhesive layer 32. The wafer back surface protective film 2 is colored, which is understood to mean that it is not colorless or transparent, so as to permit laser marking, for example (i.e., colored wafer back surface protective film ). (Ex. 1001, Figure 1; column 3, line 60 column 4, line 2; column 4, lines 7-16; column 8, lines ) 5

8 The 294 Patent discloses that the colored wafer back surface protective film 2 is formed on the pressure-sensitive adhesive layer 32 of the dicing tape 3 having the base material 31, and that the pressure-sensitive adhesive layer 32 is formed on the base material 31. The surface of the colored wafer back surface protective film 2, which is the surface to be attached to the back surface of the wafer, may be protected with a separator until it is attached to the back surface of the wafer, by use of pressure such as a hand roller, for example. (Ex. 1001, column 4, lines 7-16; column 26, lines ) The thickness of the dicing tape-integrated wafer back surface protective film 1 is the sum of the thickness of the wafer back surface protective film 2 and the thickness of the dicing tape 3 composed of the base material 31 and the pressuresensitive adhesive layer 32. (Ex. 1001, column 19, lines ) The thickness of the colored wafer back surface protective film 2 can be in the range of 5 to 500 µm, and may be a single layer or a laminated layer. (Ex. 1001, column 12, lines ) The ratio of the thickness of the wafer back surface protective film 2 to the 6

9 thickness of the dicing tape 3, i.e., sum of the thickness of the base material 31 and the pressure-sensitive adhesive layer 32, can be in the range of 150/50 to 3/500. (Ex. 1001, column 19, lines ) As disclosed at column 2, lines 55-59, the colored wafer back surface protective film 2 has a laser marking ability, and the dicing tape-integrated wafer back surface protective film can be suitably used for a flip chip mounted semiconductor device. (Ex. 1001, column 2, lines 55-59; column 14, lines 7-12 and 34-37; column 29, lines ) A semiconductor device may be formed by attaching a workpiece (e.g., wafer) onto the colored wafer back surface protective film, dicing the workpiece to form a chip-shaped workpiece (i.e., a semiconductor chip or a die), peeling the chip-shaped workpiece from the pressure-sensitive adhesive layer of the dicing tape that is formed with the colored wafer back surface protective film, and fixing the chip-shaped workpiece to an adherend by flip chip bonding. (Ex. 1001, column 21, lines ) In Figure 2A, the semiconductor wafer 4 is attached (i.e., press-bonded) onto the colored wafer back surface protective film 2 in the dicing tape-integrated wafer back surface protective film 1 to attach the semiconductor wafer 4 by close 7

10 adhesion, so as to result in the cut pieces not being scattered at the cut-processing of the workpiece and holding (i.e., mounting). (Ex. 1001, column 4, lines 61-64; column 21, lines ) In Figure 2B, the semiconductor wafer 4 is diced, i.e., cut into a prescribed size and individualized (i.e., formed into small pieces) to produce semiconductor chips(i.e., chip-shaped workpiece) 5. The dicing is performed according to a normal method from the circuit face side of the semiconductor wafer 4, for example. The dicing can be performed by full-cut to form a slit reaching the dicing tape-integrated wafer back surface protective film 1. (Ex. 1001, column 21, line 64 column 22, line 21.) As shown in Figure 2C, picking-up of the semiconductor chip 5 is performed 8

11 to peel the semiconductor chip 5 together with a portion of the colored wafer back surface protective film 2 and a portion of the dicing tape 3 to isolate a semiconductor chip from the semiconductor wafer, with a segment of the dicing tape-integrated wafer back surface protective film 1attached thereto. As disclosed in the 294 Patent, the method of picking-up is not particularly restricted, and conventionally known various methods can be adopted. (Ex. 1001, column 22, lines ) The picked-up semiconductor chip 5 is fixed to an adherend such as a base material by a flip chip bonding method (i.e., flip chip mounting method). The semiconductor chip 5 is fixed to the adherend 6 such that the circuit face of the semiconductor chip 5 is opposed to the adherend 6. The structure shown in Figure 2D is thus formed. (Ex. 1001, column 22, line 64 column 23, line 16.) 9

12 None of the features were novel and non-obvious when the application that issued as the 294 patent was filed on January 29, B. Summary of the Prosecution History of the 294 Patent The 294 Patent issued on August 7, 2012, from U.S. Patent Application No. 12/696,135 ( the 135 application ). The prosecution of the 135 application included two Office Actions and one amendment. On June 24, 2011, the Examiner rejected claims 1 and 3 over published application US2010/ ( Maruyama ) due to obviousness under 35 USC 103(a). (Ex. 1005, p. 146.) The Examiner also indicated the allowability of dependent claims 2, 4 and 5, which correspond to claims 2, 4 and 5 of the 294 Patent. (Id., pp 147.) In response to the Office Action, applicant disqualified Maruyama by noting that the February 26, 2010 effective filing date of Maruyama is after the January 29, 2010 actual filing date of the 135 application. (Id., p. 73.) The Examiner issued a second Office Action dated December 12, 2011, in which claims 1-5 were rejected under 35 USC 102(b) based on published application US2006/ ( Tandy ), as well as based on non-statutory obviousness-type double patenting in view of US Application Nos. 12/975,641 and 12/696,112. (Id., pp ) 10

13 In response, the applicant filed an Amendment on March 9, 2012, in which claim 1 was amended to add thickness and ratio limitations. (Id., pp. 51.) More specifically, claim 1 was amended to recite that the wafer back surface protective film is colored and has a thickness of 5 to 500 µm, and wherein a ratio of the thickness of the wafer back surface protective film to the thickness of the dicing tape is 150/50 to 3/500. The applicant argued that Tandy fails to anticipate claim 1, because Tandy does not teach the above-noted claimed thickness or ratio limitations added by amendment. Further, the applicant argued that Tandy also fails to anticipate claim 4, because the manner of applying the marking tape to an adherend by flip-chip bonding of Tandy is not the same as fixing the chip-shaped workpiece to an adherend by flip-chip bonding as claimed, and that the surface of the chip-shaped workpiece of the claims of the 135 application is protected with the colored wafer back surface protective film during the flip-chip bonding step. 3 (Id., pp ) The Examiner allowed the claims on March 27, 2012 without providing a reason 3 Applicant also requested that the provisional double patenting rejections be held in abeyance. A Terminal Disclaimer was neither filed by applicant nor required by the Examiner during the prosecution of this application. 11

14 for allowance. (Id., pp ) On June 8, 2012, applicant filed an Information Disclosure Statement (IDS) citing the Japanese-language Saiki reference, along with a translation of an anonymous Third Party Submission to the Japanese Patent Office (JPO), as a Communication dated April 6, (Id., pp ) The June 8, 2012 IDS was initialed by the Examiner on July 6, (Id., pp. 3-5.) The Examiner was not supplied with an English translation or Abstract of the Japanese language Saiki reference, nor was the Examiner provided with the counterpart US Patent Application Publication No. 2006/ (published on May 18, 2006) or issued US Patent No. 7,935,574 (published on May 3, 2011). C. 37 C.F.R (b)(3): Claim Construction A claim subject to IPR is given its broadest reasonable construction in light of the specification of the patent in which it appears. 37 C.F.R. 4 While the IDS as submitted by Applicant indicates that the JPO Correspondence indicates the degree of relevance found by an Examiner in the Japanese Patent Office, the translation is an anonymous Third Party Submission submitted to the JPO by an unidentified entity, not an Office Action issued by an Examiner of the JPO. 12

15 42.100(b). Petitioner expressly reserves the right to submit different constructions for claim terms should district court, or other, proceedings take place under the claim construction standard applicable to those proceedings. Petitioner submits, for purposes of this IPR only, the following claim terms should be construed as follows: 1. dicing tape-integrated wafer back surface protective film (claims 1-5) The preamble to claim 1 uses the terms dicing tape and wafer back surface protective film. Those terms also appear in limitations [a] and [b] of the claim and are therefore construed in sections 2 through 10, below. Under the broadest reasonable interpretation in light of the specification, the term integrated as it is used in the 294 Patent should be construed as a combination or forming together of the dicing tape with the wafer back surface protective film. This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at column 2, lines 38-41; column 4, lines 7-16; Ex at 38a.) 2. dicing tape (Claims 1-5) Under the broadest reasonable interpretation in light of the specification, 13

16 the term dicing tape should be construed as a structure, having one or more layers, resulting from the lamination of a base material and a pressure-sensitive adhesive layer which is capable of being cut. The resulting structure is the dicing tape, which is used as a backing tape during wafer dicing to hold dies together as the cutting process takes place. This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at col. 15, lines 5-11; Ex at 38b.) 3. base material (Claims 1-5) Under the broadest reasonable interpretation in light of the specification, the term base material should be construed as a material used to support layers applied to it. In the 294 patent, the dicing tape includes a base material, which supports a pressure-sensitive adhesive layer. This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at col. 15, lines 9-64; Ex at 38c.) 4. pressure sensitive adhesive layer (Claims 1-5) Under the broadest reasonable interpretation in light of the specification, the term pressure sensitive adhesive layer should be construed as a layer made of one or more pressure sensitive adhesives, which bonds to an adherend in 14

17 response to pressure. In the 294 Patent, the pressure sensitive adhesive layer is supported by the base material, and bonds to an adherend (i.e., the color back surface protective film 2). (Ex at column 4, lines 17-27) This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at col. 15, line 65-col. 18, line 53; Ex at 38d) 5. wafer back surface protective film (Claims 1-5) Under the broadest reasonable interpretation in light of the specification, the term wafer back surface protective film should be construed as a protective film for supporting the workpiece by being in close adhesion during dicing, and protecting a back surface of a semiconductor chip after dicing. This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at col. 4, lines and at column 3, lines 62-67; Ex at 38e.) 6. dicing (Claims 1-5) Under the broadest reasonable interpretation in light of the specification, the term dicing should be construed as cutting, such as cutting a workpiece. This construction is consistent with the plain meaning, in the context of the

18 Patent, and is supported by the 294 Patent s specification. (Ex at col. 4, lines 30-31; Ex at 38f.) 7. laser marking ability (Claim 2) Under the broadest reasonable interpretation in light of the specification, the term laser marking ability should be construed as an evaluation of the marking of a laser to the wafer back surface protective film. This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at column 24, lines and column 29, lines 40-58; Ex at 38g.) 8. flip chip-mounted semiconductor device (Claims 3 and 5) Under the broadest reasonable interpretation in light of the specification, the term flip chip-mounted semiconductor device should be construed as a semiconductor device fixed to a substrate with the circuit face of the chip opposed to an electrode-formed face of the substrate. This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at col. 1, lines 20-24; Ex at 38h.) 9. workpiece (Claims 4 and 5) Under the broadest reasonable interpretation in light of the specification, 16

19 the term workpiece should be construed as the object being worked on, in this case a semiconductor wafer. This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at col. 2, lines 28-29; Ex at 38i.) 10. flip chip bonding (Claim 4) Under the broadest reasonable interpretation in light of the specification, the term flip chip bonding should be construed as the fixing of a semiconductor chip to an adherend in a form where the circuit face of the semiconductor chip is opposed to the adherend. The back surface of the semiconductor chip may be protected with the attached wafer back surface protective film during flip-chip bonding. This construction is consistent with the plain meaning, in the context of the 294 Patent, and is supported by the 294 Patent s specification. (Ex at col. 22, line 64-col. 23, line 16; Ex at 38j.) D. Summary of Invalidity Arguments Claims 1-5 are anticipated under 35 USC 102(b) by Saiki. Saiki is a Japanese Patent Application publication, which was published on June 1, 2006 and is prior art under 35 USC 102(b). 17

20 E. The Challenged Claims Are Invalid in View of the Prior Art The Petitioner provides a detailed discussion of how the asserted prior art references invalidate the Challenged Claims. 1. The Saiki Reference Claims 1-5 are anticipated by Saiki. (Exs. 1002, 1003.) Saiki is a published Japanese Patent Application Publication, having a publication date of June 1, Saiki was published in the Japanese language, and a certified translation is provided as Exhibit 1003.) 5 5 Although Saiki was submitted in its original Japanese language form during the prosecution of the 294 Patent, there was no Abstract or machine language translation submitted in the June 8, 2012 IDS. Further, the counterpart US Patent publications of Saiki, including US Patent Application Publication No. 2006/ (published on May 18, 2006) and US Patent No. 7,935,574 (published on May 3, 2011), were also not cited in the IDS. Additionally, the Statement of Relevance only provides partial explanation to the Examiner with respect to the then-pending claims. For at least these reasons, Petitioner submits that the Examiner did not have sufficient English language information to fully appreciate the relevance of Saiki to the claims of the 294 Patent. 18

21 Saiki discloses a marking method and sheet for protective film formation and dicing. As noted in the summary section of Saiki, the problem to be solved is related to marking of the protective film formed on a workpiece so as to present a sheet for protective film formation and dicing. The marking method involves a lamination that comprises a support film stretched across a ring frame, a protective film that is removably laminated on the support film, and a workpiece that is fixed to the protective film. The protective film is marked by irradiating a laser light from the support film side. (Ex at (57) Summary.) 6 Saiki discloses the concept of face down mounting, such that a chip that is used has convex portions called bumps formed on the circuit surface of the chip. The convex portions on the circuit surface are connected to the base to guarantee conductivity. (Ex at [0002].) In Figure 2, a sheet 12 is provided for protective film forming as well as dicing. The sheet 12 includes a support film 1, a removable pressure-sensitive 6 Under the format used in Saiki, (57) appears at the top of page 2, and the quoted language is found in the Means of Solution paragraph. Unless otherwise indicated, citations to Saiki are in the format [xxxx], where the numbers in the brackets correspond to paragraphs, or at times several paragraphs, in the reference. 19

22 adhesive 3, and a protective film formation layer 2. (Ex at [0021].) The protective film formation layer 2 has a thickness of preferably from 3 to 100 µm, more preferably from 10 to 60 µm. (Ex at [0056].) Figure 2 Further, where the protective film formation layer 2 is laminated on the removable pressure- sensitive adhesive 3, for protective film formation and dicing, it is possible, but not required, to provide a release film that has a release surface on its top surface, to improve the removability of the protective film. (Ex at [0061].) The release film is used to protect the surface of the removable pressuresensitive adhesive and it is removed just before the removable pressure-sensitive adhesive is attached to an adherend. (Ex at [0061], [0062].) The protective film formation layer 2 may be colored so that clear lettering can be formed by laser marking so as to increase the recognizability of the text. Further, the marking may be performed by inscribing a bottom face of the protective film 2 by irradiating laser light from the side of the support film 1. (Ex. 20

23 1003 at [0053], [0055].) Various support films are disclosed. For example, a polyethylene napthalate (PEN) film having a thickness of 100 µm as a support film is disclosed, on which corona treatment is performed on one surface. Coated and dried pressure-sensitive adhesive is provided on the processed surface, so that the film thickness of the pressure-sensitive adhesive after drying was 10 µm. To protect the adhesive surface of the support film, a removable release film was laminated thereon. (Ex at [0081].) Saiki also discloses a process for producing a semiconductor device, including use of a sheet for protective film formation and dicing 12. For example, Saiki discloses that the process includes the following steps: a. The circuit is formed on the top surface of a wafer by a method such as etching, and bumps are formed at predetermined locations on the circuit surface. b. The bottom surface of the wafer is ground to a predetermined thickness. c. The bottom surface of the wafer is fixed to a dicing sheet stretched across a ring frame, and then the wafer is cut and separated into various circuits by a dicing saw, to obtain semiconductor chips. 21

24 d. The semiconductor chips are picked up, mounted on a predetermined base by the face-down method. (Ex at [0002], [0003].) In the foregoing process, the use of the sheet for protective film formation and dicing 12 sheet is disclosed as illustrated in Figure 2 and Working Examples 2 and 4. (Ex at [0087]-[0089] and [0094]-[0095].) For example, [0087] of Saiki refers to coating and drying of the protective film formation layer, and laminating another release film on the surface thereof. Further, [0088] of Saiki refers to the cutting and the manufacture of the sheet for protective film formation and dicing with the structure of Figure 2, and Saiki at [0089] refers to the adhering, curing, laser marking, dicing, pickup, and removal in Working Example 2, which are performed similarly to that of Working Example 1. In Working Example 1, at [0086] of Saiki, the foregoing steps are explained in detail. These processes are also disclosed, for example, at [0070], [0074] and [0075], and illustrated in Figure 6 and Figure 7 of Saiki. (Ex at Figures 6 and 7, and [0070]-[0075].) 22

25 2. Saiki Anticipates the 294 Patent A claim-by-claim comparison of the 294 Patent with Saiki establishes that each limitation of each claim of the 294 Patent is disclosed by Saiki. a) Claim 1 Claim 1 of the 294 Patent states: 1. A dicing tape-integrated wafer back surface protective film comprising: [a] a dicing tape comprising a base material and a pressuresensitive adhesive layer formed on the base material; and 23

26 [b] a wafer back surface protective film formed on the pressuresensitive adhesive layer of the dicing tape; [c] wherein the wafer back surface protective film is colored and has a thickness of 5 to 500 µm; and [d] wherein a ratio of the thickness of the wafer back surface protective film to the thickness of the dicing tape is from 150/50 to 3/500. Each of the limitations of claim 1 is disclosed by Saiki. Preamble: A dicing tape-integrated wafer back surface protective film comprising Giving the terms of this preamble the broadest reasonable interpretation in light of the specification, the term dicing tape-integrated wafer back surface protective film claimed in the preamble is a protective film to protect the back surface of a wafer, having a constitution of a wafer back surface protective film being formed on a pressure-sensitive adhesive layer of a dicing tape, which is in turn formed on a base material of the dicing tape. As explained in detail below with respect to limitations [a] and [b] of claim 1, Saiki discloses each of the components which comprise the dicing tape-integrated wafer back surface 24

27 protective film, and therefore anticipates the preamble of claim 1. Saiki discloses a protective film in Figures 1-3. For example, in Figure 2, a sheet for protective film formation 12, is provided for protective film formation and dicing. (Ex at [0021], [0023].) The protective film protects the bottom surface of the workpiece (e.g., wafer). (Ex at [0003], [0018].) As explained below, the sheet 12 includes protective film formation layer 2, which is formed on a removable pressure-sensitive adhesive 3, which is in turn formed on a support film 1. (Ex at Figure 2, [0021]; Ex at 57.) Accordingly, the sheet for protective film formation 12, as illustrated in Figure 2 and as described in the disclosure of Saiki as noted above precisely discloses a dicing tape-integrated wafer back surface protective film as claimed. a. a dicing tape comprising a base material and a pressure-sensitive adhesive layer formed on the base material 25

28 Giving the terms of this limitation the broadest reasonable interpretation in light of the specification, the dicing tape claimed in limitation [a] is a product resulting from the lamination of: (i) a material used to support layers applied to it ( base material ), and (ii) a layer made of one or more pressure sensitive adhesives ( pressure sensitive adhesive layer ). (Ex at col. 15, line 5 col. 18, line 53.) Saiki discloses each of these elements. A pressure-sensitive adhesive is an adhesive which forms a bond when pressure is applied to the adhesive, and is thus attached to the adherend. The specification of the 294 Patent explains that an appropriate pressure sensitive adhesive is not particularly restricted and can be suitably selected among known pressure-sensitive adhesives, including silicone-based pressure-sensitive adhesives. (Ex at col. 15, line 67 col. 16, line 8; Ex at 50.) Saiki discloses a removable pressure-sensitive adhesive. (Ex at [0058]). Saiki also provides Working Examples. In the Working Examples, Saiki describes what it refers to as Pressure-Sensitive Adhesive B, which is a silicone pressure-sensitive adhesive, similar to the pressure-sensitive adhesive referenced in the 294 Patent. (Ex at [0079]; Ex at col. 15, line 67 col. 16, line 8; Ex at 51.) The removable pressure-sensitive adhesive may have one or 26

29 more layers. (Ex at [0059].) Saiki also discloses the formation of the pressure-sensitive adhesive layer on the base material. According to Saiki, the removable pressure-sensitive adhesive 3 of Saiki is formed on the support film 1 as shown in the Working Examples as Support Film B, which discloses a PEN film coated with Pressure-Sensitive Adhesive B; Support Film B is adhered to a protective film formation layer, followed by dicing. (Ex at [0081], [0088].) Accordingly, the support film 1 and removable pressure-sensitive adhesive 3 as illustrated in Figure 2 (shown above) and as described in the disclosure of Saiki as noted above precisely discloses a dicing tape comprising a base material and a pressure-sensitive adhesive layer formed on the base material as claimed. (Ex at 53.) b. a wafer back surface protective film formed on the pressuresensitive adhesive layer of the dicing tape Limitation [b] of claim 1 of the 294 Patent recites a wafer back surface protective film formed on the pressure-sensitive adhesive layer of the dicing tape. Giving the terms of this limitation the broadest reasonable interpretation in light of the specification, the wafer back surface protective film recited in this 27

30 limitation is a protective film for supporting the workpiece by adhesion during dicing, and protecting a back surface of a semiconductor chip after dicing. (Ex at col. 4, lines ) Saiki discloses a protective film 2 formed on the removable pressuresensitive adhesive layer 3 of the dicing tape (i.e., removable pressure-sensitive adhesive layer 3 formed on support film 1). (Ex at Figure 2, [0021].) The protective film 2 protects a bottom (i.e., back) surface of a workpiece (i.e., wafer), and is thus a wafer back surface protective film: The sheet (12) for protective film formation and dicing shown in Figure 2 comprises a support film (1), a removable pressure-sensitive adhesive (3) that is formed on the support film (1), and an approximately circular protective film formation layer (2) that is formed on a central region of the removable pressure-sensitive adhesive (3). (See also Ex at [0003]-[0005], [0012], [0074]; Ex at 55.) Accordingly, the protective film 3 formed on the removable pressuresensitive adhesive layer 3 as illustrated in Figure 2 (shown above) and as described in the disclosure of Saiki as noted above precisely discloses a wafer back surface protective film formed on the pressure-sensitive adhesive layer of the dicing tape as claimed. (Ex at 56.) 28

31 c. wherein the wafer back surface protective film is colored and has a thickness of 5 to 500 µm 7 Limitation [c] of claim 1 requires that the wafer back surface protective film be colored, and that it have a thickness of 5 to 500 µm. The term wafer back surface protective film is discussed above with respect to the foregoing claim limitation [b]. Saiki discloses that the protective film 2 may be colored, thus anticipating this claim limitation. (Ex at [0053].) Further, Saiki discloses a thickness of the protective film as more preferably being from 10 to 60 µm, which is within the claim range of 5 to 500 µm. (Ex at [0056]; Ex at 59.) Accordingly, the colored protective film 2 having a thickness between 10 and 60 µm as described in the disclosure of Saiki as noted above precisely discloses wherein the wafer back surface protective film is colored and has a 7 During prosecution of the 294 Patent, the English Statement of Relevance submitted by Patentee on June 8, 2012, which is the translation of an anonymous Third Party Submission submitted to the JPO by an unidentified entity on April 6, 2012, did not include any explanation as to whether Saiki discloses that the wafer back surface has a thickness of 5 to 500 µm as recited in claim 1. 29

32 thickness of 5 to 500 µm as claimed. (Ex at 60.) The Federal Circuit has held that where prior art discloses a range that by calculation is entirely within a claimed range, that claim limitation is anticipated. Titanium Metals Corp. v. Banner, 778 F.2d 775, 781, 227 U.S.P.Q. 773 (Fed. Cir. 1985) (Ex. 1006). d. wherein a ratio of the thickness of the wafer back surface protective film to the thickness of the dicing tape is from 150/50 to 3/ Limitation [d] of claim 1 of the 294 Patent requires a ratio of the thickness of the wafer back surface protective film (described in limitation [b]) to the thickness of the dicing tape (described in limitation [a]) of from 150/50 (or 3.0) on the high end to 3/500 (or 0.006) on the low end. A calculation of the ratio of the same elements in Saiki demonstrates that the high-end and low-end ratios are 8 During prosecution of the 294 Patent, the English Statement of Relevance submitted by Patentee on June 8, 2012, which is the translation of an anonymous Third Party Submission submitted to the JPO by an unidentified entity on April 6, 2012, did not include any explanation as to whether Saiki discloses that wherein a ratio of the thickness of the wafer back surface protective film to the thickness of the dicing tape is from 150/50 to 3/500 as recited in claim 1. 30

33 entirely within the range claimed in limitation [d]. As noted above, the thickness of the protective film 2 disclosed in Saiki is more preferably from 10 to 60 µm. (Ex at [0056].) The thickness of the dicing tape (or, under the terminology used in Saiki, sheet for protective film and dicing ), is the sum of the removable pressure-sensitive adhesive 3 and the support film 1. Saiki s Working Examples under Support Film B disclose the thickness of the support film as the PEN film having a thickness of 100 µm and a pressuresensitive adhesive having a thickness after drying of 10 µm, thus resulting in a total thickness of 110 µm for the dicing tape (or sheet ). (Ex at [0081]; Ex at 62.) The ratio of the protective film to the dicing tape (or sheet ) is thus (10µm)/(110 µm), or 0.09, on the low end, to (60 µm)/(110 µm), or 0.54, on the high end. The high-end to low-end ratio disclosed in Saiki (0.54 to 0.09) is therefore fully and precisely within the high-end to low-end ratio claimed in claim 1 of the 294 Patent (3.0 to 0.006). Accordingly, a ratio of the colored protective film 2 having a thickness between 10 and 60 µm, with respect to a thickness of the support film 1 and the removable pressure-sensitive adhesive of 110 µm, as described in the disclosure of Saiki as noted above, precisely discloses wherein a ratio of the thickness of the 31

34 wafer back surface protective film to the thickness of the dicing tape is from 150/50 to 3/500 as claimed. (Ex at 63.) b) Claim 2 Claim 2 of the 294 Patent recites: 2. The dicing tape-integrated wafer back surface protective film according to claim 1, wherein said colored wafer back surface protective film has a laser marking ability. Each of the limitations of claim 2 is disclosed by Saiki. Saiki discloses that if the protective film formation layer 2 is colored (i.e., includes the abovementioned filler, pigment, or dye) then it is possible to form clear lettering by a method such as laser marking on the cured film (protective film). (Ex at [0055]; Ex at ) Because Saiki is capable of performing laser marking for the protective film formation layer 2 being colored, Saiki precisely discloses wherein said colored wafer back surface protective film has a laser marking ability as claimed. c) Claim 3 Claim 3 of the 294 Patent recites: 3. The dicing tape-integrated wafer back surface protective film 32

35 according to claim 1, which is used for a flip chip-mounted semiconductor device. Each of the limitations of claim 3 is disclosed by Saiki. Saiki discloses that the face down method of mounting for the manufacture of semiconductor devices. (Ex at [0002], [0003].) Flip chip mounting is based on the face down mounting of electrical components, and the terms are synonymous to those skilled in the art; 9 further, the steps of the process disclosed in [0003] of Saiki are the steps of flip chip mounting. (Ex at ) Moreover, it is well known in the art that the term flipped refers to the face down orientation of the electrical components during the mounting process. (Ex at 68.) Because Saiki discloses and is directed to a face down method of 9 The fact that a prior art reference uses different terminology than the patent claims does not disqualify the reference from anticipating the patent as long as the reference discloses the limitations of the patent. Akzo N.V. v. U.S. Int l Trade Comm n, 808 F.2d 1471, 1479 & n. 11, 1 U.S.P.Q.2d 1241 (Fed. Cir. 1986) (Ex. 1007); In re Bond, 910 F.2d 831, , 15 U.S.P.Q.2d 1566 (Fed. Cir. 1990) (Ex. 1008). 33

36 mounting, Saiki precisely discloses the dicing tape-integrated wafer back surface protective film according to claim 1, which is used for a flip chip-mounted semiconductor device as claimed. (Ex at 70.) d) Claim 4 Claim 4 of the 294 Patent states: 4. A process for producing a semiconductor device using a dicing tape-integrated wafer back surface protective film, said process comprising steps of: [a] attaching a workpiece onto said colored wafer back surface protective film of the dicing tape-integrated wafer back surface protective film according to claim 1, [b] [c] dicing the workpiece to form a chip-shaped workpiece, peeling the chip-shaped workpiece from the pressure-sensitive adhesive layer of the dicing tape together with said colored wafer back surface protective film, and [d] fixing the chip-shaped workpiece to an adherend by flip chip bonding. Each of the limitations of claim 4 is precisely and fully disclosed by Saiki. 34

37 Preamble: A process for producing a semiconductor device using a dicing tape-integrated wafer back surface protective film, said process comprising 10 This preamble requires a process for producing a semiconductor using the dicing tape-integrated wafer back surface protective film disclosed in claim 1. Petitioner refers to the above discussion of the dicing tape-integrated wafer back surface protective film with respect to claim 1. Because, as explained in detail below with respect to limitations [a] through [d] of claim 4, Saiki also precisely discloses each of the recited steps which comprise the process for producing a semiconductor device using the protective film, Saiki anticipates the preamble of claim 4. Specifically, Saiki discloses a process for producing a semiconductor device, including the use of a dicing. For example, Saiki discloses that the process includes the following steps: a. The circuit is formed on the top surface of a wafer by a method such as etching, and bumps are formed at predetermined locations on the circuit 10 While Claim 4 appears to be a process claim based on its preamble, Petitioner notes that claim 4 depends from claim 1, which is a product claim. 35

38 surface. b. The bottom surface of the wafer is ground to a predetermined thickness. c. The bottom surface of the wafer is fixed to a dicing sheet stretched across a ring frame, and then the wafer is cut and separated into various circuits by a dicing saw, to obtain semiconductor chips. d. The semiconductor chips are picked up, mounted on a predetermined base by the face-down method, and if necessary in order to protect the chip there may be applied a resin seal, or there may be applied a resin coating on the bottom surface of the chip, to obtain a semiconductor device. (Ex at [0002], [0003]; Ex at 73.) Saiki also discloses methods of manufacturing, using the sheet 12 (as shown in Figure 2) for protective film formation and dicing in Working Examples 2 and 4. (Ex at [0089], [0095]; Ex at 74.) Because Saiki discloses and is directed to a mounting to make a semiconductor device, Saiki precisely discloses a process for producing a semiconductor device using a dicing tape-integrated wafer back surface protective film as claimed. (Ex at [0087]-[0089], [0094]-[0095]; Ex at 75.) a. attaching a workpiece onto said colored wafer back surface 36

39 protective film of the dicing tape-integrated wafer back surface protective film according to claim 1, Giving the terms of this limitation the broadest reasonable interpretation in light of the specification, the workpiece claimed in this limitation is the object being worked on, in this case the semiconductor wafer. Further, as demonstrated above in the discussion of claim 1, Saiki precisely discloses a colored wafer back surface protective film of a dicing tape-integrated wafer back surface protective film. (Ex at 76.) Saiki also discloses adhering (i.e., attaching) the protective film formation layer (i.e., layer 2) of the sheet for protective film formation and dicing (i.e., sheet 12) to the polished surface of a wafer. (Ex at [0086]; Ex at 77.) Because Saiki discloses and is directed to adhering a polished surface of the wafer to the protective film formation layer 2 of the sheet 12, Saiki precisely discloses attaching a workpiece onto said colored wafer back surface protective film of the dicing tape-integrated wafer back surface protective film according to claim 1 as claimed. (Ex at 78.) b. dicing the workpiece to form a chip-shaped workpiece, Saiki discloses dicing the wafer (i.e., workpiece) and protective film 37

40 formation layer (i.e., layer 2). Working Examples 2 and 4 of Saiki state: The adhering of the wafer, the thermal curing of the protective film formation layer, the laser marking, the dicing, the pick-up, and the removal from the ring frame were performed similarly to that of Working Example 1. (Ex at [0089], [0095].) Working Examples 2 and 4 disclose manufacturing methods associated with the structure in Figure 2 of Saiki. As the above quote from [0089] and [0095] establishes, the methods associated with Figure 2 of Saiki are similar to those associated with Working Example 1. In Working Example 1, which relates to Figure 1, Saiki discloses dicing the wafer (i.e., workpiece) and protective film formation layer (i.e., layer 2). (Ex at [0086]; Figure 6; Ex at 79.) Further, Saiki discloses an example of dicing the wafer to make it into semiconductor chips, and using a chip size of 5 mm 5 mm, which indicates that the result of the dicing is a chip-shaped workpiece. (Ex at [0074], [0086]; Figure 6; Ex at 79.) The dicing disclosed by Saiki in Figure 6 (which is shown below) of the wafer and protective film formation layer of the structure described in Figure 1 thus also applies to the structure disclosed in Figure 2, including the wafer, pressure-sensitive adhesive layer and protective film formation layer of the structure described in Figure 2 (Ex at 79), which is 38

41 the same structure as the dicing tape-integrated wafer back protective film claimed in the 294 Patent. (Ex at [0089], [0095].) Because Saiki discloses and is directed to dicing the wafer and the protective film formation layer 2 of the sheet 12, and uses a chip size, Saiki precisely discloses dicing the workpiece to form a chip-shaped workpiece as claimed. (Ex at 80.) c. peeling the chip-shaped workpiece from the pressure-sensitive adhesive layer of the dicing tape together with said colored wafer back surface protective film Saiki discloses peeling the workpiece from the pressure-sensitive adhesive lawyer of the dicing tape together with said colored wafer back protective film. Working Examples 2 and 4 of Saiki state that the pick-up step of the manufacturing process is performed similarly to that [step] of Working Example 39

42 1. (Ex at [0089], [0095].) In Working Example 1, Saiki discloses using a die bonder to pick-up (i.e., peel) the chip 5 together from the pressure-sensitive adhesive layer 3 of the dicing tape (i.e., pressure-sensitive adhesive layer 3, and support film 1 as layers of sheet 12), with the protective film attached. (Ex at [0086]; Figure 7; Ex at 81.) The pick-up disclosed by Saiki in Figure 7 (below) of the chip with the protective film attached applicable to Figure 1 thus also applies to the pick-up of the chip with pressure-sensitive adhesive layer and protective film attached as in Figure 2, as stated at [0089] and [0095] (Ex at 81). The protective film formation layer 2 can be colored. (Ex at [0053].) Figure 7 of Saiki is reproduced below. Because Saiki discloses and is directed to dicing the wafer to the protective film formation layer 2 of the sheet 12, and uses a chip size, Saiki precisely discloses peeling the chip-shaped workpiece from the pressure-sensitive adhesive layer of the dicing tape together with said colored wafer back surface protective 40

43 film as claimed. d. fixing the chip-shaped workpiece to an adherend by flip chip bonding. Saiki discloses mounting the semiconductor chips on a predetermined base by the face-down method at [0004]; this mounting step is well-known in the art to be fixing a chip to an adherent, or mounting, by flip-chip bonding. (Ex at [0004]; Ex at 83.) Because Saiki discloses and is directed to mounting of the diced and picked up semiconductor chips by the face-down method, Saiki precisely discloses fixing the chip-shaped workpiece to an adherend by flip chip bonding as claimed. (Ex at 85.) e) Claim 5 Claim 5 of the 294 Patent states: 5. [a] A flip chip-mounted semiconductor device, which is manufactured using the dicing tape-integrated wafer back surface protective film according to claim 1, [b] said semiconductor device comprising a chip-shaped workpiece and the wafer back surface protective film of the dicing tape-integrated wafer back surface 41

44 protective film attached to a back surface of the chip-shaped workpiece. For at least the reasons discussed herein, each of the limitations of claim 5 is precisely and completely disclosed by Saiki. a. A flip chip-mounted semiconductor device, which is manufactured 11 using the dicing tape-integrated wafer back surface protective film according to claim 1, Giving the terms of this limitation the broadest reasonable interpretation in light of the specification, the flip chip-mounted semiconductor device claimed in the limitation is a semiconductor device fixed to a substrate with the circuit face of the chip opposed to an electrode-formed face of the substrate. Saiki discloses a process for manufacturing a semiconductor device, including a dicing sheet. (Ex at [0003].) For example, Saiki discloses the following manufacturing steps: a. The circuit is formed on the top surface of a wafer by a method such as etching, and bumps are formed at predetermined locations on the circuit 11 While Claim 5 appears to be an article of manufacture claim based on its preamble, Petitioner notes that claim 5 depends from claim 1, which is a product claim. 42