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1 UNIVERSAL STYLUS INITIATIVE (USI ) TOUCH SERIAL INTERFACE (TSI) SPECIFICATION 1.0 September 20, 2016

2 Legal Notices and Disclaimers THIS SPECIFICATION IS PROVIDED TO YOU AS IS WITH NO WARRANTIES WHATSOEVER, WHETHER EXPRESS, IMPLIED, STATUTORY, AT COMMON LAW, OR OTHERWISE. USER ASSUMES THE FULL RISK OF USING THIS SPECIFICATION. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, UNIVERSAL STYLUS INITIATIVE, INC. AND ALL AUTHORS OF THIS SPECIFICATION HEREBY DISCLAIM ANY AND ALL WARRANTIES AND CONDITIONS WITH RESPECT TO THIS SPECIFICATION AND ITS CONTENT AND THE TRADEMARKS APPEARING IN THIS SPECIFICATION, INCLUDING WITHOUT LIMITATION ANY AND ALL WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, SUITABILITY, RELIABILITY, ACCURACY, NON-INFRINGEMENT, VALIDITY OF RIGHTS, AND/OR TITLE. UNIVERSAL STYLUS INITIATIVE, INC. AND THE AUTHORS OF THIS SPECIFICATION HEREBY DISCLAIM ANY AND ALL LIABILITY OF ANY KIND, INCLUDING WITHOUT LIMITATION, LIABILITY FOR INFRINGEMENT OF ANY PROPRIETARY RIGHTS AND LIABILITY FOR PRODUCT DEFECTS AND PRODUCTS LIABILITY CLAIMS, RELATING TO USE AND/OR IMPLEMENTATION OF INFORMATION IN THIS SPECIFICATION. IN NO EVENT SHALL UNIVERSAL STYLUS INITIATIVE, INC. AND/OR THE AUTHORS OF THIS SPECIFICATION BE LIABLE FOR ANY ACTUAL, DIRECT, INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, PUNITIVE, EXEMPLARY, OR ENHANCED DAMAGES ARISING FROM YOUR USE AND/OR IMPLEMENTATION OF INFORMATION IN THIS SPECIFICATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN ADVANCE. THE PROVISION OF THIS SPECIFICATION TO YOU DOES NOT PROVIDE YOU, AND NOTHING IN THIS SPECIFICATION SHALL BE DEEMED AS GRANTING YOU, WITH ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO USE ANY CONTENT OR TRADEMARKS DESCRIBED OR CONTAINED IN THIS SPECIFICATION OR TO ANY INTELLECTUAL PROPERTY RIGHT OWNED OR CONTROLLED BY UNIVERSAL STYLUS INITIATIVE, INC. OR THE AUTHORS OF THIS SPECIFICATION. YOU MAY HAVE BEEN GIVEN PERMISSION IN A SEPARATE WRITTEN AGREEMENT WITH UNIVERSAL STYLUS INITIATIVE, INC. TO USE THIS SPECIFICATION, AND YOUR USE IS SUBJECT TO SUCH AGREEMENT. UNIVERSAL STYLUS INITIATIVE, USI, USI UNIVERSAL STYLUS INITIATIVE & Pen Design, Pen Design, and USI CERTIFIED are registered and unregistered trademarks, service marks, and certification marks of Universal Stylus Initiative, Inc. in the United States and other countries. Unauthorized use strictly prohibited Universal Stylus Initiative, Inc. All rights reserved. Unauthorized use strictly prohibited. (Certain portions copyright MIPI Alliance, Inc. Used by Universal Stylus Initiative, Inc. with permission of MIPI Alliance, Inc.) MIPI is registered mark, and D-PHY is a service mark, of MIPI Alliance, Inc., and are used with permission. 2

3 Revision History Rev. Date Revision Scope 0.5 2/25/2016 Cleaned up version incorporating the comments for the proposal from TIWG review /20/2016 Incorporated USI TIWG accepted feedback Refined to specify transaction packet definition in TSI Transaction Procorol Layer Refined TSI Device Application and Transaction Protocol Layers to be PHY independent /17/2016 Incorporated USI TIWG accepted feedback. Clarifications on Frame/micro-frame/Touch Data Transaction packets more clearly detailed /07/2016 Clarified the TSI Initialization flow. Clarified the Frame and micro-frame relationship. Removed and merged the TSI Power State register into the TSI_CFG register. Removed power state information from the TSI_STATE register. Added Trigger transactions and Escape Mode sequence for Request Touch data /13/2016 Added flow to retrieve report descriptors, and modify the relevant register set / data type accordingly Add the explicit mentions to prohibit 0 payload size long transactions and to prohibit the max packet size length to 0 Add the capability to slice large siz ebluk write transaction into muptiple transactions Minor editorial wording and drawing changes /20/2016 Version update to ask for USI board approval for USI All member review 3

4 Acknowledgements The authors of this specification would like to recognize the following people who participated in USI Touch Interface Technical Working Group. We would also like to thank others in the USI Promoter companies and throughout the industry who contributed to the development of this specification. We also would like to acknowledge our liaison relationship with MIPI Alliance, and thank MIPI for both granting USI permission to reference the MIPI D-PHY specification and for granting a copyright license to certain MIPI material directly included in the TSI specification. Cirque Corporation Jared Bytheway Intel Corporation Ajay Bhatt Anoop Mukker Anton Cheng Arvind Kumar Daniel Nemiroff David Vogel Kevin Zhenyu Zhu Nobu Suzuki Shiva Aditham Solomon Systech (UK) Limited Chris Hill STMicroelectronics N.V. Muhammad Umair Synaptics Incorporated Jeff Lukanc Wacom Co., Ltd. Dave Fleck 4

5 Table of Contents REVISION HISTORY... 3 ACKNOWLEDGEMENTS... 4 TABLE OF CONTENTS... 5 TABLE OF FIGURES... 9 TABLE OF TABLES INTRODUCTION DOCUMENT SCOPE DOCUMENT ORGANIZATION REFERENCES TSI OVERVIEW TSI INTERFACE LAYER MODEL TSI Device Application Layer TSI Transaction Protocol Layer TSI Link Layer TSI Physical Layer D-PHY TSI SYSTEM ARCHITECTURE MODEL DEVICE APPLICATION LAYER TSI TOUCH-IC REGISTER SET Required Registers Summary Offset 0x00: TSI_INT_CAUSE: TSI Interrupt Cause Register Offset 04h: TSI_STATE: TSI IC State Register Offset 08h: TSI_ERR: TSI Error Register Offset 0Ch: TSI_DATA_SZ: TSI Data Size Register Offset 10h: TSI_CFG: TSI Configuration Register Offset 14h: TSI_CAP: TSI Capabilities Register Offset 18h: TSI_RSVD Offset 1Ch: TSI_HW_ID_REG: Vendor HW Information Register Offset 20h: TSI_IC_REV_INFO: Vendor Revision ID Register Offset 24h: TSI_FW_REV_INFO: FW Revision ID Register Offset 28h: TSI_SW_COMPATIBILITY_VER: TSI SW Compatibility ID Register Offset 2Ch: TSI_SPEC_COMPATIBILITY_VER: TSI Specification Compatibility ID Register TSI TOUCH DATA STRUCTURES Touch Data Header

6 3.2.2 Touch Data Payload Write Data Header Write Data Payload TSI BEHAVIORAL MODEL TSI Touch-IC Initialization Frame Types: HID Reports or Proprietary Data TSI Frame and Micro-frame Relationship Configuring HID or Proprietary Data Mode TSI Touch-IC Proprietary Data Processing HID Report Touch Data Processing HID Reports Embedded Within Proprietary Data Switching between Proprietary and HID modes TSI Configuration and Management Operations TSI Interrupt Handing ERROR HANDLING Reset and Initialization Error Handling Dropped Frames Error Recovery TSI Bus Error Handling TSI Specification Violations Non-Fatal Error as Payload Data TSI Error Interrupt TSI TOUCH-IC POWER STATES Touch-IC State Definitions TSI TRANSACTION PROTOCOL LAYER TSI TRANSACTION TYPES AND FORMATS Short Transaction Long Transaction Trigger Transaction Data Identifier TSI HOST CONTROLLER TO TSI TOUCH-IC TRANSACTION FORMATS Request-Touch Data Request-Touch Register Read Request-Touch Register Write Request-Bulk Data Write Set PHY-CLK Frequency Request Maximum Touch data payload size capacity

7 4.2.7 Set Maximum Touch data payload size Request-Maximum non-touch data payload size capacity Set Maximum non-touch data payload size TSI TOUCH-IC TO TSI HOST CONTROLLER TRANSACTION FORMATS Response - Touch Data Response-Touch Register Read Response-ACK with Error Report Response -Maximum Touch data payload size capacity Response -Maximum non-touch data payload size capacity TRANSACTION LAYER ERROR HANDLING Touch-IC Error Reporting TSI Transaction Layer Specific errors SYSTEM SERVICES (INFORMATIVE) TSI HOST CONTROLLER SIDE Interrupt Interrupt Acknowledge and Interrupt Service ACK Forwarding ACKWithError Forwarding TSI LINK LAYER UPPER LINK LAYER (ULL) Link Layer Packets LOWER LINK LAYER (LLL) TSI State-Machine to D-PHY mapping TSI Bus Initialization Idle state Interrupt State Touch data transmission mode Touch-IC configuration mode Link ULPS TSI TRANSACTION TYPES ON D-PHY LINK LAYER ERROR HANDLING D-PHY Errors D-PHY Protocol Watchdog Timer TSI packet ECC error TSI packet check-sum error

8 7 D-PHY APPLICATION REQUIREMENT FOR TSI D-PHY SPECIFICATION REFERENCE TSI CLOCK LANE TSI DATA LANE TSI TLPX AND HS UI REFERENCE CHANNEL MODEL (INFORMATIVE) SPREAD SPECTRUM CLOCKING ADAPTIVE CLOCKING TSI LP ESCAPE ENTRY CODE MAPPING APPENDIX A DEFINITIONS, ACRONYMS AND ABBREVIATIONS A.1 DEFINITIONS A.2 ACRONYMS AND ABBREVIATIONS

9 Table of Figures FIGURE 1-1: TOUCH AND STYLUS SUBSYSTEM OVERVIEW FIGURE 2-1: TSI INTERFACE LAYER MODEL FIGURE 2-2: OVERVIEW OF TSI PHY - LPDT TRANSFER MODE FIGURE 2-3: OVERVIEW OF TSI-PHY HSDT TRANSFER MODE FIGURE 2-4: SYSTEM ARCHITECTURE FIGURE 3-1: TSI TOUCH FRAME AND MICRO-FRAME RELATIONSHIP FIGURE 3-2: TSI PROPRIETARY DATA PROCESSING FIGURE 3-3: TSI HID MODE PROCESSING FIGURE 3-4: GET DESCRIPTOR PROCESSING FIGURE 3-5: SET FEATURES PROCESSING FIGURE 3-6: GET FEATURES PROCESSING FIGURE 3-7: TOUCH-IC POWER STATES FIGURE 4-1: SHORT TRANSACTION FORMAT FIGURE 4-2: LONG TRANSACTION FORMAT FIGURE 4-3: TRIGGER TRANSACTION FORMAT FIGURE 4-4: REQUEST TOUCH DATA TRANSACTION STRUCTURE FIGURE 4-5: REQUEST TOUCH REGISTER READ TRANSACTION STRUCTURE FIGURE 4-6: REQUEST TOUCH REGISTER WRITE TRANSACTION STRUCTURE FIGURE 4-7: BULK DATA SLICE INTO MULTIPLE BULK DATA WRITE TRANSACTIONS FIGURE 4-8: BULK DATA WRITE TRANSACTION STRUCTURE FIGURE 4-9: SET PHY-CLK FREQUENCY TRANSACTION STRUCTURE FIGURE 4-10: REQUEST MAXIMUM TOUCH DATA PAYLOAD CAPACITY FIGURE 4-11: SET MAXIMUM TOUCH DATA PAYLOAD TRANSACTION STRUCTURE FIGURE 4-12: REQUEST-MAXIMUM NON-TOUCH DATA PAYLOAD CAPACITY TRANSACTION STRUCTURE FIGURE 4-13: SET MAXIMUM NON-TOUCH DATA PAYLOAD SIZE TRANSACTION STRUCTURE FIGURE 4-14: ONE RAW FRAME OR MICRO-FRAME DATA SLICE INTO MULTIPLE TOUCH DATA TRANSACTIONS FIGURE 4-15: RESPONSE-TOUCH DATA TRANSACTION STRUCTURE FIGURE 4-16: TERMINATION OF MULTIPLE TOUCH DATA TRANSACTIONS FIGURE 4-17: RESPONSE-TOUCH REGISTER READ TRANSACTION STRUCTURE FIGURE 4-18: RESPONSE-ACK WITH ERROR REPORT TRANSACTION STRUCTURE FIGURE 4-19: RESPONSE-MAXIMUM TOUCH DATA PAYLOAD SIZE CAPACITY FIGURE 4-20: RESPONSE-MAXIMUM NON-TOUCH DATA PAYLOAD SIZE CAPACITY FIGURE 6-1: LINK LAYER SHORT PACKET FORMAT FIGURE 6-2: LINK LAYER LONG PACKET FORMAT FIGURE 6-3: TSI PACKET ENDIAN POLICY

10 FIGURE 6-4: 16BIT CRC GENERATION USING A SHIFT REGISTER FIGURE 6-5: TSI STATE-MACHINE DIAGRAM FIGURE 6-6: TSI INITIALIZATION SEQUENCE FIGURE 6-7: ULPS ENTRY SEQUENCE FIGURE 6-8: DATA LANE ULPS ENTRY ABORTION CASES FIGURE 6-9: ULPS EXIT SEQUENCE INITIATED BY THE TSI HOST CONTROLLER FIGURE 6-10: ULPS EXIT SEQUENCE INITIATED BY THE TOUCH-IC FIGURE 6-11: TOUCH-IC TO TSI HOST CONTROLLER BTA INCOMPLETION AND RETRY FIGURE 7-1: TSI REFERENCE CHANNEL MODEL FOR 1GBPS DATA RATE FIGURE 7-2: SSC DEFINITION FOR HS-CLK

11 Table of Tables TABLE 3-1: REQUIRED TOUCH-IC REGISTER SET TABLE 3-2: OFFSET 0X00: TSI_INT_CAUSE: TSI INTERRUPT CAUSE REGISTER DESCRIPTION TABLE 3-3: OFFSET 04H: TSI_STATE: TSI IC STATE REGISTER DESCRIPTION TABLE 3-4: OFFSET 08H: TSI_ERR: TSI ERROR REGISTER DESCRIPTION TABLE 3-5: OFFSET 0CH: TSI_DATA_SZ: TSI DATA SIZE REGISTER DESCRIPTION TABLE 3-6: OFFSET 10H: TSI_CFG: TSI CONFIGURATION REGISTER DESCRIPTION TABLE 3-7: OFFSET 14H: TSI_CAP: TSI CAPABILITIES REGISTER DESCRIPTION TABLE 3-8: OFFSET 1CH: TSI_HW_ID_REG: VENDOR HW INFORMATION REGISTER DESCRIPTION TABLE 3-9: OFFSET 20H: TSI_IC_REV_INFO: VENDOR REVISION ID REGISTER DESCRIPTION TABLE 3-10: OFFSET 24H: TSI_FW_REV_INFO: FW REVISION ID REGISTER DESCRIPTION TABLE 3-11: OFFSET 28H: TSI_SW_COMPATIBILITY_VER: TSI SW COMPATIBILITY ID REGISTER DESCRIPTION TABLE 3-12: OFFSET 2CH: TSI_SPEC_COMPATIBILITY_VER: TSI SPECIFICATION COMPATIBILITY ID REGISTER DESCRIPTION TABLE 3-13: TOUCH DATA HEADER TABLE 3-14: WRITE DATA HEADER TABLE 4-1: SHORT TRANSACTION STRUCTURE TABLE 4-2: TRIGGER TRANSACTION STRUCTURE TABLE 4-3: DATA IDENTIFIER (DI) DEFINITION TABLE 4-4: SUMMARY OF TSI TRANSACTION DATA TYPES TABLE 4-5: ERROR MESSAGE FROM THE TOUCH IC TO THE TSI HOST CONTROLLER TABLE 4-6: TOUCH-IC RESPONSES TO THE HOST CONTROLLER TABLE 4-7: THE TRANSACTION LAYER LEVEL TSI ERROR LIST TABLE 6-1: ECC PARITY GENERATION RULES TABLE 6-2: CLK LANE INITIALIZATION TABLE 6-3: DATA LANE INITIALIZATION TABLE 6-4: T INIT_MASTER AND T INIT_SLAVE IN TSI LINK LAYER TABLE 6-5: PHY INTERFACE STATUS IN IDLE STATE TABLE 6-6: INTERRUPT STATE ENTRY/EXIT TABLE 6-7: TOUCH DATA TRANSMISSION SEQUENCE TABLE 6-8: CONFIGURATION REQUEST/ACKNOWLEDGE SEQUENCE IN TOUCH-IC CONFIGURATION MODE TABLE 6-9: CONFIGURATION REQUEST/DATA RESPONSE IN TOUCH-IC CONFIGURATION MODE TABLE 6-10: ULPS TIMING PARAMETERS TABLE 6-11: LIST OF ALL HSDT/LPDT TRANSACTIONS TABLE 6-12: D-PHY ERROR TYPES AND THE CORRESPONDING ACTIONS FOR THE TOUCH-IC AND HOST CONTROLLER TABLE 6-13: D-PHY PROTOCOL WATCHDOG TIMER TYPES AND THE CORRESPONDING ACTIONS FOR THE TOUCH-IC AND HOST CONTROLLER TABLE 6-14: TOUCH-IC TO TSI HOST CONTROLLER BTA INCOMPLETION AND RETRY SEQUENCE

12 TABLE 6-15: T BTA_RETRY SPECIFICATION TABLE 7-1: CLOCK LANE MODULES FOR THE HOST CONTROLLER AND THE TOUCH-IC TABLE 7-2: DATA LANE MODULES FOR THE HOST CONTROLLER AND THE TOUCH-IC TABLE 7-3: T LPX SPECIFICATION TABLE 7-4: HS UI SPECIFICATION TABLE 7-5: HS-CLK SPREAD SPECTRUM CLOCKING PARAMETERS TABLE 7-6: HS-CLK SPREAD SPECTRUM CLOCKING PARAMETERS TABLE 7-7: LP ESCAPE ENTRY CODE MAPPING FOR TSI

13 1 Introduction Universal Stylus Initiative (USI ) is an industry organization comprised of touch controller and stylus engineering experts from over 30 member companies. USI is focused on creating interoperable standards for Stylus and Touch subsystems and ecosystem. The goal is to provide standards that help reduce the implementation and adoption barriers by creating universal standards. Separate USI specifications are targeted to address specific parts of the ecosystem. USI Stylus and Device specification defines the standard protocol between a USI stylus and a USI controller (also often known as a Touch Controller, or Touch-IC). This is represented by the dotted line box in Figure 1-1. This specification defines the interface and the protocol between the USI Controller and the Host Controller. This is marked as the Host Interface in Figure 1-1. USI System Device Host Controller Host Interface USI Controller Sense Lines Downlink Touch Sensor / Digitizer Figure 1-1: Touch and Stylus subsystem overview Uplink USI Stylus In existing implementations today, the Host Interface is a physical interface bus-such as I2C, SPI and USB. An implementer specific data transfer protocol is used over that physical bus. There are many limitations to the implementations today. I2C does not provide enough bandwidth to support usages of today especially when the Proprietary touch data processing needs to be done in the host processor SPI requires high pin-count and still does not meet bandwidth needs for larger screens (15 and above) Larger form-factors require longer trace lengths between the USI Controller and the Host Controller. SPI has EMI issues running for longer trace lengths Increasing requirements of higher touch and stylus report rates requires more data transfer Various implementations are keen on providing higher resolution touch with smaller sensor pitch. This requires even more data transfer capability. There is a need for lower pin-count bus that can support higher data bandwidth and longer trace lengths. In addition an abstracted data transfer primitives that can work for different implementations is required. This is the focus of this TSI specification. 13

14 The TSI specification doesn t prohibit any particular physical layer (PHY) implementation and as long as the above stated shortcomings are addressed such a PHY can be utilized (with corresponding changes at lower layers see section 2.1). 1.1 Document Scope This document defines Touch Serial Interface (TSI), which is the electrical and logical interconnection between the Host Controller and the USI Controller. TSI uses MIPI Alliance Specification for D-PHY version 2.0 (D-PHY, find the formal name in References ) as its Physical Layer of choice. As D-PHY is specified as a super-set for multiple use cases, there are many specifications and features which are defined as an application choice. Thus, the document specifies how TSI uses the D-PHY, and further defines the higher level transaction protocol over D-PHY, and use of it by touch device application. This is further defined in the next chapter that provides overview of TSI. This document is intended for implementers who are developing TSI based host controller, USI/Touch Controller and TSI SW driver. This document is written for the technical representatives of the USI partner companies. 1.2 Document Organization Chapter 2 provides high level overview of TSI Chapter 3 provides the specification of TSI Device Application Layer. Chapter 4 describes the specifications of TSI Transaction Protocol Layer. Chapter 5 describes System Services, which is not relevant as the data transaction of TSI, but essential and underlying TSI Device Application Layer. Chapter 6 describes the specifications of TSI Link Layer. Chapter 7 describes the selection of D-PHY specifications and features for TSI application, as D-PHY Application Requirement for TSI. 1.3 References Reference Number Document 1 MIPI Alliance Specification for D-PHY, version 2.0, MIPI Alliance, Inc., 23 November MIPI Alliance Specification for Display Serial Interface (DSI), version 1.1, MIPI Alliance, Inc., 22 November MIPI Alliance Specification for Camera Serial Interface 2 (CSI-2), version 1.1, MIPI Alliance, Inc., 18 July USI Device and Stylus Specification 1.0 Version

15 15

16 2 TSI Overview (It is noted that from the chapter onward, the host controller introduced in Introduction is denoted as TSI Host Controller or The host controller, and USI Controller is denoted as TSI Touch-IC or Touch-IC.) TSI is defined as a layered architecture. The upper layers of the protocol are independent of the PHY selection. This allows a greater reuse of these layers on different physical interfaces. The lower layers of the protocol define the specific PHY selection, and the parts of the protocol that are PHY-dependent. 2.1 TSI Interface Layer Model TSI is composed of TSI Device Application Layer, TSI Transaction Protocol Layer, TSI Link layer and the selected PHY as shown in the figure below. TSI Host Controller Device Application Layer Transaction Protocol Layer Link Layer Physical Layer (PHY) TSI Touch-IC Device Application Layer Transaction Protocol Layer Link Layer Physical Layer (PHY) PHY independent Layers PHY dependent Layers Physical Interconnect Figure 2-1: TSI Interface Layer Model TSI Device Application Layer covers TSI Touch-IC initialization after the PHY-specific initialization has taken place, different operating modes of TSI Touch-IC and the mandatory register set TSI Touch-IC vendor shall implement. TSI Transaction Protocol Layer is defined such that no PHY dependent semantics are used at this layer and up. This allows for easily migrating to a different PHY and keep rest of the design (hardware and firmware) intact. TSI Link Layer is responsible for reliable transmission of the transactions on the specific PHY and may have PHY dependent fields and requirements. TSI PHY serves the electric signal level communication between the host controller and TSI Touch-IC. In addition to layer specific sections, the system support section describes the primitives TSI Host Controller and TSI Touch-IC shall implement from a functional perspective. This section is informative in nature since the how of implementation is left to vendors. 16

17 2.1.1 TSI Device Application Layer TSI Device Application Layer serves a high level interaction model between TSI Host Controller and TSI Touch-IC in TSI application. It consists of TSI behavior model, Touch-IC Power States, Data Structures and TSI Touch-IC Register set TSI Transaction Protocol Layer TSI Transaction Protocol Layer serves an abstracted communication model between TSI Host Controller and TSI Touch-IC. The layer provides the methods to request or to receive controls and data between TSI Host Controller and TSI Touch-IC TSI Link Layer TSI Link Layer is responsible for shielding the upper layers from the PHY specifics and facilitates reliable transmissions of the packets on the PHY. In order to achieve that objective, TSI Link layer actually consists of two sub layers Upper Link Layer (ULL) and Lower Link Layer (LLL). ULL will have the data reliability functions like ECC and Checksum calculations. LLL will have more PHY dependent functions like TSI state and operational mode definition, TSI initialization that is built on top of D-PHY specification, transaction transmission mode mapping, etc TSI Physical Layer D-PHY TSI specification applies MIPI alliance D-PHY as its PHY. The mapping between TSI states and D-PHY is covered in section The Touch-IC is the major data source and the host controller is the major data sink, as a large amount of the touch Proprietary data will be transferred from the Touch-IC to the TSI Host Controller. TSI is composed of 1 clock (CLK) lane (2 wires) and 1 Data lane (2 wires). In total, it requires 4 wires for the communication. The Touch-IC provides D-PHY high-speed (HS) CLK via CLK lane. D-PHY has two operating modes - High- Speed Data Transmission (HSDT) and Low-Power Data Transmission (LPDT) as shown in the figures below. The touch data is transferred in HSDT mode from the Touch-IC. Both the host controller and the Touch-IC utilize the LPDT mode in order to support the low-bandwidth communications, such as the Touch-IC control and associated data, Acknowledge and so on as well as the protocols required by D-PHY. All mentioned communications is done on the Data lane. 17

18 TSI Host controller CLK lane Data lane (not correlated to Data lane) LPDT (bi-directional) CLK lane Data lane TSI Touch IC Figure 2-2: Overview of TSI PHY - LPDT Transfer mode TSI Host controller Major data sink CLK lane Data lane 2.2 TSI System Architecture Model HS-CLK HSDT (source to sink only) CLK lane Data lane Figure 2-3: Overview of TSI-PHY HSDT Transfer mode TSI Touch IC Major data source The following diagrams illustrates the system architecture required to support a TSI based Touch-IC. 18

19 Software OS Stack TSI IHV SW TSI Host Driver Platform FW Motherboard hardware TSI Host Controller System NV Memory Touch-IC FW OOB Reset TSI Bus 0 TSI Touch IC Figure 2-4: System Architecture The following system components take part in the behavioral models described throughout this specification: TSI Touch-IC: An ASIC to control a touch sensor, composed of an analog front end (AFE), a memory, a micro controller and some other digital logic circuits. TSI Host Controller: TSI Bus: A host bus adapter that acts as a bridge between a system level bus and the Touch-IC. TSI Host Controller and TSI Touch-IC communicate via the TSI bus and an out of band (OOB) reset pin described in other sections of this document. In this specification TSI-Bus or simply bus refers to the complete set of data and clock lanes on given TSI interface implementation between two components. In a system, it is possible that there may be more than one TSI bus implementation in the system. The number following TSI Bus/bus indicates which of those interfaces is being referenced. System NV Storage for Touch-IC FW: 19

20 TSI Host Driver: Platform FW: TSI IHV SW: OS Stack: As a BOM cost savings improvement (or because of TSI Touch-IC design constraint) the FW executing inside TSI Touch-IC may be stored within NV memory on the host system instead of within TSITouch-IC. NV memory could be system flash where the Platform Firmware (FW) image resides, the local HDD/SSD, emmc Flash etc. The behavioral sequences describing the loading of TSI Touch-IC FW from system-based NV storage to TSI Touch-IC are described later in TSI Touch-IC Initialization. The TSI Host Driver represents the SW executing on the host CPU that supports the TSI Host Controller. This SW typically operates in ring0 that is part of the HID stack within the executing operating system. As with any driver, the TSI Host Driver is responsible for serializing access to the TSI Host Controller HW, performing initialization operations, controlling power management, etc. If TSI operations are required prior to the main operating systems load, Platform FW shall act in a similar fashion as to the TSI Host Driver. This component is primarily responsible for the host based processing that occurs to convert Proprietary data from the Touch-IC to HID reports. This component may also be responsible for operation such as configuration and management operations such as Touch-IC FW updates. The details of host based touch processing are beyond the scope of this specification. This component is the consumer of touch reports from the TSI Host Driver or TSI IHV SW. The details of OS consumption of the touch reports, in general, are beyond the scope of this specification. TSI Host Terminology: In the subsequent sections the term TSI Host is used frequently to describe host based actions in the behavioral model. When used, TSI Host actions could be implemented in either the TSI Host Controller or TSI Host Driver, depending on the implementation of the TSI Host Controller vendor. TSI Out of Band (OOB) Reset TSI OOB Reset is the logic level signal provided from TSI Host Controller. It is connected with TSI Touch-IC reset pin or some equivalent pin, for TSI Host Driver to invoke TSI Touch-IC power-on reset. The specification of TSI OOB Reset signal level, polarity and the timing is outside the scope of TSI specification. It is TSI system implementer s responsibility, to implement TSI OOB reset and provide access to TSI Host Driver to manipulate it. Also it is the implementer s responsibility, to 20

21 gate TSI Touch-IC power supply long enough to discharge TSI Touch-IC, so as it will start its power-on reset when the power supply is enabled after that. 21

22 3 Device Application Layer This chapter describes in detail the Touch-IC initialization, different touch operating and power modes of Touch-IC and the required register set that shall be implemented by all Touch-IC vendors. In order to facilitate easier understanding of the initialization and configuration, the register set that shall be implemented by all Touch-IC vendors is described first. 3.1 TSI Touch-IC Register Set The following defines the register set a TSI-based Touch-IC shall implement in order to be considered compatible with this specification. Register space addressing is reserved from 0x00 to 0xFFF allowing for a 4KB register space, though significantly less registers are actually allocated at this time Required Registers Summary Each Touch-IC vendor is required to implement the following registers to ensure configuration, touch processing modes and error handling are supported. This section will be followed by description of each register in detail. In each register table, the Access column refers to host side access rights. In some cases it may be Read-Only (RO) or Read-Write (RW) etc. Table 3-1: Required Touch-IC Register Set Register Name Register Symbol Register Start Register End TSI Interrupt Cause Regsiter TSI_INT_CAUSE 00h 03h TSI IC State Register TSI_STATE 04h 07h TSI Error Register TSI_ERR 08h 0Bh TSI Data Size Register TSI_DATA_SZ 0Ch 0Fh TSI Configuration TSI_CFG 10h 13h TSI Capabilities TSI_CAP 14h 17h Reserved Reserved 18h 1Bh TSI Vendor HW Information TSI_HW_ID_REG 1Ch 1Fh TSI Vendor Revision Information TSI_IC_REV_INFO TSI FW Revision Information TSI_FW_REV_INFO 24h 27h TSI SW Compatibility TSI_SW_COMPATIBILITY_VER 28h 2Bh TSI Specification Compatibility TSI_SPEC_COMPATIBILITY_VER Reserved Registers Reserved 30h FFFh 20h 2Ch 23h 2Fh 22

23 3.1.2 Offset 0x00: TSI_INT_CAUSE: TSI Interrupt Cause Register This register contains interrupt cause information for the Touch-IC. It is read by the TSI Host components on every interrupt. The Interrupt Type field is relevant for every interrupt. The remaining fields are valid only for the read_data_available interrupt. Table 3-2: Offset 0x00: TSI_INT_CAUSE: TSI Interrupt Cause Register Description Access Default Description Frame Type: This bit indicates whether the read data for the current interrupt from the sensor is Proprietary data or a HID report. 31 RO 0b 0: Proprietary Data 1: HID Report *This bit is only valid when Interrupt Type is read_data_available. Each micro-frame within a frame shall set this bit to the same value. 30 RO 0b End of Frame (EOF)*: This bit indicates the current micro-frame is the final micro-frame for a given frame. If a Touch-IC has a single micro-frame per frame, or if Frame Type is HID Report, the EOF bit shall be set by the Touch-IC to 1b. *This bit is only valid when Interrupt Type is read_data_available. 29:28 RO 0h Reserved 27:4 RO 0h Micro-Frame Size (MFS): Indicates the size of data to be read from the TSI sensor in byte granularity. A value of 0 means no data will be transferred. This allows up to 16MB 1B per micro-frame. The micro-frame size shall be a multiple of 16 bytes, except for the last micro-frame of a frame. Interrupt Type: Indicates the reason for the Interrupt 0: No Interrupt Pending 1: read_data_available indicates data is ready to be read. 3:0 RO 0h 2: reset_occurred indicates a reset occurred. 3: error_occurred indicates an error occurred. 4: config_change indicates the value of the TSI_CFG register has changed by the TSI Touch IC. This occurs at the same time as the Touch IC changes the value of the TE bit. 5-15: Reserved if set, the TSI Host shall ignore the interrupt. 23

24 3.1.3 Offset 04h: TSI_STATE: TSI IC State Register This register contains the operational state of the Touch-IC. Table 3-3: Offset 04h: TSI_STATE: TSI IC State Register Description Access Default Description 31:3 RO 0h Reserved 2:0 RO 0h State: 0: NOT_READY. Touch-IC is not ready typically set prior to the reset interrupt being generated 1: READY_FOR_OPERATION 2: FW_NEEDED. Touch-IC needs its FW image loaded by the TSI Controller 3: DATA_NEEDED Touch-IC needs Data loaded by the TSI Controller 4: NON_FATAL_ERROR 5: FATAL_ERROR Offset 08h: TSI_ERR: TSI Error Register This register is read by the TSI Host when the TSI_INT_CAUSE: Interrupt Type field is set to Error. The TSI Host Driver will send the all 32 bits of error information to the IHV TSI SW and interpret the lower 16 bits internally. Table 3-4: Offset 08h: TSI_ERR: TSI Error Register Description Access Default Description 31:16 RO 0h Vendor Specific Standard Errors Bits. Bit 0: Invalid FW 15:0 RO 0h Bit 1: Invalid Data Bit 2: Self-Test Failed Bit 3-15: Reserved Offset 0Ch: TSI_DATA_SZ: TSI Data Size Register This register describes the maximum size of frames and feedback data. 24

25 Table 3-5: Offset 0Ch: TSI_DATA_SZ: TSI Data Size Register Description Access Default Description 31:28 RO 0h Reserved Maximum Write Size: 27:18 RO 0h This value describes the larger of: Maximum feedback size in 64byte increments, including the Write Data Header which is 8 bytes. Largest Get/Set Feature command to be sent to the Touch-IC in 64 byte increments, including the Write Data Header which is 8 bytes. Largest HID Output Report to be sent to the Touch-IC in 64 byte increments, including the Write Data Header, which is 8 bytes. 10 bits allow for a maximum feedback size of 256KB. 17:0 RO 0h Maximum Frame Size: Offset 10h: TSI_CFG: TSI Configuration Register This value describes the maximum frame size in 64 byte increments. With 18 bits, this allows for a maximum frame size of 16MB. This register allows the TSI Controller to configure the touch sensor as needed during touch operations. All configurations must be made when the TE (Touch Enable) bit is cleared such that: 1) The TSI Host clears TE to a 0b and polls on TE to transition to 0b (or waits for the config_change interrupt). 2) In an atomic operation, the TSI Host executes a read-modify-write to change the configuration settings in the TSI_CFG register while setting the TE bit to a 1b. 3) The TSI Host polls on TE transitioning to a 1b (or waits for the config_change interrupt). This is an acknowledgement that the Touch IC has completed the configuration change operation. 4) The TSI Host reads the TSI_CFG register to ensure requested settings were applied. Table 3-6: Offset 10h: TSI_CFG: TSI Configuration Register Description Access Default Description 31:6 RO 0h Reserved 25

26 Power State: Writes to this field change the power state of the Touch IC. Reads, with the exception of the Soft Reset value, return the power state of the Touch IC. 0: Sleep set when the system goes into connected standby 5:3 RW 0h 1: Doze set after a pre-defined inactivity timer where the inactivity time is decided by the OS. 2: Armed Set when a finger off message is received from host SW 3: Sensing requests the Touch-IC immediately enter its maximum sensing operational mode. 4: Soft Reset. Following writing this value, the TIC will execute a reset cycle, and will place itself into the Sleep state. 5-7: Reserved. Setting these values will result in no change to the power state of the Touch- IC. 2 RW 0b 1 RW 0b 0 RW 0b HID Report Mode Enabled: 0b: Disabled 1b: Enabled Proprietary Data Mode Enabled: 0b: Disabled 1b: Enabled Touch Enable (TE): This bit is used as a HW semaphore for the Touch-IC to guarantee to the TSI Host that (when TE=0b) no sensing operations or interrupts will occur. When TE is cleared by the TSI Host: TICs must flush all output buffers TICs must De-assert any pending interrupt and no interrupts can be asserted. The TSI Controller shall throw away any partial frame data and pending interrupts will not be serviced. When TE is cleared, no interrupt is allowed. The TSI Controller will only modify the configuration of the TIC when TE is cleared. TE is defaulted to 0h on a power-on reset. HID and Proprietary Modes: During the power-on reset flows, the TSI Controller shall change TE from a 0 to a 1. At this point the TIC can issue the reset interrupt. When TE is 0, the reset interrupt must not be generated. After the power-on reset flow, TE will be primarily used during power management flows such as power-on reset operations, resuming from sleep, etc. In order to enable simultaneous HID Report and Proprietary Data sending on Frame boundaries, both mode bits (bits 1 and 2) shall be set in this register. Power State Control: 26

27 The Touch-IC shall move from Doze (or Armed) to Sensing without any host interaction after a touch has occurred. All other transitions will be made at the request of the host. There is a race condition in the case of setting Doze mode. A user may have touched the screen before the Touch-IC processes the Goto_Doze state change and hence may switch to Sending mode without actually putting the device into Doze mode. This is an acceptable behavior Offset 14h: TSI_CAP: TSI Capabilities Register This register is a read-only register that defines the capabilities of the Touch IC. Table 3-7: Offset 14h: TSI_CAP: TSI Capabilities Register Description Access Default Description 31:3 RO 0h Reserved 2 RO 0b 1 RO 0b 0 RO 0b Simultaneous HID and Proprietary Data Mode Supported: This bit indicates that the Touch IC can support simultaneous HID and Proprietary data modes such that, the TSI Host shall determine whether each data frame is Proprietary Data or a HID report based on the value of Frame Data in the TSI_INT_CAUSE register. 0b: Not Supported 1b: Supported HID Report Mode Supported: 0b: Not Supported 1b: Supported Proprietary Data Mode Supported: 0b: Not Supported 1b: Supported Offset 18h: TSI_RSVD Offset 1Ch: TSI_HW_ID_REG: Vendor HW Information Register This register is used to relay vendor assigned Device-ID and USI assigned Vendor ID information to the TSI Controller which may be forwarded to SW running on the host CPU. Table 3-8: Offset 1Ch: TSI_HW_ID_REG: Vendor HW Information Register Description Access Default Description 31:16 RO 0h Vendor Specific Device Id 27

28 15:12 RO 0h Reserved 11:0 RO 0h USI assigned Vendor Id Offset 20h: TSI_IC_REV_INFO: Vendor Revision ID Register This register is used to relay vendor HW revision information to the TSI Controller which may be forwarded to SW running on the host CPU. Table 3-9: Offset 20h: TSI_IC_REV_INFO: Vendor Revision ID Register Description Access Default Description 31:0 RO 0h HW Revision ID Offset 24h: TSI_FW_REV_INFO: FW Revision ID Register This register is used to relay vendor FW revision information to the TSI Controller which may be forwarded to SW running on the host CPU. FW Revision is Touch-IC vendor specific. Table 3-10: Offset 24h: TSI_FW_REV_INFO: FW Revision ID Register Description Access Default Description 31:0 RO 0h FW Revision Information, Touch-IC Vendor Specific Offset 28h: TSI_SW_COMPATIBILITY_VER: TSI SW Compatibility ID Register This register is used to relay vendor SW compatibility information to the TSI Controller which is forwarded to SW running on the host CPU. Table 3-11: Offset 28h: TSI_SW_COMPATIBILITY_VER: TSI SW Compatibility ID Register Description Access Default Description 31:0 RO 0h Host SW Compatibility Version vendor specific value Offset 2Ch: TSI_SPEC_COMPATIBILITY_VER: TSI Specification Compatibility ID Register This register is used to relay which version of the TSI Specification the TSI Touch-IC is compatible with. 28

29 Table 3-12: Offset 2Ch: TSI_SPEC_COMPATIBILITY_VER: TSI Specification Compatibility ID Register Description Access Default Description 31:16 RO 0h TSI Specification Major Version 15:0 RO 0h TSI Specification Minor Version 3.2 TSI Touch Data Structures The following are the data structures the Touch-IC shall support in order to facilitate communication and touch data transfers between itself and the host Touch Data Header The following 64byte structure is pre-pended by the Touch-IC to the beginning of touch data. If the amount of data that is to be written can fit within a single transaction, the Write Data Header shall be prepended to the data to be written and sent in transaction payload of Response - Touch Data. If the data to be written spans multiple bulk write transactions, only the first bulk write transaction payload shall have the Write Data Header prepended. It is transparent to the TSI Host Controller and used by host SW or other entities. Byte 0 1 Bit Table 3-13: Touch Data Header TOUCH_ DATA_TYPE_PROPRIETARY_FRAME = 0 TOUCH_ DATA_TYPE_PROPRIETARY_ERROR = 1 TOUCH_ DATA_TYPE_ HID_REPORT = 2 TOUCH_ DATA_TYPE_GET_FEATURES = 3 TOUCH_DATA_TYPE_GET_REPORT_DESCRIPTOR = 4 Other values are reserved Touch_Data_Type: : Reserved 3 4 : 7 Data_Size: The size (in bytes) of the data payload being read, not including the size of this header (Touch Data Header). The content of the data corresponds to the Touch Data Type. 8 Transaction_ID: 29

30 : A monotonic counter the Touch-IC increments with every new frame. This is used to detect frame drop events : Reserved for future growth Touch Data Payload The follow describes the Touch Proprietary Data Type value mapping: If the data type is TOUCH_DATA_TYPE_PROPRIETARY_FRAME, following the header shall be Touch IC proprietary data. If the data type is TOUCH_DATA_TYPE_PROPRIETARY_ERROR, following the header shall be Touch-IC specific error data. If the data type is TOUCH_DATA_TYPE_HID_REPORT, following the header shall be a single HID input report, with the first byte of the data payload containing the Input Report ID, and the format of the remaining data for this Input Report ID specified within the Report Descriptor for the Touch IC. If the data type is TOUCH_DATA_TYPE_GET_FEATURES, following the header shall be a single features report from the Touch-IC that is a response to a previously sent Get Features command from the host. The first byte of the data payload shall be the Features Report ID, and the format of the remaining data for this Feature Report is specified within the Report Descriptor for the Touch IC. If the data type is TOUCH_DATA_TYPE_GET_REPORT_DESCRIPTOR, following the header shall be a single descriptor from the Touch-IC in response to a previously sent Get Report Descriptor command from the host. The data payload of report descriptor is defined in the HID standard specifications outside the scope of this document Write Data Header The Write Data Header allows the Touch-IC to determine the type of data and expected length that is being written by the host. Following the header will be the actual data to be consumed by the Touch-IC. Table 3-14: Write Data Header Bit Byte write_data_type: FW_LOAD = 0 0 DATA_LOAD = 1 FEEDBACK_DATA = 2 SET_FEATURES_DATA = 3 30

31 GET_FEATURES_DATA = 4 OUTPUT_REPORT_DATA = 5 NO_DATA_USE_DEFAULTS = 6 GET_REPORT_DESCRIPTOR = 7 Other values are reserved 1 : Reserved 3 4 : 7 write_data_size: The size (in bytes) of the write data, not including the size of the Write Data Header Write Data Payload The following are definitions of Write Data Type: FW_LOAD This data type indicates the host is pushing Touch-IC FW in response to a reset condition where the Touch-IC indicates FW is needed. Following the write data header will be the Touch-IC FW. The format of the FW update is proprietary to each Touch IC. DATA_LOAD This data type indicates the host is pushing Touch-IC Data in response to a reset condition where the Touch-IC indicates data is needed. Following the write data header will be the Touch-IC data. The format of the FW update is proprietary to each Touch IC. FEEDBACK_DATA This data type indicates the host is pushing feedback data to the Touch-IC in response to a frame processing operation on the host. Touch IC specific host SW sends feedback data in a proprietary format. SET_FEATURES_DATA Set Features data is sent from higher level host SW to the Touch-IC following the Write Data Header. The first byte of the data payload is the Features Report ID, and the format of the remaining data for this Feature Report ID is specified within the Report Descriptor for the Touch IC. GET_FEATURES_DATA Get Features data is sent from higher level host SW to the Touch-IC following the Write Data Header. The first byte of the data payload is the Features Report ID. OUTPUT_REPORT_DATA Output Report data is sent from higher level host SW to the Touch-IC following the Write Data Header. The first byte of the data payload is the Output Report ID, and the format of the remaining data for this Output Report ID is specified within the Report Descriptor for the Touch IC. NO_DATA_USE_DEFAULTS In the event that a Touch-IC stores data on the host, this data type indicates to the Touch-IC that the host-based data is corrupt and the Touch-IC shall use defaults. The data payload for this command, if any, is proprietary. GET_REPORT_DESCRIPTOR Get Report Descriptor is sent from higher level host SW to the Touch-IC. Data payload, if any, is proprietary. 31

32 3.3 TSI Behavioral Model TSI behavioral model describes the system level flows for Touch-IC initialization, touch and stylus operations with TSI Touch-IC, TSI Host Controller and TSI Host Driver and other SW TSI Touch-IC Initialization After TSI Bus Initialization is completed, the following steps are executed by the TSI Host Controller and Touch-IC to complete the rest of the initialization sequence. This section is informative and the order of register accesses from the TSI Host could change with each implementation from a TSI Host Bus Adapter vendor. The flow described below would be the minimum functionality required to initialize the TSI infrastructure and more register writes shall be expected to occur. The Touch IC shall not assume any specific order to register reads or register writes that occur in any of the flows in this document. In addition, this section applies across different PHY implementations. 1. The TSI Host issues a Register Read packet request to the TSI_STATE register to determine if Touch IC FW or Data needs to be pushed to the Touch IC before it can be READY_FOR_OPERATION. See TSI Touch-IC Register Set for details on Touch-IC register definitions. 2. Touch-IC sends a Register Read Response to the TSI_STATE register query. a. TSI Host issues a Register Write packet to the TSI_CFG register setting the TE (Touch Enable) bit to a 1b. Prior to this the Touch-IC cannot send an interrupt to the TSI Host and therefore this step is required at this time if either FW/DATA is or is not required by the Touch IC. b. If the State field is set to READY_FOR_OPERATION, no FW or data is required to be pushed. For such implementations the read can skip to step 11. c. If the TSI_STATE.State field is set to FW_NEEDED it indicates the TSI Touch-IC requires the TSI host to load FW. 3. TSI Host extracts the Touch-IC FW image from NV Storage and prepends a Write Data Header to the FW image with Write_Data_Type set to FW_LOAD. See section 3.2 for details on the data structures required for TSI operation. 4. TSI Host sends a Touch Bulk Write to the Touch-IC containing the Write Data Header and Touch- IC FW. a. The Touch-IC shall determine the FW image has been written by comparing the data size received with the Write Data Length (in the Write Data Header) with the amount of Touch Bulk Write packets received. 5. TSI Touch-IC sends an interrupt to the TSI Host. 6. TSI Host issues a register read to the TSI_INT_CAUSE register which the Touch-IC returns with Interrupt Type set to Reset Interrupt. 7. TSI Host issues a register read to the TSI_STATE register. a. If the TSI Touch-IC responds with State set to READY_FOR_OPERATION skip to step 11. b. If State is set to DATA_NEEDED continue to the next step. 8. TSI Host reads the Touch-IC data from NV storage and writes it to the Touch-IC using the Touch Bulk Write. As with the FW the Data is prepended with a Write Data Header with Write Data Type set to DATA_LOAD. 32

33 9. Touch-IC consumes the data and (if valid) will issue a final interrupt with TSI_INT_CAUSE:Interrupt Type set to Reset Interrupt and TSI_STATE:State set to READY_FOR_OPERATION. 10. TSI Host determines the capabilities of the Touch IC and enabled HID and/or Proprietary mode of operation by writing to the TSI_CFG register. 11. Once host SW completes the initialization of the SW stack (e.g. obtaining Report Descriptor for the touch device), it will instruct the TSI Host to enable Touch IC for sensing operation a. TSI Host issues a Register Write packet to the Power Control Register to place the sensor in the Armed state because the Touch-IC starts up in sleep. Alternate Flow: No Touch IC FW present for the Touch-IC in System NV Storage. There is no recovery if the Touch IC state is FW_NEEDED but the TSI Host contains no FW. Alternate Flow: No DATA is present for the Touch-IC in System NV Storage. If the Touch IC state is DATA_NEEDED but the TSI Host contains no data to write the TSI host shall do the following: 1. The Host writes a Write Data Header with WriteDataType = NO_DATA_USE_DEFAULTS to the Touch-IC. 2. The Touch-IC shall fall back to default operation but still remain functional Frame Types: HID Reports or Proprietary Data Each touch data frame can be designated by the Touch IC as to be either a HID report or Proprietary Data. HID Report: When the Touch IC signals to TSI Host Controller that the frame is a HID report, TSI Host Controller forwards the data to the host operating system for consumption with no pre-processing. In this mode, each frame comprises a single HID report. Proprietary Data: A Proprietary Data Frame is the data that cannot be directly sent to the host operating system for consumption (as a HID report). Instead it must be pre-processed by IHV specific SW. Proprietary data could be a raw frame data, multiple HID reports (since HID mode only allows a single HID report per frame), or a combination of raw frame data and one or more HID reports. When the Touch IC signals to TSI Host Controller that the frame is Proprietary Data, TSI Host Controller sends the frame to IHV specific SW for preprocessing. The IHV specific SW then forwards the processed frames (as HID reports) to the operating system TSI Frame and Micro-frame Relationship Each TSI Touch Frame Data is comprised of one or more micro-frames, where upon transferring each micro-frame to the TSI Host, an interrupt is generated. The micro-frame concept allows TSI Touch IC splitting a TSI data frame into multiple micro-frames (shown in figure below) for buffering, cost, pipelining of other reasons. While TSI Touch IC transfers data, it shall not send another interrupt until the entire micro-frame transfer is complete. 33

34 The relationship of frames and micro-frames to individual TSI Data Transactions is described in the TSI Transaction Protocol Layer below. Micro-frame Normative Requirements: The size of a micro-frame size shall be multiple of 16 bytes except for the last micro-frame in a frame, which can contain less than 16 bytes. The size of micro-frame shall be greater than 0 in any case. The maximum frame size is specified in the TSI_DATA_SZ register by the Touch IC and consumed at initialization by the TSI Host. The micro-frame size can be dynamic and reported on each interrupt in the TouchIC TSI_INT_CAUSE register. Interleaving multiple touch data frames during one frame, including frames containing different touch data types (e.g. get_report_descriptor, get_feature, etc), is not allowed. All micro-frames of a touch data frame have to be completely transmitted before a new data frame can be started. uframe 0 uframe 1 TSI Touch Frame Data uframe 2 uframe (N-1) Figure 3-1: TSI Touch Frame and micro-frame relationship Configuring HID or Proprietary Data Mode uframe N Via the TSI_CFG register the Touch IC can be configured for HID mode, Proprietary Data mode or both. If only HID mode is enabled, only HID reports are allowed to be returned to the TSI Host Controller. If Proprietary Data mode is enabled, Proprietary Data can be returned to TSI Host Controller. If both modes are enabled, both Proprietary Data and HID reports can be returned to the TSI Host Controller determined by the TSI_INT_CAUSE register s Frame Type field. To summarize, the following combinations of these two modes as follows: 1. A Touch-IC configured to be in only PROPRIETARY mode. 2. A Touch-IC configured to be in only HID mode (all multi-finger and stylus processing in the Touch- IC). 3. A Touch-IC configured to be both modes of operation where the Touch IC dynamically returns proprietary or HID data reports TSI Touch-IC Proprietary Data Processing The following diagram illustrates the model for transferring touch frames between the Touch-IC and the host. 34

35 sd Proprietary Data Read Path TouchIC loop FOR EACH uframe TSI Host IHV SW Interrupt() Touch Register Read(TSI_INT_CAUSE) Register Read Response(read_data_avail, uframe Size) Request Touch Data() Touch Data() alt EOF Proprietary Data Transfer() Convert to HID Report() alt IF FEEDBACK PAYLOAD Touch Bulk Write(feedback data) Figure 3-2: TSI Proprietary Data Processing 1. Touch-IC issues an interrupt to the TSI Host Controller. 2. TSI Host issues a Touch Register Read of the TSI_INT_CAUSE register. 3. Touch-IC sends a Register Read Response with Interrupt Type set to read_data_available with micro-frame size set to the size of the next micro-frame. 4. TSI Host sends a Request Touch Data trigger defined. Send Feedback() 5. TSI Touch-IC responds with a Touch Data packet type. a. Prior to this the Touch-IC fills out the Read Data Header:Touch Data Type to TOUCH_DATA_TYPE_PROPRIETARY_FRAME and Data Size to the size of the payload. If the TSI_INT_CAUSE:EOF bit is set to a 1b, the TSI Host sends the Proprietary data to IHV SW for conversion to a HID report HID Report Touch Data Processing This section describes the flow when the TSI Host has placed the Touch-IC in HID Mode. When touches are occurring in this state the Touch-IC shall send a single HID report. 35

36 sd HID Report Read Path TouchIC TSI Host OS SW Interrupt() Touch Register Read (TSI_INT_CAUSE) Register Read Response(read_data_avail, HRD=1 EOF, size=70b) Request Touch Data() Touch Data(Touch Data Header, HID_REPORT) HID_REPORT() Figure 3-3: TSI HID Mode Processing 1. Touch-IC issues an interrupt to the TSI Host Controller. 2. TSI Host issues a Touch Register Read of the TSI_INT_CAUSE register. 3. Touch-IC sends a Register Read Response with Interrupt Type set to read_data_available, EOF bit set to 1b, with micro-frame size set to the size of the Read Data Header plus the size of the HID report. 4. TSI Host requests a read by issuing a Request Touch Data for micro-frame size. 5. The TSI Touch-IC responds with a Touch Data packet type containing micro-frame size bytes. a. Prior to this the Touch-IC fills out the Read Data Header:Touch Data Type to TOUCH_DATA_TYPE_HID_REPORT and Data Size to micro-frame size. b. The first byte of the HID report contains the Report ID, which specifies which report structure described in the Report Descriptor HID Reports Embedded Within Proprietary Data In this mode TSI Touch-IC is able to append HID reports to the end of a Proprietary data frame. However, this mode of operation is not discoverable by the TSI Host Controller and the transfer is initiated and completed as a Proprietary data transfer. It is up to the Touch-IC and Touch ISV SW to determine, via private data within the Proprietary data, that HID reports are appended. Furthermore, there is no indication within the data structures in the TSI Touch Data Structures section that the Proprietary data contains HID reports Switching between Proprietary and HID modes The TSI Host enables either the Proprietary mode or the HID mode by writing to Offset 10h: TSI_CFG: TSI Configuration Register The TSI Host will modify the TSI Touch-IC modes in the following conditions: When the TSI Host determines it has the ability to support host based processing of Proprietary data, the TSI Host shall enable Proprietary mode. This may require the TSI Host to load additional services, daemons or kernel mode drivers. 36

37 When an error occurs the TSI Host may determine that it needs to disable the Proprietary mode of operation. If some portion of the host-based processing ISV Proprietary Frame Pre-processing SW hits an error condition (unloads, etc.), the TSI Host will disable the Proprietary mode of operation. The TSI Touch-IC shall always reset such that both the Proprietary and HID modes are disabled Dynamically Switching Between Proprietary Data Frames and HID Reports The Touch-IC may dynamically, on a frame to frame boundary, switch between sending HID reports and Proprietary data. The Touch Data Header and Offset 0x00: TSI_INT_CAUSE: TSI Interrupt Cause Register reflect whether the Touch-IC has sent a HID report or Proprietary data. The Touch-IC is restricted such that it must complete sending a Proprietary data frame before sending a HID report. The Touch-IC shall not send a HID report between raw Proprietary data micro-frames Register based Switching between HID Report and Proprietary Data Modes To switch between Proprietary Data and HID modes the following interactions occur between the TSI Host and the Touch-IC: 1. TSI Host writes 0b to the TE field via Register Write operation to the TSI_CFG register. 2. TSI Host polls on TE, waiting for it to transition from 1b to 0b. Additionally, a config change interrupt can be used to indicate a state change. 3. TSI Host enables HID mode, Proprietary mode or both. 4. TSI Host sets TE to a 1b 5. TSI Host poll on TE, waiting for it to transition from 0b to 1b. Additionally, a config change interrupt can be used to indicate a state change. 6. TSI Host reads the TSI state register to validate the state of the Touch IC matches the requested. If one of the bits set by the host in the TSI_CFG register is cleared after TE transitions to 1b, this indicates the Touch IC cannot support the requested mode. For example, if the TSI host sets both the HID and Proprietary mode bits, but after TE transitions to a 1b, both bits are cleared, this could indicate the Touch IC does not support simultaneous support of HID and Proprietary data. The modes supported by the Touch IC are defined in the TSI_CAP register TSI Configuration and Management Operations Configuration and management operations are synchronous requests from host SW to the Touch-IC typically via HID commands such as Get Report Descriptor, Set Feature, Get Feature and Output reports. These could support such actions as Touch-IC FW update and calibration operations on the Touch-IC itself Get Report Descriptor Operation For SW to communicate with Touch-IC using reports (input, output and feature), report ID is used to lookup the report data structure within the Report Descriptor. As part of the device initialization routine, the Report Descriptor for the specific Touch-IC has to be retrieved. 37

38 sd Get Report Descriptor SW GetReportDescriptor(Request) TSI Host Create Write Data Header(Write_Data_Type = GET_REPORT_DESCRIPTOR) Touch Bulk Write(Write Data Header Get Report Descriptor Request) TSI Touch IC Interrupt() Touch Register Read(TSI_INT_CAUSE) Register Read Response(read_data_avail, uframe Size) :Report Descriptor Request Touch Data(uFrame size) Touch Data(Touch Data Header + Get Report Descriptor Response) Figure 3-4: Get Descriptor Processing To retrieve the Report Descriptor, the Get Descriptor command is used: 1. Operating system requests HID descriptor from the HID driver for the Touch device. 2. To complete the HID descriptor, the driver needs to know the Report Descriptor size. It sends a Get Report Descriptor request to the TSI Host. 3. TSI Host builds a Write Data Header, specifying GET_REPORT_DESCRIPTOR as the write_data_type. 4. TSI host sends the Write Data Header and Get Descriptor request as part of a Touch Bulk Write to the TSI Touch-IC. 5. TSI Touch-IC processes the request and sends an interrupt to the TSI Host. 6. TSI Host issues a Touch Register Read to the TSI_INT_CAUSE register. 7. TSI Touch-IC responds with read_data_available in the register. 8. TSI Host IC issues a Request Touch Data message to the Touch-IC 9. TSI Touch-IC responds with the Get Report Descriptor response. 10. TSI Host parses the Touch Data Header, determines this is a response to the pending Get Report Descriptor request and returns the Get Report Descriptor response to the driver as part of the initial request. 11. The HID driver completes the HID descriptor response to the OS, including the size of the report descriptor. 12. OS SW then requests the report descriptor with an appropriately sized buffer. 13. HID driver responds with the cached copy of the Report Descriptor retrieved from Touch IC in this sequence. 38

39 Set Features and Output Report Operations Set Features commands and Output Reports are sent to the Touch-IC as data write operations to the bulk data address, starting at TSI address 0x1000, following the register space of 0x000-0xFFF. For Set Feature and Output Report operations: Figure 3-5: Set Features Processing 1. SW in the operating system issues a Set Features or Output Report request to the TSI Host. a. The first byte of the data payload is a valid Feature Report ID. (All 8 bits are used for ID value. No class or type information is encoding in the first byte.) b. The structure of the remaining payload is described inside the Report Descriptor for that ID. 2. TSI Host builds as Write Data Header, specifying SET_FEATURES_DATA or OUTPUT_REPORT_DATA as the write_data_type. 3. TSI host sends the Write Data Header and Set Features data as part of a Touch Bulk Write to the TSI Touch-IC. There is no response from the Touch-IC Get Features Operations Get Features operations require response from the Touch-IC, and therefore behave differently than the Set Features and Output Reports operations described above. An example Get Features request is to retrieve the number Max Number of Touches and other configuration properties of the Touch-IC. The following diagram illustrates the full flow: 39

40 sd Get Features - TSI SW Get Features(Request) TSI Host Create Write Data Header(Write_Data_Type = GET_FEATURES_DATA) Touch Bulk Write(Write Data Header Get Features Request) TSI Touch IC Interrupt() Touch Register Read(TSI_INT_CAUSE) Register Read Response(read_data_avail, uframe Size) :Get Features Response Request Touch Data(uFrame size) Touch Data(Touch Data Header + Get Features Response) Figure 3-6: Get Features Processing 1. SW in the operating system issues a Get Features request to the TSI Host. a. The first byte of the data payload is a valid Feature Report ID. (All 8 bits are used for ID value. No class or type information is encoding in the first byte.) 2. TSI Host builds as Write Data Header, specifying GET_FEATURES_DATA as the write_data_type. 3. TSI host sends the Write Data Header and Get Features request as part of a Touch Bulk Write to the TSI Touch-IC. 4. TSI Touch-IC processes the request and sends an interrupt to the TSI Host. 5. TSI Host issues a Touch Register Read to the TSI_INT_CAUSE register. 6. TSI Touch-IC responds with read_data_available in the register. 7. TSI Host IC issues a Request Touch Data message to the Touch-IC 8. TSI Touch-IC responds with the Get Features response. a. The first byte of the data payload is the Feature Report ID from the Get Feature request. b. The structure of the remaining payload is described inside the Report Descriptor for that ID. 9. TSI Host parses the Touch Data Header, determines this is a response to the pending Get Features request and returns the Get Features response to the SW as part of the initial request Get Features Responses in HID Mode If the Touch-IC is in HID mode, the HID mode bit shall be set in the TSI_INT_CAUSE register for the Get Features response data TSI Interrupt Handing TSI Touch-IC issues an interrupt to the TSI Host Controller, in order to signalize some events in the touch device, as well as the touch data availability specified in TSI Touch-IC Proprietary Data Processing and HID Report Touch Data Processing. The interrupt causes are found in Offset 0x00: TSI_INT_CAUSE: TSI Interrupt Cause Register. The interrupt associated with TSI Touch-IC configuration change, i.e. some 40

41 value change of TSI_CFG register may trigger TSI Configuration and Management Operations. The detail of the handling is found in Register based Switching between HID Report and Proprietary Data Modes. The interrupt handling associated with some error and TSI Touch-IC device reset is specified in Error Handling. 3.4 Error Handling Reset and Initialization Error Handling This section describes the error cases that could occur during the Sensor Reset and Initialization flows. When possible the host will try to recover from these errors, however it is most likely that an error during reset and initialization results in a fatal error. Invalid FW Error: 1. Instead of a Reset Interrupt the Touch-IC issues an error interrupt. 2. Host reads the error register. The error register contains the Invalid FW and/or Invalid Data error bits set. 3. The host TSI driver can only log an error at this point. Invalid Data Error: 1. Instead of a Reset Interrupt the Touch-IC issues an error interrupt. 2. Host reads the error register. The error register contains the Invalid FW and/or Invalid Data error bits set. 3. Host issues a bulk data write with the Write Data Header.write_data_type field set to NO_DATA_USE_DEFAULTS and logs an error. Touch-IC Reset Interrupt, with non-fatal error: 1. Touch-IC sets the Initialization State in the Touch Status register to a value of 3 Touch-IC Signaled a Non-Fatal Initialization Error. 2. Host SW completes initialization as this is a non-fatal error. Touch-IC Fails to Acknowledge PHY Ready: 1. TSI Host resets the Touch-IC by toggling the OOB reset line. 2. TSI Host enables the PHY and waits for PHY Ready from the Touch-IC 3. TSI Host shall try this 3 times before considering the state a catastrophic failure it cannot recover from Dropped Frames If the TSI Host cannot consume (due to a subsystem malfunction, or system being overloaded with data processing, etc.) touch data frames as fast as the Touch-IC produces them, the TSI Host will drop the frames. In this situation, the system can be unstable, unresponsive to user interaction and may even result in system reboot due to malfunction. Within the handling of dropped frames there are following sub-conditions based on the TSI Host implementation. 41

42 Partial Frame Overflow Due to HW conditions, such as stalled HW pipelines, the TSI Host may transfer only a portion of the touch frame. As a result, the Touch Data Header.Data Length (filled out by the Touch-IC) is not valid and there is no way for higher level SW to determine an error has occurred. Therefore, if the TSI Host drops a portion of a touch frame, the entire touch frame must be dropped. To simplify a TSI Host implementation, the TSI Host may choose to reset its internal state back to a known state and quiesce the Touch-IC before attempting to re-start touch operations. As a result, the TSI Host shall clear Touch Enable (TE) bit, clean up its internal state, then set TE to 1b Full overflow In the case the TSI Host can cleanly drop an entire frame, a reset of the internal state of the TSI Host may not be required. In this state, the TSI Host shall inform higher level SW that a frame has been dropped via the Transaction ID field inside the Touch Data Header. For example, if a frame with Transaction ID is sent to higher level SW then frame 31 is dropped, higher level SW will receive a frame with Transaction ID Error Recovery In general, to recover from errors, host will likely quiesce (disable) the Touch-IC (TE to 0), then restart by setting TE=1. As a result of a host issue, the host may also attempt mode change between Proprietary data and HID modes. This may result in less capable touch (perhaps just one finger and no stylus etc.) functionality, but still gives the user an ability to operate TSI Bus Error Handling TSI Bus Error handling at the Device Application layer is implementation specific and outside the scope of this specification. As part of handling, the TSI Host may issue a soft reset (see section3.1.8) or an OOB reset as the case may be TSI Specification Violations HID mode w/o EOF Set: If the TSI_INT_CAUSE register shows HRD=1b and EOF=0b, the TSI Host will consider this an error condition and read the HID packet in over the TSI bus but does not transfer the data to host memory Non-Fatal Error as Payload Data If the Touch IC has error information it wants to propagate to host SW in a generic fashion for debugging, logging or another purpose it shall use the Proprietary data transfer mechanism to do so. In this scenario the Touch IC places error information in the Proprietary data payload but sets the Data Type to TOUCH_DATA_PROPRIETARY_TYPE_ERROR as described in Touch Data Header section. Host SW will then know it is receiving error data instead of Proprietary touch frame data. The protocol between the host and touch IC is identical for error and frame Proprietary data. 42

43 3.4.7 TSI Error Interrupt If the Touch IC requires the host to take immediate action, stopping touch operations, it shall issue an interrupt via a TSI interrupt and set Offset 0x00: TSI_INT_CAUSE: TSI Interrupt Cause Register Interrupt Type to Error Interrupt. Prior to this, the Touch IC shall: 1. Clear TE (Touch Enable) in Offset 14h: TSI_CAP: TSI Capabilities Register, halting sensing operations. Note, that the Touch IC cannot clear TE until micro-frame data is read by the TSI Host. 2. Set Offset 08h: TSI_ERR: TSI Error Register to a valid touch error status. Following processing of the touch interrupt, the host shall set TE to resume touch operations. If the host is using heuristics to manage TSI errors, the host may choose to place the Touch IC in HID mode as a mitigation. 3.5 TSI Touch-IC Power States This following state machine shows the host-visible power states of the TSI Touch-IC. Typically, these power state transition and latency times are defined by the operating system: 43

44 stm Touch Power States TSI Touch IC Power States Sleep Goto Standby [Goto Doze] Doze [VCC Applied] [VCC Removed] [Exit Reset] Goto Standby First Finger Down Off Reset Exit Standby [Goto Doze] Sensing Figure 3-7: Touch-IC Power States First Finger Down Last Finger off Armed It is noted that the state machine covers a normal operation only and there can be some abnormal operations, e.g. the transition to Reset state can be triggered from any state once some error occurs as well as some ungraceful power removal enforces the transition to Off state Touch-IC State Definitions Sensing: The sensor is actively scanning and interrupting the host. Armed: Doze: Sensor is armed, waiting for a touch with no interrupts are occurring at this time. The sensor enters this state when the host determines there is no finger or stylus on the sensor, and writes to the Power Management Control register. Power consumption in the Armed state shall be lower than the Sensing state. The sensor exists this state to Sensing when a touch occurs. Armed to Sensing transition is expected to be 1mS or less. The Armed state is not applicable when the device is in HID mode of operation. 44

45 Sleep: Reset: Off: Similar to the Armed state with the sensor waiting for a touch, however the sampling frequency is reduced and thus power consumption shall be lower than the Armed state. The host will set this state after a pre-determined amount of inactivity. In HID mode, the Touch- IC may be put into Doze mode directly from Sensing state. Exit from Doze to sensing should take no more than 5mS. Power Consumption shall lower than the Doze state as the Touch-IC is not actively sensing. All sensing capabilities are disabled and a touchdown shall not result in any activity. Exit from Sleep should take no more than 10mS. The TSI Host may place the Touch IC into reset during error flow handling. Reset can be entered from any state other than Reset. Existing Reset, the Touch IC shall enter the Sleep state. In this state power remains applied to the Touch IC and power consumption for the Touch IC shall not exceed power in the sensing state. Touch-IC consumes 0w of power. 45

46 4 TSI Transaction Protocol Layer This chapter describes the specification of TSI Transaction Protocol Layer, which serves an abstracted communication model between the host controller and Touch-IC. It shall be noted that it is also the responsibility of TSI Transaction layer to split the data coming from the higher layers such that it fits in the payload size constraints of the implementations on both sides of TSI interface. 4.1 TSI Transaction types and formats This section describes the transaction structures, formats and definitions used in TSI. All transactions in TSI are one of two types - Short or Long. The main difference between the two transaction types is the size of the payload. The short transaction has a fixed 2 byte long payload, while the long transaction can serve up to 65,535 bytes of payload Short Transaction Short transaction is composed of 3 bytes shown in the following figure and table. The intent of this is to be able to send short quick messages (2 bytes long) in both directions. Byte order Figure 4-1: Short Transaction format Table 4-1: Short Transaction Structure Definition 1 st byte Data Identifier (DI), bit7:6 Reserved bit5:0 Data Type (DT), 2 nd byte 2 byte payload data - transmit LSByte first and 3 rd byte MSByte second Long Transaction Long transaction is composed of 4 to 65,538 bytes shown in the following figure and table. 46

47 Transaction header Transaction payload Data Identifier (DI) (1 Byte) Payload Size in BYTE Count (BC) (2 Bytes) (BC) long Payload ( Bytes) Time Figure 4-2: Long Transaction format The long transaction is composed of a 3 byte header and 1 to 65,535 bytes of payload data. The difference between the long and short transaction headers is the addition of payload size field. In the long transaction header that conveys the size of the payload in BYTE count. Short transactions do not need this as the payload is always fixed at 2 bytes long. It is prohibited to transmit any long transaction packets with 0 byte size payload, neither for Touch Data, any register read /write requests, any register read responses, nor any bulk data write requests Trigger Transaction Trigger transaction is composed of 1 byte shown in the following figure and table. The intent of this is to be able to send minimum overhead transactions in both directions. It is noted that the transformation of Trigger Transaction depends on the PHY and its link later design. Please refer the following TSI Link and PHY chapters for the details. Byte order Data Identification (DI) (1 Byte) Time Figure 4-3: Trigger Transaction format Table 4-2: Trigger Transaction Structure Definition 1 st byte Data Identifier (DI), bit7:6 Reserved bit5:0 Data Type (DT), Data Identifier DI provides information specifying the type of the transaction which in turn indicates the direction for the transaction. The structure of Data Identifier (DI) commonly used for both the short and long transactions is shown in the following table. 47

48 bit [7:6] bit[5:0] Description Reserved, set to 00b Table 4-3: Data Identifier (DI) definition Data Type (DT), defined in the following section DI is composed of Data Type (DT) and two reserved bits. DT is mapped to bits [5:0] and specifies the direction and the type of the communication. The DT detail is found in Data Type (DT) definition. The reserved bits shall be zero in TSI spec 1.0 compliant implementations Data Type (DT) definition The data type indicates each transaction type, such as a direction, short or long transaction, and so on. The following table provides the summary of the data types. It is noted that the data types which are not defined in the table are all reserved for the future use, and shall not be repurposed for any proprietary uses. Data Type (DT) 01h 04h 05h 06h 07h Table 4-4: Summary of TSI Transaction Data Types Direction Touch-IC to TSI Host Controller TSI Host Controller to Touch-IC Touch-IC to TSI Host Controller TSI Host Controller to Touch-IC Touch-IC to TSI Host Controller Short or Long Long Long Short Long Description Touch Data Short Request Touch Register Read Touch Register Read response Request Touch Register Write ACK with Error Report 08h TSI Host Controller to Touch-IC Long Request Bulk Data Write 0Ah TSI Host Controller to Touch-IC Short Set PHY-CLK frequency 0Ch TSI Host Controller to Touch-IC Short Set Maximum touch packet payload size 0Dh Touch-IC to TSI Host Controller Short Maximum touch packet payload size capacity response 0Eh TSI Host Controller to Touch-IC Short Request Maximum touch packet payload size capacity 10h TSI Host Controller to Touch-IC Short Set Maximum control packet payload size 48

49 11h Touch-IC to TSI Host Controller Short Maximum control packet payload size capacity response 12h TSI Host Controller to Touch-IC Short Request Maximum control packet payload size capacity 33h Acknowledgement Trigger Trigger Acknowledgement trigger for the last received transaction 34h Request Touch Data Trigger Trigger Request Touch Data 4.2 TSI Host Controller to TSI Touch-IC Transaction formats Request-Touch Data Request-Touch Data is the trigger transaction sent from the TSI Host Controller to the Touch-IC, in order to read a touch data packet in the Touch-IC. The following figure shows the transaction format for Request Touch Data Trigger. Transaction header Data Identifier (DI) DI[7:6] = Reserved DI[5:0] = DT (34h) Time Figure 4-4: Request Touch Data transaction structure The Touch-IC shall respond to the Request Touch data trigger with a touch data transaction (Refer to section Response Touch Data Request-Touch Register Read Request-Touch Register Read is the long transaction sent from the TSI Host Controller to the Touch-IC, in order to read one or more register value(s) in the Touch-IC. In the case a single register is being read, the Read Length shall be 4. The following figure shows the transaction format for Request Touch Register Read. 49

50 Transaction header Transaction payload Data Identifier (DI) Payload Length in Bytes Read Length Reg Start Address DI[7:6] = Reserved DI[5:0] = DT (04h) 6 [7 : 0] [15 : 8] [7 : 0] [15 : 8] [23 : 16] [31 : 24] Time Figure 4-5: Request Touch Register Read transaction structure In the payload, the Read Length indicates the size of the data (based on the number of registers to be read) to be read and can be between, 4d to 65532d (the latter is the maximum allowed value. Actual maximum value depends on the number of registers implemented in the design). The Read Length shall be a multiple of 4 to ensure integer number of DWORDs of register data is read. The Read Length is followed by the read register start address, h to 00000FFCh (though the field allows for larger values, the register space is limited to FFFh) and the start address shall be on a DWORD boundary. In the payload, LSB comes first and MSB comes last, both for the length and the start address. The Touch-IC shall respond to the register values from the start address to the (start address + length) address (as long as the length is valid). For more details on the registers, please refer to TSI Touch-IC Register Set Request-Touch Register Write Request-Touch Register Write is the long transaction sent from the Touch-IC to the TSI Host Controller, in order to write some value to a Touch-IC register. The following figure shows its structure. 50

51 [7 : 0] [15 : 8] [23 : 16] [31 : 24] Byte 0 Byte 1... Byte (N-1) USI Touch Serial Interface Specification 1.0 Transaction header Transaction payload Data Identifier (DI) Payload Length in Bytes Reg Start Address Data Bytes DI[7:6] = Reserved DI[5:0] = DT (06h) 4+N Time Figure 4-6: Request Touch Register Write transaction structure The payload length field includes four bytes for register address plus size (4d to 65532d) of the data to be written. The first 4 bytes of the payload indicate the write register start address, h to 00000FFCh (though the field allows for larger values, the register space is limited to FFFh) and the start address shall be on a DWORD boundary. It is followed by the register values to write Request-Bulk Data Write Bulk data Slice Request-Bulk Data Write is a long transaction sent from the TSI Host Controller to the Touch-IC, in order to write a bulk of data into the Touch-IC subsystem. When the size of the written data is bigger than the negotiated value between the TSI Host Controller and the touch IC as Set Maximum non-touch data payload size transaction, the written data shall be sliced into multiple bulk data write transaction packets. The following figure describe how one chunk of bulk written data is sliced in to the transaction packets. (original) Bulk Data to be written to the touch IC Bulk Data Write Transaction 0 Bulk Data Write Transaction 1 Bulk Data Write Transaction (N-2) Bulk Data Write Transaction (N-1) Payload size = set max nontouch data payload size Payload size = set max nontouch data payload size Payload size = set max nontouch data payload size Payload size <= set max nontouch data payload size Figure 4-7: Bulk data slice into multiple bulk data write transactions When a bulk data to be written to the touch IC is transferred, it is sliced into multiple of the bulk data write transactions. In this figure, one bulk data is sliced into N (0 to N-1) of the bulk data write transactions. The payload size of each bulk data write transaction shall be same as the maximum amount of non-touch data negotiated between TSI host controller and TSI Touch-IC by Set Maximum non-touch data payload size transaction. The exception is the last bulk data write transaction. In this figure, it is Bulk 51

52 Data Write Transaction (N-1). The payload size of the last bulk data write transaction can be same as or smaller than the maximum amount of bulk data write data negotiated between TSI host controller and TSI Touch-IC by Set Maximum non-touch data payload size transaction, while the payload size shall be 1 byte or greater Request-Bulk Data Write Transaction format Request-Bulk Data Write is a long transaction sent from the TSI Host Controller to the Touch-IC, in order to write a bulk of data into the Touch-IC subsystem. The following figure shows its structure. Transaction header Transaction payload Data Identifier (DI) Payload Length in Bytes Data Bytes DI[7:6] = Reserved DI[5:0] = DT (08h) N Time Byte 0 Byte 1... Figure 4-8: Bulk Data Write transaction structure Byte (N-1) The payload length field includes the size (1d to 65535d) of the data to be written Set PHY-CLK Frequency [It is noted that the implementation of the transaction is optional normative. If there is PHY and Link Layer capability is there, the transaction shall be implemented as specified. Otherwise, it is not necessarily to implement the transaction.] Depending on PHY selection, this control may reside at the TSI Host Controller end or at the Touch-IC end. If it is the former, this transaction will not be sent on the PHY, but acted upon at the TSI Host Controller itself. PHY-CLK frequency is a short transaction that specifies the value the CLK frequency (rate) shall be set to. The frequency chosen may be dependent on power consumption, EMI etc., and may be changed at any time. However, when the new PHY-CLK frequency is applied and takes place is PHY dependent and may require additional handshaking mechanisms at Link layer and PHY (outside the scope of this specification). The following figure shows its structure. 52

53 [7:0] [15:8] [7:0] [15:8] USI Touch Serial Interface Specification 1.0 Transaction header Data Identifier (DI) PHY-CLK Rate DI[7:6] = Reserved DI[5:0] = DT (0Ah) Time Figure 4-9: Set PHY-CLK Frequency transaction structure The interpretation of the payload data (0d to 65535d) is PHY and its link layer dependent. Please refer PHY and Link Layer chapters for the details Request Maximum Touch data payload size capacity [It is noted that the implementation of the transaction is optional normative. If there is PHY and Link Layer capability is there, the transaction shall be implemented as specified. Otherwise, it is not necessarily to implement the transaction.] Request Maximum Touch packet payload size capacity is a short transaction sent from the TSI Host Controller to the Touch-IC, to obtain the maximum amount of touch data the Touch-IC can send in one packet. The following figure shows its structure. Transaction header Data Identifier (DI) Maximum Touch Packet Payload Capacity DI[7:6] = Reserved DI[5:0] = DT (0Dh) Time Figure 4-10: Request maximum touch data payload capacity The payload shall be always 0000h in the request. The maximum packet sizes for touch data shall be multiple of 16 bytes. Usually the packet is sent during the Touch-IC initialization soon after the Touch-IC power-on, as a part of the power-on configuration. 53

54 4.2.7 Set Maximum Touch data payload size Set Maximum Touch payload size is a short transaction sent from the TSI Host Controller to the Touch- IC, in order to limit the maximum amount of touch data that can be sent in one long packet from the Touch-IC to the TSI Host Controller. The limit set through this command shall be less than or equal to the maximum touch packet payload capacity value of the Touch-IC. The maximum packet size for touch data shall also be greater than 0 and multiple of 16 bytes. The following figure shows its structure. Transaction header Data Identifier (DI) Maximum Touch Packet Payload Size DI[7:6] = Reserved DI[5:0] = DT (0Ch) [7:0] [15:8] Time Figure 4-11: Set Maximum touch data payload transaction structure The payload (16d to 65520d) indicates the maximum amount of touch data the Touch-IC can send in one long packet. It is the responsibility of the Transaction layer on the Touch-IC to split touch data such that the touch payload it sends in Response - Touch Data is equal to (or less than in case the touch data is smaller than this size) this size. If not, the TSI Host Controller will drop that transaction and the touch data will be lost. Usually the packet is sent during the Touch-IC initialization soon after the Touch-IC power-on, as a part of the power-on configuration. As soon as the Touch-IC receives this packet, it shall change the maximum touch packet payload size Request-Maximum non-touch data payload size capacity Request Maximum Control (non-touch data) packet payload size capacity is a short transaction sent from the TSI Host Controller to the Touch-IC, in order to obtain the maximum amount of non-touch data payload size capacity of the Touch-IC. The value is applicable for the transaction direction from the TSI Host Controller to the touch IC. The TSI Host Controller, when it is setting the size for non-touch data, it shall choose a value less than or equal to the value received here. The following figure shows its structure. 54

55 [7:0]= 00h [15:8]= 00h USI Touch Serial Interface Specification 1.0 Transaction header Data Identifier (DI) Maximum Control Packet Payload Size Capacity DI[7:6] = Reserved DI[5:0] = DT (12h) Time Figure 4-12: Request-maximum non-touch data payload capacity transaction structure Set Maximum non-touch data payload size Set Maximum non-touch data payload size is a short transaction sent from the TSI Host Controller to the Touch-IC, in order to limit the maximum amount of non-touch data both the TSI Host Controller and the Touch-IC can send in one long transaction. The following figure shows its structure. Transaction header Data Identifier (DI) DI[7:6] = Reserved DI[5:0] = DT (10h) Maximum Control Packet Payload Size [7:0] [15:8] Figure 4-13: Set Maximum non-touch data payload size transaction structure Time The payload range shall be between (4d to d). The host controller shall ensure that the limit set here is less than or equal to the maximum control data capacity size (see section Request-Maximum nontouch data payload size capacity). Usually this transaction is sent during the Touch-IC initialization soon after the Touch-IC power-on, as part of the power-on configuration. As soon as the Touch-IC receives the packet, it shall change the maximum non-touch data packet payload size. The maximum non-touch data size shall be greater than 0 and a multiple of 4 bytes. The Touch-IC shall always transmit a non-touch data payload, whose size is equal to or less than the maximum non-touch data payload size set by the TSI Host Controller during configuration (see TSI Bus Initialization ). 55

56 4.3 TSI Touch-IC to TSI Host Controller Transaction formats Response - Touch Data Raw frame / micro-frame touch data slice One frame or micro-frame touch data shall be sliced into multiple touch data transaction packets, if the size of the frame or micro-frame touch data exceeds the maximum amount of touch data negotiated between TSI host controller and TSI Touch-IC by set Maximum Touch data payload size transaction. The following figure describe how one frame or micro-frame data is sliced in to the transaction packets. Touch data Transaction 0 Payload size = set max touch data payload size One frame or microframe Data Touch Data Transaction 1 Payload size = set max touch data payload size Touch Data Transaction (N-2) Payload size = set max touch data payload size Touch Data Transaction (N-1) Payload size <= set max touch data payload size Figure 4-14: One raw frame or micro-frame data slice into multiple touch data transactions When one frame or micro-frame data is transferred, it is sliced into multiple of the touch data transactions. In this figure, one frame or micro-frame data is sliced into N (0 to N-1) of the touch data transactions. The payload size of each touch data transaction shall be same as the maximum amount of touch data negotiated between TSI host controller and TSI Touch-IC by set Maximum Touch data payload size transaction. The exception is the last touch data transaction. In this figure, it is Touch Data Transaction (N-1). The payload size of the last touch data transaction can be same or smaller than as the maximum amount of touch data negotiated between TSI host controller and TSI Touch-IC by set Maximum Touch data payload size transaction, while the payload size shall be 16 or greater Response-Touch Data Transaction format The Touch Data is a long transaction in order to send bulk data (such as touch Proprietary data), sent from the Touch-IC to the TSI Host Controller. The following figure shows its structure. 56

57 Byte 0 Byte 1... Byte (N-1) USI Touch Serial Interface Specification 1.0 Transaction header Transaction payload Data Identifier (DI) Payload Length in Bytes Data Bytes DI[7:6] = Reserved DI[5:0] = DT (01h) N Time Figure 4-15: Response-Touch Data transaction structure The payload length indicates the size of the payload, 16d to 65520d. The payload provides the capability to send an arbitrary size of multiple of 16 byte read data, up to bytes. The Touch-IC shall pre-pend the Touch Data Header to the beginning of touch data. It is transparent to the TSI Host Controller and is used by Host SW or other entities Termination of Response Touch Data By some error, TSI Touch-IC may not be able to complete whole one frame or micro-frame data transmission and needs to terminate the transmission. In order to terminate it, TSI Touch-IC shall send the transaction whose payload size is smaller than the maximum amount of touch data negotiated between TSI host controller and TSI Touch-IC by set Maximum Touch data payload size transaction, while the payload size shall be 16 or greater. The following figure describes the example of the transmission termination. Touch data Transaction 0 Touch Data Transaction 1 Touch Data Transaction i Payload size = set max touch data payload size Payload size = set max touch data payload size Payload size <= set max touch data payload size Figure 4-16: termination of multiple touch data transactions In order to terminate one frame or micro-frame data transmission, Touch-IC shall send the Touch Data Transaction, in this figure Touch Data Transaction i, whose payload size is smaller than the maximum amount of touch data negotiated between TSI host controller and TSI Touch-IC by set Maximum Touch data payload size transaction, while the payload size shall be 16 or greater Response-Touch Register Read Response-Touch Register Read is a long transaction sent from the Touch-IC to the TSI Host Controller in order to provide the register value(s) as the response to Request Touch Register Read command. The following figure shows the response transaction structure. 57

58 Byte 0 Byte 1... Byte (N-1) USI Touch Serial Interface Specification 1.0 Transaction header Transaction payload Data Identifier (DI) Payload Length in Bytes Data Bytes DI[7:6] = Reserved DI[5:0] = DT (05h) N Time Figure 4-17: Response-Touch Register Read transaction structure The Response Length indicates the size of the read data that can go from 4d to 65520d Response-ACK with Error Report Response-ACK with Error Report is a short transaction sent from the Touch-IC to the TSI Host Controller, in the case the Touch-IC detects an error. The following figure shows the transaction structure. Transaction header Data Identifier (DI) DI[7:6] = Reserved DI[5:0] = DT (07h) Error Message [7:0] [15:8] Time Figure 4-18: Response-ACK with Error Report transaction structure The following table lists the bit encoding for different errors. The Touch-IC shall set corresponding error bit for all the errors it detects and then send it to the TSI Host Controller. Bit Table 4-5: Error message from the touch IC to the TSI Host Controller Description 0 Reserved, set to 0b, not to repurpose for any proprietary uses 1 Reserved, set to 0b, not to repurpose for any proprietary uses 2 Reserved, set to 0b, not to repurpose for any proprietary uses 58

59 [7:0] [15:8] USI Touch Serial Interface Specification Escape Mode Entry Command Error 4 Reserved, set to 0b, not to repurpose for any proprietary uses 5 Touch IC Timeout Error 6 False Control Error 7 Contention Detected 8 ECC error, single-bit (detected and corrected) 9 ECC error, multi-bit (detected, not corrected) 10 Check-sum error 11 Data Type not recognized 12 Reserved,, set to 0b, not to repurpose for any proprietary uses 13 Invalid transmission length 14 Reserved, set to 0b, not to repurpose for any proprietary uses 15 Protocol violation Response -Maximum Touch data payload size capacity The Touch-IC sends this response to indicate to the TSI Host Controller the maximum touch data payload size it can send in one transaction. The following figure shows it structure. Transaction header Data Identifier (DI) Maximum Touch Packet Payload Capacity DI[7:6] = Reserved DI[5:0] = DT (0Dh) Time Figure 4-19: Response-Maximum touch data payload size capacity The payload indicates the maximum touch packet payload capacity of the touch IC and the range shall be (16d to 65520d). Usually this transaction is sent during the touch IC initialization soon after the touch IC power-on, as a part of the power-on configuration. 59

60 [7:0] [15:8] USI Touch Serial Interface Specification Response -Maximum non-touch data payload size capacity The Touch-IC sends this response to indicate to the TSI Host Controller the maximum non-touch data payload size it can support. The value is applicable for the transaction direction from the TSI Host Controller to the touch IC. The payload range shall be between (4d to 65532d). This limits the amount of non-touch data the Touch-IC can send in a single transaction. The following figure shows it structure. Transaction header Data Identifier (DI) Maximum Control Packet Payload Size Capacity DI[7:6] = Reserved DI[5:0] = DT (11h) Time Figure 4-20: Response-Maximum non-touch data payload size capacity 4.4 Transaction Layer Error Handling This section describes the way to report TSI Link Layer and PHY errors observed in TSI Touch-IC by Response-ACK with Error Report. This section also describes TSI Transaction layer specific error detection. TSI Device Application Layer is responsible for the recovery from the errors, in an implementation specific manner that is outside the scope of this specification. Please refer for more details Touch-IC Error Reporting ACK with Error Report is only one available method to inform any error occurrence in the Touch-IC. When the power-on initialization is completed, all the bit field of ACK with Error Report shall be cleared. In any relevant error observation, the Touch-IC shall flag the corresponding bit field of ACK with Error Report. When multiple errors are observed in one or several transmissions, all the corresponding bit fields of ACK with Error report shall be flagged. Once ACK with Error Report is transmitted to the TSI Host Controller, all the bit field of ACK with Error Report shall be cleared. ACK with Error Report transaction is submitted, only when the following condition is met; - Any bit field of ACK with Error Report is flagged, i.e. some error occurred after the power-on initialization or the last ACK with Error Report transmission, and - PHY specific handshake (if needed) is complete The following table describes the Touch-IC response for different requests in error-free and errordetected cases. 60

61 Last packet from the TSI Host Controller Table 4-6: Touch-IC responses to the host controller Flagged bit fields of ACK with Error Report Response from the Touch-IC Request Touch Data trigger Nothing Touch Data packet Register write or some value set request packet Any field(s) Nothing Any field(s) ACK with Error Report packet Acknowledge trigger ACK with Error Report packet Register read or some value get request Nothing Any field(s) Corresponding response packet ACK with Error Report packet TSI Transaction Layer Specific errors The following table describes the TSI errors that shall be checked for at the Transaction layer. Once any of these errors is observed at the Touch-IC, the corresponding bit fields of Response-ACK with Error Report shall be flagged and sent to TSI Host Controller. Unless PHY issues prevent it, the interface shall continue to operate normally after error report transaction is sent. Bit Description Definition Table 4-7: The Transaction Layer Level TSI Error List 11 Data Type not recognized The Data Type of the incoming transaction to the Touch-IC does not match a valid DT specified in this specification 13 Invalid transmission length The long transaction payload size mismatches the Byte Count. 15 Protocol violation Any other relevant TSI protocol error occurs. 61

62 5 System Services (Informative) This chapter is intended to list the support needed that transcends any particular layer. Also, the services or support described is implementation dependent which is outside the scope of this specification. 5.1 TSI Host Controller Side Interrupt When the Touch-IC issues interrupt of any type, it is the responsibility of the TSI Host Controller hardware/firmware to recognize it, propagate it to the responsible interrupt handling entity and ensure the Touch-IC is attended to. Depending upon the implementation need, this may result in an interrupt acknowledge cycle or performing some action (such as reading the Touch-IC register to figure out the reason for the interrupt) and servicing that interrupt Interrupt Acknowledge and Interrupt Service After an interrupt from the Touch-IC is recognized by the TSI Host Controller, it shall, depending up on the implementation need, may generate an interrupt acknowledge cycle or perform some action (such as reading the Touch-IC register to figure out the reason for the interrupt) and service that interrupt ACK Forwarding Depending on the implementation, there may or may not be an explicit ACK transaction. In cases where there is no such explicit mechanism, that implementation shall ensure that the information is forwarded to the Device Application Layer ACKWithError Forwarding When the Touch-IC recognizes an error and issues an AckWithError response to the TSI Host Controller, it is the responsibility of the host controller to propagate it to the appropriate error handling entity. How the error is handled is dependent on the type of the error and the entity that is handling it.. 62

63 6 TSI Link Layer This chapter describes the TSI Link layer. It is composed of link state-machine, ECC/CRC generation/checking mechanisms in both directions. The Link layer is tightly coupled to D-PHY and hence will change if a different PHY implementation (other than what is described currently) is chosen. The Link layer functionality is split into two Upper Link Layer (ULL) and Lower Link Layer (LLL). The ULL focuses on ECC and Checksum calculations (though for different PHYs these may change as well), insertion of those fields into the transactions to be transmitted. The LLL focus is more closely related to the chosen PHY and for example includes the TSI bus initialization, ULPS support, etc. 6.1 Upper Link Layer (ULL) Link Layer Packets Transmit Side Depending up on the type of PHY chosen, a Link layer may have to take the following actions. In the case of D-PHY being chosen as the PHY, when the Link layer receives a transaction from the Transaction layer, it shall examine the Data Identifier (DI) byte of the transaction header and shall take two actions before sending it down to the PHY, to maximize the design commonality with MIPI Alliance Specifications of Display Serial Interface and Camera Serial Interface 2 (find the formal name in References ) Action 1: Based on Data Type (DT) value of DI, Link layer shall provide hints to the PHY on how to transmit that transaction. For example, the hint will inform the PHY to use either Low Power Data Transmission (LPDT) or High Speed Data Transmission (HSDT) for that transaction. In the case of Trigger Transactions, the LINK would have D-PHY generate escape mode transitions and not take Actions 2 below. Note: How the hints to PHY are generated and sent is implementation specific and outside the scope of this specification. Also, not all PHY implementations may require hints. Action 2: The Link layer shall insert a one byte ECC after the first 3 bytes (calculated over those 3-bytes) of all transactions (short or long) received from the upper layer. It shall also append a 2-byte CRC checksum to all long transactions. Only then those transactions shall be handed down to the PHY to transmit. Based on the above two actions, the packet handed to the PHY shall look like the following for the short and long transaction formats. The fields in blue color are added by the Link layer. 63

64 Figure 6-1: Link Layer Short packet format Receive Side Figure 6-2: Link Layer Long packet format In this direction, when the Link layer receives a packet from PHY, it shall determine the type of transaction (short or long) based on the Data Type (DT) value. It shall compute ECC and Checksum (if needed) and verify that the received ECC and Checksum (if needed) match with the computed values. If it does, it shall pass the transaction to the Transaction layer, after stripping the ECC and Checksum fields. In the case of a mismatch, please refer Link Layer Error Handling for the error handling Endian Policy On the TSI PHY when one or more bytes information is transferred, e.g. WORD or DWORD size information, LSbit (LSb) is transmitted first and MSbit (MSb) is transmitted last, as shown in the following figure. 64

65 ECC Generation Figure 6-3: TSI packet endian policy Upon receiving a transaction from the Transaction layer, the Link layer shall always take the first 3-bytes of the transaction and generate an ECC byte as follows and insert it after those three bytes. The number of parity or error check bits required is given by the Hamming rule, and is a function of the number of bits of information transmitted. The Hamming rule is expressed by the following inequality: d + p + 1 < = 2p where d is the number of data bits and p is the number of parity bits. The result of appending the computed parity bits to the data bits is called the Hamming code word. The size of the code word c is d+p, and a Hamming code word is described by the ordered set (c, d). Hamming codes use parity to correct a single-bit error or detect a two-bit error, but are not capable of doing both simultaneously. TSI uses Hamming-modified codes where an extra parity bit is used to support both single error correction as well as two-bit error detection. For example a 7+1 bit Hamming-modified code (72, 64) allows for protection of up to 64 data bits. TSI shall use a 5+1 bit Hamming-modified code (30, 24), allowing for protection of up to twenty-four data bits. The addition of a parity bit allows a five bit Hamming code to correct a single-bit error and detect a two-bit error simultaneously. P6 and P7 of the ECC byte are unused and shall be set to zero by the transmitter. The receiver shall ignore P6 and P7 and set both bits to zero before processing ECC. The following table shows the one way to specify the encoding of parity and decoding of syndromes. Table 6-1: ECC parity generation rules Data bit P7 P6 P5 P4 P3 P2 P1 P0 Hex x x0B x0D x0E x13 65