VCU108 Built In Test July 2015

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1 VCU108 Built In Test July 2015 XTP361

2 Revision History Date Version Description 07/15/ Updated for /30/ Initial version for Copyright 2015 Xilinx, Inc. All Rights Reserved. XILINX, the Xilinx logo, the Brand Window and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. NOTICE OF DISCLAIMER: The information disclosed to you hereunder (the Information ) is provided AS-IS with no warranty of any kind, express or implied. Xilinx does not assume any liability arising from your use of the Information. You are responsible for obtaining any rights you may require for your use of this Information. Xilinx reserves the right to make changes, at any time, to the Information without notice and at its sole discretion. Xilinx assumes no obligation to correct any errors contained in the Information or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE INFORMATION, INCLUDING ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY RIGHTS.

3 Note: This presentation applies to the VCU108 VCU108 BIT Test Overview Xilinx VCU108 Board Software Requirements VCU108 Setup Run the BIT Test Notes

4 VCU108 Software Install and Board Setup Complete setup steps in XTP368 VCU108 Software Install and Board Setup: Software Requirements VCU108 Board Setup UART Driver Install Ethernet Setup Optional Hardware Setup Note: Presentation applies to the VCU108

5 Note: Presentation applies to the VCU108 Setup for the VCU108 BIT Test Open the VCU108 Built In Test Design Files ( ES1) zip file: Extract these files to your C:\ drive

6 Note: Executable requires 64-bit Windows Running the Board Interface Test From C:\vcu108_bit, double click on vcu108_bit.exe

7 Running the Board Interface Test The tests for the included hardware are preselected Press the Read Board Info button

8 Run the BIT Test Click the RUN_ALL button

9 Run the BIT Test All Tests Passed

10 Running the Board Interface Test All selected tests passed To send the test log, click the Results button

11 Running the Board Interface Test Enter the Address(es) of test log recipients E.g. <my

12 Running the Board Interface Test Enter the (SMTP) Server name E.g. smtp.mycompany.com

13 Running the Board Interface Test Message confirms success with delivery of test results

14 Note: Presentation applies to the VCU108 Notes No Terminal program can be connected to the VCU108 s Standard UART port while the BIT Test is running Only one board can be connected at a time, either to the UART or the Digilent interface If any test fails, retry that individual test If the designs are not downloading from the BIT Test, Close the BIT Test, open Vivado, and in the Hardware Manager verify that your PC can connect to the board Once verified, close any hw_server or vcse_cableserver processes and try again

15 Note: Presentation applies to the VCU108 Appendix Ensure that you have followed all instructions in XTP400 - VCU108 Evaluation Kit Quick Start Guide and XTP368, VCU108 Software Install and Board Setup Ensure that no other Terminal program is connected to the VCU108 s two COM ports while the Board Interface Test is running See XTP368, page 22 for details on COM Ports Only one board can be connected to your PC during the test Both USB UART (J4) and USB JTAG (J106) are required for this test Disconnect any other board UARTs or Programming Cables If you missed any set-up instructions and experience problems, then please follow these steps: 1. Recheck your setup 2. End any hw_server or vcse_cableserver processes and cycle board power 3. Open Vivado Hardware Manager and test PC-board JTAG connectivity

16 References

17 References Vivado Programming and Debugging Vivado Design Suite Programming and Debugging User Guide UG908 ug908-vivado-programming-debugging.pdf

18 Documentation

19 Documentation Virtex UltraScale Virtex UltraScale FPGA Family UltraScale VU095 ES2 - Known Issues Master Answer Record VCU108 Documentation Virtex UltraScale FPGA VCU108 Evaluation Kit VCU108 - Known Issues Master Answer Record

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