ECE 486/586. Computer Architecture. Lecture # 6

Transcription

1 ECE 486/586 Computer Architecture Lecture # 6 Spring 2015 Portland State University

2 Lecture Topics Instruction Set Principles Classifying Instruction Set Architectures Memory Addressing Alignment Byte Order Addressing Modes Operations in the Instruction Set Reference: Appendix A: Sections A.2, A.3, A.4, A.5

3 Register and Memory Operands

4 ISA Comparison

5 Memory Addressing Byte Addressing Each byte has a unique address Word Addressing Half-word: 16-bit (or 2 bytes) Word: 32-bit (or 4 bytes) Double word : 64-bit (or 8 bytes) Quad word: 128-bit (or 16 bytes)

6 Memory Addressing Two issues Alignment Byte order (Big Endian vs. Little Endian) Alignment specifies whether there are any boundaries for word addressing Byte order specifies how multiple bytes within a word are mapped to memory addresses

7 Memory Addressing Alignment Must half word, words, double words begin mod 2, mod 4, mod 8 boundaries?

8 Memory Addressing Alignment Or are there no alignment restrictions?

9 Alignment: Why Care? Non-aligned memory references may cause multiple memory accesses First Access Second Access Consider a system in which memory reads return 4 bytes and a reference to a word spans a 4-byte boundary: two memory accesses are required Complicates memory and cache controller design Assemblers typically force alignment for efficiency

10 Memory Alignment

11 Byte Order Little Endian: The least significant byte within a word (or half word or double word) is stored in the smallest address MSB LSB byte 1 byte

12 Byte Order Little Endian: The least significant byte within a word (or half word or double word) is stored in the smallest address Example: A word (5827A6FD) 16 is stored at address 180 in littleendian format. Show the contents of bytes 180 through 183.

13 Byte Order Little Endian: The least significant byte within a word (or half word or double word) is stored in the smallest address Example: A word (5827A6FD) 16 is stored at address 180 in littleendian format. Show the contents of bytes 180 through 183. Address Value 180 FD 181 A

14 Byte Order Big Endian: The most significant byte within a word (or half word or double word) is stored in the smallest address MSB LSB byte 1 byte

15 Byte Order Big Endian: The most significant byte within a word (or half word or double word) is stored in the smallest address Example: A word (5827A6FD) 16 is stored at address 180 in bigendian format. Show the contents of bytes 180 through 183.

16 Byte Order Big Endian: The most significant byte within a word (or half word or double word) is stored in the smallest address Example: A word (5827A6FD) 16 is stored at address 180 in bigendian format. Show the contents of bytes 180 through 183. Address Value A6 183 FD

17 Byte Order in Real Systems Pros/Cons Often exaggerated Little Endian Character strings appear backwards in registers Intuitive when incrementing from LSB to MSB Big Endian: Motorola 68000, Sun Sparc, PDP-11 Little Endian: VAX, Intel IA32 Configurable: MIPS, ARM

18 Addressing Modes

19 Addressing Modes Addressing modes can reduce instruction counts but at a cost of added CPU design complexity and/or increase average CPI Example (usage of auto-increment mode): With auto-increment mode: Add R1, (R2)+ Without auto-increment mode Add R1, (R2) Add R2, #1

20 Addressing Modes Addressing modes can reduce instruction counts but at a cost of added CPU design complexity and/or increase average CPI Example (usage of displacement mode): With displacement mode: Add R4, 100(R1) Without displacement mode Add R1, #100 Add R4, (R1) Sub R1, #100

21 Addressing Modes Addressing modes can reduce instruction counts but at a cost of added CPU design complexity and/or increase average CPI Example (usage of displacement mode): With displacement mode: Add R4, 100(R1) Without displacement mode Add R1, #100 Add R4, (R1) Sub R1, #100 Support most frequently used addressing modes (make the common case fast)

22 Frequency of Addressing Modes

23 Displacement Values are Widely Distributed

24 Immediate Operand Frequency

25 Distribution of Immediate Values

26 Type and Size of Operands

27 Operations in the Instruction Set

28 Most Frequent 80x86 Instructions Most widely executed instructions are the simple operations of an instruction set Optimize the common case => make the common instructions run as fast as possible