Instruction Set Architecture (ISA) Data Types
|
|
- Emory Arnold
- 5 years ago
- Views:
Transcription
1 Instruction Set Architecture (ISA) Data Types Computer Systems: Section 4.1
2 Suppose you built a computer What Building Blocks would you use?
3 Arithmetic Logic Unit (ALU) OP1 OP2 OPERATION ALU RES
4 Full Adder SUM = A B C CarryOut = A B + A CarryIn + B CarryIn
5 Shifters
6 Hardware (Gate) Implementation 8 bit bitwise AND
7 Arithmetic Logic Unit (ALU) OP2 OP1 ALU BITWISE AND OPCODE RES
8 Computer Architecture Wikipedia a set of rules and methods that describe the functionality, organization, and implementation of computer systems the capabilities and programming model of a computer but not a particular implementation We will study the x86 architecture. Part of the architecture defines what type of data the hardware can operate on.
9 X86 Data Types Byte - 8 bit binary or ASCII character Word - 16 bit binary Double Word - 32 bit binary Quad Word - 64 bit binary 32, 64, or 128 bit floating point
10 ALU + Registers R0: 0x F0 R1: 0x F1 R2: 0xFFFF FFFF R3: OPERATION ALU
11 X86 Integer Registers bit Registers Fast Read/Write (CPU Speed) No explicit data type! Values undefined (X) until set Register Names based on Historic Usage Naming conventions used to access portions of registers
12 x86 Integer Registers Origin %rax %eax %ax %ah %al Accumulate %rcx %ecx %cx %ch %cl Counter %rdx %edx %dx %dh %dl Data %rbx %ebx %bx %bh %bl Base %rsi %esi %si Source Index %rdi %edi %di Destination Index %rsp %esp %sp Stack Pointer %rbp %ebp %bp base Pointer
13 ALU + Registers + Memory R0: 0x F0 R1: 0x F1 R2: 0xFFFF FFFF R3: 0x F0 0x F1 0xFFFF FFFF OP ALU
14 Computer vs. Adding Machine What is the difference?
15 ALU+Registers+Memory+Instructions R0: 0x F0 R1: 0x F1 R2: 0xFFFF FFFF R3: 0x F0 0x F1 0xFFFF FFFF ALU CONTROL UNIT
16 ISA Contents The data types the instructions can work on two s complement binary, ascii character, unsigned binary, etc. The instructions the hardware recognizes add, move, get, The data the instructions can work on Registers Memory The external interfaces supported by the instructions File I/O Exception Handling and Interrupts Software ISA
17 Abstraction Bits are stored in memory from most significant at left to least significant at right (int 100,000 = 0x A0) A 0 Byte m Byte m+1 Byte m+2 Byte m+3
18 Leaky Abstraction Endian -ness Some machines store as expected (Big endian) S b 31 b 30 b 29 b 28 b 27 b 26 b 25 b 24 b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b A 0 Byte 42 Byte 43 Byte 44 Byte 45 Some machines store least significant byte first! (Little-endian) S b 31 b 30 b 29 b 28 b 27 b 26 b 25 b 24 b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b A Byte 42 Byte 43 Byte 44 Byte 45
19 Why Little Endian? Casting: int x; /* 32 bits starting at byte 42 */ y = (short int) x; /* Put the least significant 16 bits from x into y */ Big Endian A x (short int) x Little Endian A x (short int) x
20 Full Adder SUM = A B CarryIn CarryOut = A&B A&CarryIn B&CarryIn
21 Eight Bit Adder CI OP1 RESULT OP2 CO
22 Big Endian vs. Little Endian Adder
23 When does Endian-ness Leak? Only on multi-byte data types (short, int, long, float, double) Only when we look at the underlying bits Big-endian machine: First byte is the most significant byte Everything works until we get binary data from a little-endian machine Little-endian machine: First byte is the least significant byte When hardware interprets the bits/bytes as a number, bytes are switched We don t even know if a machine is big-endian or little-endian! Until: we get binary data from a big-endian machine OR Until we look at the bit representation of the data, not treated as a number
24 Managing Endian-Ness Network standard is big-endian stdlib functions machine representation network (big-endian) representation htons (short), htonl (long) Network representation (big-endian) machine representation ntohs (short), ntohl (long) No-ops when hardware is big-endian endian.h functions htobe16, htobe32, htobe64, htole16, htole32, htole64 be16toh, be32toh, be64toh, le16toh, le32toh, le64toh See xmp_endian/network.c
25 Endian-ness in this Course LDAP machines are little-endian When you put binary data in a file, you must enter numbers in little-endian format! When you print memory from gdb (use the x examine command), if you specify byte output formats, data will appear little endian. (When you specify multi-byte numeric output formats, the hardware switches the bytes for you.) If you make a union of byte-data and multi-byte formats, the byte data will show endian-ness Otherwise, everything looks like big-endian!
Instruction Set Architectures
Instruction Set Architectures Computer Systems: Section 4.1 Suppose you built a computer What Building Blocks would you use? Arithmetic Logic Unit (ALU) OP1 OP2 OPERATION ALU RES ALU + Registers R0: 0x0000
More informationRegisters. Ray Seyfarth. September 8, Bit Intel Assembly Language c 2011 Ray Seyfarth
Registers Ray Seyfarth September 8, 2011 Outline 1 Register basics 2 Moving a constant into a register 3 Moving a value from memory into a register 4 Moving values from a register into memory 5 Moving
More informationAssembly Language Each statement in an assembly language program consists of four parts or fields.
Chapter 3: Addressing Modes Assembly Language Each statement in an assembly language program consists of four parts or fields. The leftmost field is called the label. - used to identify the name of a memory
More informationComputer Processors. Part 2. Components of a Processor. Execution Unit The ALU. Execution Unit. The Brains of the Box. Processors. Execution Unit (EU)
Part 2 Computer Processors Processors The Brains of the Box Computer Processors Components of a Processor The Central Processing Unit (CPU) is the most complex part of a computer In fact, it is the computer
More informationCredits and Disclaimers
Credits and Disclaimers 1 The examples and discussion in the following slides have been adapted from a variety of sources, including: Chapter 3 of Computer Systems 3 nd Edition by Bryant and O'Hallaron
More informationBinghamton University. CS-220 Spring x86 Assembler. Computer Systems: Sections
x86 Assembler Computer Systems: Sections 3.1-3.5 Disclaimer I am not an x86 assembler expert. I have never written an x86 assembler program. (I am proficient in IBM S/360 Assembler and LC3 Assembler.)
More informationLecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86
Lecture 15 Intel Manual, Vol. 1, Chapter 3 Hampden-Sydney College Fri, Mar 6, 2009 Outline 1 2 Overview See the reference IA-32 Intel Software Developer s Manual Volume 1: Basic, Chapter 3. Instructions
More informationAssembly I: Basic Operations. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University
Assembly I: Basic Operations Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Basic Execution Environment RAX RBX RCX RDX RSI RDI RBP RSP R8 R9 R10
More informationThe x86 Architecture
The x86 Architecture Lecture 24 Intel Manual, Vol. 1, Chapter 3 Robb T. Koether Hampden-Sydney College Fri, Mar 20, 2015 Robb T. Koether (Hampden-Sydney College) The x86 Architecture Fri, Mar 20, 2015
More informationLecture (02) The Microprocessor and Its Architecture By: Dr. Ahmed ElShafee
Lecture (02) The Microprocessor and Its Architecture By: Dr. Ahmed ElShafee ١ INTERNAL MICROPROCESSOR ARCHITECTURE Before a program is written or instruction investigated, internal configuration of the
More informationUMBC. A register, an immediate or a memory address holding the values on. Stores a symbolic name for the memory location that it represents.
Intel Assembly Format of an assembly instruction: LABEL OPCODE OPERANDS COMMENT DATA1 db 00001000b ;Define DATA1 as decimal 8 START: mov eax, ebx ;Copy ebx to eax LABEL: Stores a symbolic name for the
More informationCS 16: Assembly Language Programming for the IBM PC and Compatibles
CS 16: Assembly Language Programming for the IBM PC and Compatibles Discuss the general concepts Look at IA-32 processor architecture and memory management Dive into 64-bit processors Explore the components
More informationInstruction Set Architectures
Instruction Set Architectures! ISAs! Brief history of processors and architectures! C, assembly, machine code! Assembly basics: registers, operands, move instructions 1 What should the HW/SW interface
More informationAddressing Modes on the x86
Addressing Modes on the x86 register addressing mode mov ax, ax, mov ax, bx mov ax, cx mov ax, dx constant addressing mode mov ax, 25 mov bx, 195 mov cx, 2056 mov dx, 1000 accessing data in memory There
More informationIntroduction to Machine/Assembler Language
COMP 40: Machine Structure and Assembly Language Programming Fall 2017 Introduction to Machine/Assembler Language Noah Mendelsohn Tufts University Email: noah@cs.tufts.edu Web: http://www.cs.tufts.edu/~noah
More informationThe von Neumann Machine
The von Neumann Machine 1 1945: John von Neumann Wrote a report on the stored program concept, known as the First Draft of a Report on EDVAC also Alan Turing Konrad Zuse Eckert & Mauchly The basic structure
More informationAdvanced Microprocessors
Advanced Microprocessors Notes #2 Software Architecture & Instruction Set Architecture Part 1 EE 467/567 Winter 2012 by Avinash Kodi SWA.1 Background Materials Textbook: 2.1, 2.2, 3.1 Other: IA-32 Intel
More informationx86 Programming I CSE 351 Winter
x86 Programming I CSE 351 Winter 2017 http://xkcd.com/409/ Administrivia Lab 2 released! Da bomb! Go to section! No Luis OH Later this week 2 Roadmap C: car *c = malloc(sizeof(car)); c->miles = 100; c->gals
More informationCredits and Disclaimers
Credits and Disclaimers 1 The examples and discussion in the following slides have been adapted from a variety of sources, including: Chapter 3 of Computer Systems 2 nd Edition by Bryant and O'Hallaron
More informationThe von Neumann Machine
The von Neumann Machine 1 1945: John von Neumann Wrote a report on the stored program concept, known as the First Draft of a Report on EDVAC also Alan Turing Konrad Zuse Eckert & Mauchly The basic structure
More informationMODE (mod) FIELD CODES. mod MEMORY MODE: 8-BIT DISPLACEMENT MEMORY MODE: 16- OR 32- BIT DISPLACEMENT REGISTER MODE
EXERCISE 9. Determine the mod bits from Figure 7-24 and write them in Table 7-7. MODE (mod) FIELD CODES mod 00 01 10 DESCRIPTION MEMORY MODE: NO DISPLACEMENT FOLLOWS MEMORY MODE: 8-BIT DISPLACEMENT MEMORY
More informationCSE351 Spring 2018, Midterm Exam April 27, 2018
CSE351 Spring 2018, Midterm Exam April 27, 2018 Please do not turn the page until 11:30. Last Name: First Name: Student ID Number: Name of person to your left: Name of person to your right: Signature indicating:
More informationRISC I from Berkeley. 44k Transistors 1Mhz 77mm^2
The Case for RISC RISC I from Berkeley 44k Transistors 1Mhz 77mm^2 2 MIPS: A Classic RISC ISA Instructions 4 bytes (32 bits) 4-byte aligned Instructions operate on memory and registers Memory Data types
More informationMACHINE-LEVEL PROGRAMMING I: BASICS COMPUTER ARCHITECTURE AND ORGANIZATION
MACHINE-LEVEL PROGRAMMING I: BASICS COMPUTER ARCHITECTURE AND ORGANIZATION Today: Machine Programming I: Basics History of Intel processors and architectures C, assembly, machine code Assembly Basics:
More information6/20/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to:
Introduction Efficient software development for the microprocessor requires a complete familiarity with the addressing modes employed by each instruction. This chapter explains the operation of the stack
More information6/17/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to:
Chapter 2: The Microprocessor and its Architecture Chapter 2: The Microprocessor and its Architecture Chapter 2: The Microprocessor and its Architecture Introduction This chapter presents the microprocessor
More informationUNIT 2 PROCESSORS ORGANIZATION CONT.
UNIT 2 PROCESSORS ORGANIZATION CONT. Types of Operand Addresses Numbers Integer/floating point Characters ASCII etc. Logical Data Bits or flags x86 Data Types Operands in 8 bit -Byte 16 bit- word 32 bit-
More informationChapter 2: The Microprocessor and its Architecture
Chapter 2: The Microprocessor and its Architecture Chapter 2: The Microprocessor and its Architecture Chapter 2: The Microprocessor and its Architecture Introduction This chapter presents the microprocessor
More informationThe Microprocessor and its Architecture
The Microprocessor and its Architecture Contents Internal architecture of the Microprocessor: The programmer s model, i.e. The registers model The processor model (organization) Real mode memory addressing
More informationEEM336 Microprocessors I. The Microprocessor and Its Architecture
EEM336 Microprocessors I The Microprocessor and Its Architecture Introduction This chapter presents the microprocessor as a programmable device by first looking at its internal programming model and then
More informationx86 64 Programming I CSE 351 Autumn 2018 Instructor: Justin Hsia
x86 64 Programming I CSE 351 Autumn 2018 Instructor: Justin Hsia Teaching Assistants: Akshat Aggarwal An Wang Andrew Hu Brian Dai Britt Henderson James Shin Kevin Bi Kory Watson Riley Germundson Sophie
More informationEEM336 Microprocessors I. Addressing Modes
EEM336 Microprocessors I Addressing Modes Introduction Efficient software development for the microprocessor requires a complete familiarity with the addressing modes employed by each instruction. This
More informationWe can study computer architectures by starting with the basic building blocks. Adders, decoders, multiplexors, flip-flops, registers,...
COMPUTER ARCHITECTURE II: MICROPROCESSOR PROGRAMMING We can study computer architectures by starting with the basic building blocks Transistors and logic gates To build more complex circuits Adders, decoders,
More informationModule 3 Instruction Set Architecture (ISA)
Module 3 Instruction Set Architecture (ISA) I S A L E V E L E L E M E N T S O F I N S T R U C T I O N S I N S T R U C T I O N S T Y P E S N U M B E R O F A D D R E S S E S R E G I S T E R S T Y P E S O
More informationEXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM
EXPERIMENT WRITE UP AIM: Assembly language program for 16 bit BCD addition LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM TOOLS/SOFTWARE
More informationReverse Engineering II: The Basics
Reverse Engineering II: The Basics Gergely Erdélyi Senior Manager, Anti-malware Research Protecting the irreplaceable f-secure.com Binary Numbers 1 0 1 1 - Nibble B 1 0 1 1 1 1 0 1 - Byte B D 1 0 1 1 1
More informationReverse Engineering II: Basics. Gergely Erdélyi Senior Antivirus Researcher
Reverse Engineering II: Basics Gergely Erdélyi Senior Antivirus Researcher Agenda Very basics Intel x86 crash course Basics of C Binary Numbers Binary Numbers 1 Binary Numbers 1 0 1 1 Binary Numbers 1
More informationx86 Programming I CSE 351 Autumn 2016 Instructor: Justin Hsia
x86 Programming I CSE 351 Autumn 2016 Instructor: Justin Hsia Teaching Assistants: Chris Ma Hunter Zahn John Kaltenbach Kevin Bi Sachin Mehta Suraj Bhat Thomas Neuman Waylon Huang Xi Liu Yufang Sun http://xkcd.com/409/
More informationMachine/Assembler Language Putting It All Together
COMP 40: Machine Structure and Assembly Language Programming Fall 2015 Machine/Assembler Language Putting It All Together Noah Mendelsohn Tufts University Email: noah@cs.tufts.edu Web: http://www.cs.tufts.edu/~noah
More information15-213/ Final Exam Notes Sheet Spring 2013!
Jumps 15-213/18-213 Final Exam Notes Sheet Spring 2013 Arithmetic Operations Jump Condi+on jmp 1 je ZF jne ~ZF js SF jns ~SF jg ~(SF^OF)&~ZF jge ~(SF^OF) jl (SF^OF) jle (SF^OF) ZF ja ~CF&~ZF jb CF Format
More informationCS Bootcamp x86-64 Autumn 2015
The x86-64 instruction set architecture (ISA) is used by most laptop and desktop processors. We will be embedding assembly into some of our C++ code to explore programming in assembly language. Depending
More informationIntroduction to IA-32. Jo, Heeseung
Introduction to IA-32 Jo, Heeseung IA-32 Processors Evolutionary design Starting in 1978 with 8086 Added more features as time goes on Still support old features, although obsolete Totally dominate computer
More informationINTRODUCTION TO IA-32. Jo, Heeseung
INTRODUCTION TO IA-32 Jo, Heeseung IA-32 PROCESSORS Evolutionary design Starting in 1978 with 8086 Added more features as time goes on Still support old features, although obsolete Totally dominate computer
More informationX86 Addressing Modes Chapter 3" Review: Instructions to Recognize"
X86 Addressing Modes Chapter 3" Review: Instructions to Recognize" 1 Arithmetic Instructions (1)! Two Operand Instructions" ADD Dest, Src Dest = Dest + Src SUB Dest, Src Dest = Dest - Src MUL Dest, Src
More informationHardware and Software Architecture. Chapter 2
Hardware and Software Architecture Chapter 2 1 Basic Components The x86 processor communicates with main memory and I/O devices via buses Data bus for transferring data Address bus for the address of a
More informationCS 31: Intro to Systems ISAs and Assembly. Martin Gagné Swarthmore College February 7, 2017
CS 31: Intro to Systems ISAs and Assembly Martin Gagné Swarthmore College February 7, 2017 ANNOUNCEMENT All labs will meet in SCI 252 (the robot lab) tomorrow. Overview How to directly interact with hardware
More informationCS165 Computer Security. Understanding low-level program execution Oct 1 st, 2015
CS165 Computer Security Understanding low-level program execution Oct 1 st, 2015 A computer lets you make more mistakes faster than any invention in human history - with the possible exceptions of handguns
More informationCMSC Lecture 03. UMBC, CMSC313, Richard Chang
CMSC Lecture 03 Moore s Law Evolution of the Pentium Chip IA-32 Basic Execution Environment IA-32 General Purpose Registers Hello World in Linux Assembly Language Addressing Modes UMBC, CMSC313, Richard
More informationMicroprocessor (COM 9323)
Microprocessor (COM 9323) Lecture 3: The Microprocessor and Its Architecture Ahmed Elnakib, PhD Assistant Professor, Mansoura University, Egypt Feb 24 th, 2016 1 Text Book/References* Textbook: The Intel
More informationInterfacing Compiler and Hardware. Computer Systems Architecture. Processor Types And Instruction Sets. What Instructions Should A Processor Offer?
Interfacing Compiler and Hardware Computer Systems Architecture FORTRAN 90 program C++ program Processor Types And Sets FORTRAN 90 Compiler C++ Compiler set level Hardware 1 2 What s Should A Processor
More informationToday: Machine Programming I: Basics
Today: Machine Programming I: Basics History of Intel processors and architectures C, assembly, machine code Assembly Basics: Registers, operands, move Intro to x86-64 1 Intel x86 Processors Totally dominate
More informationInstruction Set Architectures
Instruction Set Architectures ISAs Brief history of processors and architectures C, assembly, machine code Assembly basics: registers, operands, move instructions 1 What should the HW/SW interface contain?
More informationFunction Calls and Stack
Function Calls and Stack Philipp Koehn 16 April 2018 1 functions Another Example 2 C code with an undefined function int main(void) { int a = 2; int b = do_something(a); urn b; } This can be successfully
More informationCS 261 Fall Machine and Assembly Code. Data Movement and Arithmetic. Mike Lam, Professor
CS 261 Fall 2018 0000000100000f50 55 48 89 e5 48 83 ec 10 48 8d 3d 3b 00 00 00 c7 0000000100000f60 45 fc 00 00 00 00 b0 00 e8 0d 00 00 00 31 c9 89 0000000100000f70 45 f8 89 c8 48 83 c4 10 5d c3 Mike Lam,
More informationMoodle WILLINGDON COLLEGE SANGLI (B. SC.-II) Digital Electronics
Moodle 4 WILLINGDON COLLEGE SANGLI (B. SC.-II) Digital Electronics Advanced Microprocessors and Introduction to Microcontroller Moodle developed By Dr. S. R. Kumbhar Department of Electronics Willingdon
More informationThe x86 Architecture. ICS312 - Spring 2018 Machine-Level and Systems Programming. Henri Casanova
The x86 Architecture ICS312 - Spring 2018 Machine-Level and Systems Programming Henri Casanova (henric@hawaii.edu) The 80x86 Architecture! To learn assembly programming we need to pick a processor family
More informationComplex Instruction Set Computer (CISC)
Introduction ti to IA-32 IA-32 Processors Evolutionary design Starting in 1978 with 886 Added more features as time goes on Still support old features, although obsolete Totally dominate computer market
More informationToday: Machine Programming I: Basics. Machine Level Programming I: Basics. Intel x86 Processors. Intel x86 Evolution: Milestones
Today: Machine Programming I: Basics Machine Level Programming I: Basics 15 213/1 213: Introduction to Computer Systems 5 th Lecture, Jan 29, 2013 History of Intel processors and architectures C, assembly,
More informationAssembly Language Programming Introduction
Assembly Language Programming Introduction October 10, 2017 Motto: R7 is used by the processor as its program counter (PC). It is recommended that R7 not be used as a stack pointer. Source: PDP-11 04/34/45/55
More information1. Introduction to Assembly Language
www.vchowk.com 1. Introduction to Assembly Language Solved EXERCISE 1 Note: Dear fellows I tried my best to solve this exercise questions if there s any mistake or doubt in any question correct it and
More informationLecture 3: Instruction Set Architecture
Lecture 3: Instruction Set Architecture Interface Software/compiler instruction set hardware Design Space of ISA Five Primary Dimensions Number of explicit operands ( 0, 1, 2, 3 ) Operand Storage Where
More informationHow Software Executes
How Software Executes CS-576 Systems Security Instructor: Georgios Portokalidis Overview Introduction Anatomy of a program Basic assembly Anatomy of function calls (and returns) Memory Safety Programming
More informationCode segment Stack segment
Registers Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1
More informationAccess. Young W. Lim Fri. Young W. Lim Access Fri 1 / 18
Access Young W. Lim 2017-01-27 Fri Young W. Lim Access 2017-01-27 Fri 1 / 18 Outline 1 Introduction References IA32 Operand Forms Data Movement Instructions Young W. Lim Access 2017-01-27 Fri 2 / 18 Based
More informationCS241 Computer Organization Spring 2015 IA
CS241 Computer Organization Spring 2015 IA-32 2-10 2015 Outline! Review HW#3 and Quiz#1! More on Assembly (IA32) move instruction (mov) memory address computation arithmetic & logic instructions (add,
More informationReverse Engineering II: The Basics
Reverse Engineering II: The Basics This document is only to be distributed to teachers and students of the Malware Analysis and Antivirus Technologies course and should only be used in accordance with
More informationCHAPTER 3 BASIC EXECUTION ENVIRONMENT
CHAPTER 3 BASIC EXECUTION ENVIRONMENT This chapter describes the basic execution environment of an Intel 64 or I A-32 processor as seen by assemblylanguage programmers. It describes how the processor executes
More informationA4 Sample Solution Ch3
A4 Sample Solution Ch3 2. AL, AH, BL, BH,CL,CH,DLl, DH 3. AX, BX, CX, DX, SP, BP, SI, DI, CS, DS, ES, SS, FS, GS 4. EAX, EBX, ECX, EDX, ESP, EBP, EDI, ESI 5. RAX, RBX, RCX, RDX, RSP, RBP, RSI, RDI and
More informationComputer Architecture and System Programming Laboratory. TA Session 3
Computer Architecture and System Programming Laboratory TA Session 3 Stack - LIFO word-size data structure STACK is temporary storage memory area register points on top of stack (by default, it is highest
More informationAssembly Language for Intel-Based Computers, 4 th Edition. Chapter 2: IA-32 Processor Architecture Included elements of the IA-64 bit
Assembly Language for Intel-Based Computers, 4 th Edition Kip R. Irvine Chapter 2: IA-32 Processor Architecture Included elements of the IA-64 bit Slides prepared by Kip R. Irvine Revision date: 09/25/2002
More informationCSE2421 FINAL EXAM SPRING Name KEY. Instructions: Signature
CSE2421 FINAL EXAM SPRING 2013 Name KEY Instructions: This is a closed-book, closed-notes, closed-neighbor exam. Only a writing utensil is needed for this exam. No calculators allowed. If you need to go
More informationC to Assembly SPEED LIMIT LECTURE Performance Engineering of Software Systems. I-Ting Angelina Lee. September 13, 2012
6.172 Performance Engineering of Software Systems SPEED LIMIT PER ORDER OF 6.172 LECTURE 3 C to Assembly I-Ting Angelina Lee September 13, 2012 2012 Charles E. Leiserson and I-Ting Angelina Lee 1 Bugs
More informationAccess. Young W. Lim Sat. Young W. Lim Access Sat 1 / 19
Access Young W. Lim 2017-06-10 Sat Young W. Lim Access 2017-06-10 Sat 1 / 19 Outline 1 Introduction References IA32 Operand Forms Data Movement Instructions Data Movement Examples Young W. Lim Access 2017-06-10
More informationProgram controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions.
8086 Microprocessor Microprocessor Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions. It is used as CPU (Central Processing Unit) in computers.
More informationCS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College February 9, 2016
CS 31: Intro to Systems ISAs and Assembly Kevin Webb Swarthmore College February 9, 2016 Reading Quiz Overview How to directly interact with hardware Instruction set architecture (ISA) Interface between
More informationMACHINE-LEVEL PROGRAMMING I: BASICS
MACHINE-LEVEL PROGRAMMING I: BASICS CS 429H: SYSTEMS I Instructor: Emmett Witchel Today: Machine Programming I: Basics History of Intel processors and architectures C, assembly, machine code Assembly Basics:
More informationCSE 351 Midterm Exam
University of Washington Computer Science & Engineering Winter 2018 Instructor: Mark Wyse February 5, 2018 CSE 351 Midterm Exam Last Name: First Name: SOLUTIONS UW Student ID Number: UW NetID (username):
More informationCS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College September 25, 2018
CS 31: Intro to Systems ISAs and Assembly Kevin Webb Swarthmore College September 25, 2018 Overview How to directly interact with hardware Instruction set architecture (ISA) Interface between programmer
More informationCMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING LECTURE 03, SPRING 2013
CMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING LECTURE 03, SPRING 2013 TOPICS TODAY Moore s Law Evolution of Intel CPUs IA-32 Basic Execution Environment IA-32 General Purpose Registers
More informationCS241 Computer Organization Spring Introduction to Assembly
CS241 Computer Organization Spring 2015 Introduction to Assembly 2-05 2015 Outline! Rounding floats: round-to-even! Introduction to Assembly (IA32) move instruction (mov) memory address computation arithmetic
More informationThe Instruction Set. Chapter 5
The Instruction Set Architecture Level(ISA) Chapter 5 1 ISA Level The ISA level l is the interface between the compilers and the hardware. (ISA level code is what a compiler outputs) 2 Memory Models An
More informationAssembly level Programming. 198:211 Computer Architecture. (recall) Von Neumann Architecture. Simplified hardware view. Lecture 10 Fall 2012
19:211 Computer Architecture Lecture 10 Fall 20 Topics:Chapter 3 Assembly Language 3.2 Register Transfer 3. ALU 3.5 Assembly level Programming We are now familiar with high level programming languages
More informationMachine Level Programming I: Basics
Carnegie Mellon Machine Level Programming I: Basics Kai Shen Why do I care for machine code? Chances are, you ll never write programs in machine code Compilers are much better & more patient than you are
More informationLAB 5 Arithmetic Operations Simple Calculator
LAB 5 Arithmetic Operations Simple Calculator Objective: Practice arithmetic operation for the 80x86, such as add, subtract, multiple, divide, and mod. When dealing with the multiply, divide, and mod instructions
More informationCarnegie Mellon. 5 th Lecture, Jan. 31, Instructors: Todd C. Mowry & Anthony Rowe
Machine Level Programming I: Basics 15 213/18 213: 213: Introduction to Computer Systems 5 th Lecture, Jan. 31, 2012 Instructors: Todd C. Mowry & Anthony Rowe 1 Today: Machine Programming gi: Basics History
More informationMachine Program: Procedure. Zhaoguo Wang
Machine Program: Procedure Zhaoguo Wang Requirements of procedure calls? P() { y = Q(x); y++; 1. Passing control int Q(int i) { int t, z; return z; Requirements of procedure calls? P() { y = Q(x); y++;
More informationRev101. spritzers - CTF team. spritz.math.unipd.it/spritzers.html
Rev101 spritzers - CTF team spritz.math.unipd.it/spritzers.html Disclaimer All information presented here has the only purpose of teaching how reverse engineering works. Use your mad skillz only in CTFs
More informationMeet & Greet! Come hang out with your TAs and Fellow Students (& eat free insomnia cookies) When : TODAY!! 5-6 pm Where : 3rd Floor Atrium, CIT
Meet & Greet! Come hang out with your TAs and Fellow Students (& eat free insomnia cookies) When : TODAY!! 5-6 pm Where : 3rd Floor Atrium, CIT CS33 Intro to Computer Systems XI 1 Copyright 2017 Thomas
More informationTurning C into Object Code Code in files p1.c p2.c Compile with command: gcc -O p1.c p2.c -o p Use optimizations (-O) Put resulting binary in file p
Turning C into Object Code Code in files p1.c p2.c Compile with command: gcc -O p1.c p2.c -o p Use optimizations (-O) Put resulting binary in file p text C program (p1.c p2.c) Compiler (gcc -S) text Asm
More informationCSC 2400: Computer Systems. Towards the Hardware: Machine-Level Representation of Programs
CSC 2400: Computer Systems Towards the Hardware: Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32)
More informationMachine-level Representation of Programs. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University
Machine-level Representation of Programs Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Program? 짬뽕라면 준비시간 :10 분, 조리시간 :10 분 재료라면 1개, 스프 1봉지, 오징어
More informationLab 2: Introduction to Assembly Language Programming
COE 205 Lab Manual Lab 2: Introduction to Assembly Language Programming - page 16 Lab 2: Introduction to Assembly Language Programming Contents 2.1. Intel IA-32 Processor Architecture 2.2. Basic Program
More informationAssembly Language Programming 64-bit environments
Assembly Language Programming 64-bit environments October 17, 2017 Some recent history Intel together with HP start to work on 64-bit processor using VLIW technology. Itanium processor is born with the
More informationBasic Execution Environment
Basic Execution Environment 3 CHAPTER 3 BASIC EXECUTION ENVIRONMENT This chapter describes the basic execution environment of an Intel Architecture processor as seen by assembly-language programmers.
More informationThe Hardware/Software Interface CSE351 Spring 2013
The Hardware/Software Interface CSE351 Spring 2013 x86 Programming II 2 Today s Topics: control flow Condition codes Conditional and unconditional branches Loops 3 Conditionals and Control Flow A conditional
More informationCS24: INTRODUCTION TO COMPUTING SYSTEMS. Spring 2018 Lecture 4
CS24: INTRODUCTION TO COMPUTING SYSTEMS Spring 2018 Lecture 4 LAST TIME Enhanced our processor design in several ways Added branching support Allows programs where work is proportional to the input values
More informationLecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit
Lecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit 1 1. introduction The internal function of 8086 processor are partitioned logically into processing units,bus Interface Unit(BIU)
More informationMicrocomputer Architecture..Second Year (Sem.2).Lecture(2) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات
1) Input/output In computing, input/output or I/O, is the communication between an information processing system (such as a computer) and the outside world, possibly a human or another information processing
More informationCSC 8400: Computer Systems. Machine-Level Representation of Programs
CSC 8400: Computer Systems Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32) 1 Compilation Stages
More informationLecture 4 CIS 341: COMPILERS
Lecture 4 CIS 341: COMPILERS CIS 341 Announcements HW2: X86lite Available on the course web pages. Due: Weds. Feb. 7 th at midnight Pair-programming project Zdancewic CIS 341: Compilers 2 X86 Schematic
More information