Operating Systems (1DT020 & 1TT802)

Transcription

1 Uppsala University Department of Information Technology Name: Perso. no: Operating Systems (1DT020 & 1TT802) This is a closed book exam. Calculators are not allowed. Answers should be written in English. Write your name on each sheet A mark of 50% is required to pass the exam. Make your answers as concise as possible. Write all your answers directly on this paper. Space for your answer has been left after each question. If you need more space you can use page 19 and 20 (do not forget to recall the number of the question). You should hand in all the 20 pages of the exam (even if you do not use page 19 and 20). The number in square brackets after the question s number indicates the number of points given to the question; there are 100 points in all. Problem no. Points possible Points scored TOTAL 100 Page 1/20

2 A. Operating systems, processes and threads [23 points] 1) [8 pts] 1-a) [2 pts] Give a short definition of an operating system. 1-b) [3 pts] What is an operating system kernel? Give 4 examples of operating system activities that must be performed by the operating system kernel. 1-c) [3 pts] What is dual mode operation? Why is dual mode operation needed? What is a privileged instruction in a processor s instruction set architecture? Page 2/20

3 2) [15 pts] 2-a) [2 pts] What is the difference between a program and a process? 2-b) [3 pts] What is the difference between processes and threads? 2-c) [3 pts] What is the CPU context of a process? Briefly describe what the operating system does to perform a context switch (assume an operating system with a UNIX-like process model, i.e. without threads). Page 3/20

4 2-d) [4 pts] There are 3 types of events (at the instruction set level) that can trigger a context switch. Name them and give a short definition for each. 2-e) [3 pts] In a computer system with virtual memory a user program has the illusion of being alone in memory. Where in memory is the operating system program to which control is transferred when one of the events that trigger a context switch occurs? How is that operating system program protected? Page 4/20

5 B. CPU scheduling [15 points] 3) [15 pts] Suppose we have the following processes and their associated CPU running times. All the processes arrive in alphabetical order at time 0. Process ID CPU running time A 20 B 50 C 30 D 40 E 30 3-a) [4 pts] Show the scheduling order for these processes under 4 policies: First Come First Served (FCFS), Shortest Job First (SJF), Round-Robin (RR) with time slice quantum = 10, and Shortest Remaining Time First (SRTF). Assume that context-switch overhead is 2, and that there is a context switch to launch the first process and a context switch when the last process terminates. Use the table below for your answer. Give the ID of the process executed each time slot (quantum) You can omit the ID when it is the same as in the previous time slot. Time Slot (quantum number) FCFS SJF RR SRTF Page 5/20

6 3-b)[4 pts] For each process in each schedule above, indicate the waiting time (WT) and the completion time (CT). Note that the waiting time is the total time spent waiting in ready queue, while the completion time is the total time from arrival to completion. (Fill out the table below) Scheduler Process A Process B Process C Process D Process E FCFS WT CT SJF WT CT RR WT CT SRTF WT CT 3-c) [2 pts] With a context switch overhead of 2, is a quantum of 10 a good choice for Round Robin scheduling? Why or why not? 3-d) [3 pts] In this problem, we have so far ignored I/O. Real applications alternate between waiting for I/O (or other events) and CPU time bursts. The CPU time burst of a process is the time between blocking on I/O operations or other events. The CPU time burst is hard to determine before runtime. Describe one way to dynamically predict (at runtime) the CPU time burst of a process. Page 6/20

7 3-e) [2 pts] Suppose that a scheduling algorithm favours those processes that have used the least CPU time in the recent past. Why will this algorithm favour I/O-bound processes and yet not permanently starve CPU-bound processes? C. Synchronization (21 points) 4) [12 pts] Mutual exclusion consists in ensuring that only one thread does a particular thing at a time. That is, one thread excludes the others while doing its task (this task is a critical section of the thread and threads have to synchronize to access critical sections). Changing a shared variable, updating a table, writing a file are examples of tasks that have to be performed in a mutually exclusive way. 4-a) [2 pts] One way to implement mutual exclusion on a mono-processor system is to provide user programs with system calls to acquire and release locks managed by the operating system. Suppose a thread is running in a critical section: meaning that it has acquired all the locks through proper arbitration. Can it get context-switched? Why or why not? Page 7/20

8 4-b) [2 pts] Another way to provide mutual exclusion on a mono-processor system is to provide the user with a system call to disable interrupts and a system call to enable interrupts. List two problems with this approach. 4-c) [3 pts] Some processors have atomic instructions to read and modify a variable in memory (eg. test and set, swap) which can be used to implement spinlocks. With spinlocks, threads spin in a loop (busy waiting) until the lock is freed. In class, we motivated the use of blocking locks and semaphores as an improvement over spinlocks because busy waiting can be very inefficient in terms of processor utilization. However, spinlocks are not always less efficient than blocking locks. Briefly describe a scenario where spinlocks would be more efficient than blocking locks. Page 8/20

9 4-d) [3 pts] Briefly explain how one can implement mutual exclusion to a critical section without busy-waiting using interrupts disabling and enabling and a lock variable in kernel. When are interrupts disabled and re-enabled? 4-e) [2 pts] Briefly explain how semaphores can be used to implement mutual exclusion access to critical sections. 5) [9 pts] Monitors are language constructs. A monitor has internal state variables, zero or more condition variables for managing concurrent access to shared data, together with operations that are guaranteed to be mutually exclusive. The compiler, with the help of system calls provided by the operating system, insures that threads acquire the lock associated to the monitor at the entry of a monitor s operation and release the lock when they leave a monitor operation or block inside a monitor operation. When resumed, a thread blocked inside a monitor operation has to re-acquire the monitor s lock. A monitor has also an initialization operation, init(), executed once (at monitor creation). A condition variable can be seen as a queue of threads waiting for something inside a critical section. There are 2 operations that can be performed on a condition variable c: - c.wait() put the calling thread on the queue c - c.signal() remove one and only one thread from the queue c (no operation if the queue is empty). The scheduling of the queue is implementation dependent. Page 9/20

10 A key idea with monitors is that they make it possible for a thread to go to sleep inside critical section by atomically releasing the lock to monitor at the time the thread goes to sleep. An important issue is then: which of the signaler and the awaken waiter gets the lock to monitor? - In Hoare-style monitors: the signaler gives the lock and processor to the awaken waiter and the awaken waiter runs immediately. Waiter gives the lock and processor back to signaler when waiter exits critical section or waiter waits again. - In Mesa-style (most real operating systems): signaler keeps lock and processor, and waiter is placed on ready queue with no special priority. 5-a) [2 pts] Briefly compare Hoare-style and Mesa-style monitors. 5-b) [7 pts] A rendez-vous monitor It is sometimes useful to allow N threads to rendez-vous. That is, each thread has a meeting point in its own code, and no thread can go beyond its meeting point before all the N participating threads have arrived at their respective meeting points. This is usually called a synchronization barrier. In lab 2, we studied barrier implementation using semaphores. This problem deals with barrier implementation using a monitor. 5-b-i) [5 pts] Design a Mesa-style monitor rendezvous with 1 operation, arrived(). To achieve barrier synchronization N Threads use a rendezvous monitor as follows: - when the program is loaded for execution, the monitor initialization operation init is executed with N (the number of thread participating in the rendez-vous) as parameter. - each thread s program is as follows : //code before the meeting point rendezvous.arrived() //the thread is at its meeting point //code beyond the meeting point Page 10/20

11 When a thread calls rendezvous.arrived(), it is blocked until all the N participating threads have called rendezvous.arrived(). Your solution should work and avoid deadlock for any number of participating threads as far as they use the monitor rendezvous as indicated above. Explain your design for full credit (Do not forget to describe the internal state variables of the monitor and the code for initialization operation). Page 11/20

12 Answer to question 5-b-i (continued) 5-b-ii) [2 pts] Is it possible write a simpler solution using a Hoare-style monitor? Why or why not? D. Virtual Memory [26 points] 6) [8 pts] 6-a) [2 pts] What is a virtual address? What is the address space of a process? Page 12/20

13 6-b) [4 pts] Briefly explain what a page fault is and how it is handled by the operating system. 6-c) [2 pts] What are translation look-aside buffers (TLBs)? Why are TLB important? 7 [10 pts] Assume a machine with 64-bit virtual addresses and a memory addressing with segments that are paged. Each process can have up to 64K (2 16 ) segments, and page size is 64 K bytes. The segment tables and page tables are stored in main memory, and the processor has a segment register that contains the address of the process s segment table. The segment tables and page tables can start at any byte address. If valid, each segment table entry (STE) points to a page table, and each page table entry (PTE) points to a page in physical memory. Each PTE has also: a read-enable bit, a write-enable bit, a reference bit (set on each reference to the page), and a dirty bit (set each time the reference to the page is a write). The machine can support physical memories up to 64 gigabytes (2 36 ). Page 13/20

14 7-a) [5 pts] Draw a diagram of the machine s address translation system. Show how the pieces of the virtual address are used to reference each of the tables, and to generate the physical address. Give the size of each field, where it is used, and where it comes from. Also indicate where page faults or memory protection violation traps will be indicated. 7-b) [2 pts] How large (in bytes) is a full-sized segment table? Page 14/20

15 7-c) [2 pts] Is it a good idea to add a limit field in STE s? Why or why not? Should this limit field be in units of bytes or pages? 7-d) [1 pt] Considering only the memory addressing system described in this problem (no TLB is used), what needs to be saved and restored on context switch? (Assume a UNIX like process model without threads) 8 [8 pts] 8-a) [4 pts] The LRU (Least Recently Used) page replacement replaces the page that has not been used for the longest period of time. Explain why LRU implementations are not conceivable without hardware assistance beyond the standard TLB. Briefly explain how LRU can be approximated (be explicit and describe the hardware support which is necessary). Page 15/20

16 8-b) [4 pts] What is the working set of a process? Describe a way to approximate the working set of a process and how to use it to detect and avoid thrashing (ie detect and avoid system performance degradation due to too many swapping-out and swapping-in of pages). E. File systems [8 points] 9) [8 pts] 9-a) [2 pts] Which component of disk access time is the disk scheduling algorithm trying to minimize? 9-b) [6 pts] Consider the following 3 file descriptor structures: contiguous allocation, linked list allocation, and Unix multilevel indexed allocation. Each of the structures has its advantages and disadvantages depending on the goals for the operating system and the expected file access patterns. For each of the 2 following situations (9-b-i and 9-b-ii), rank the 3 file descriptor structures in order of preference. Give the justification for your ranking. Page 16/20

17 9-b-i) [3 pts] We have a file system where the most important criteria is the performance of random access to very large files. 9-b-ii) [3pts] We have a file system where the most important criteria is the utilization of the disk capacity (i.e. getting as much file bytes on the disk as possible)? F. I/O systems [8 points] 10) [8 pts] 10-a) [2 pts] What is the difference between an I/O device controller and an I/O device driver? For each of them say if it is or it is not part of the operating system. Page 17/20

18 10-b) [3 pts] The operating system can be notified that an I/O device has completed an operation using two different methods. Name these two I/O completion notification methods and briefly compare them. 10-c) [3 pts] Define Direct Memory Access (DMA). Under what conditions is it useful? End! (You can use the 2 following pages for additional space for your answers) Page 18/20

19 Use this blank page for additional space for your answers. (You should hand in this page even if you do note use it) Page 19/20

20 Use this blank page for additional space for your answers. (You should hand in this page even if you do note use it) Page 20/20