Specifications and Modeling

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1 12 Specifications and Modeling Peter Marwedel TU Dortmund, Informatik 12 Springer, 年 10 月 17 日 These slides use Microsoft clip arts. Microsoft copyright restrictions apply.

2 Hypothetical design flow Application Knowledge 2: Specification 3: ES-hardware 4: System software (RTOS, middleware, ) Design repository 6: Application mapping 7: Optimization 5: Evaluation & Validation (energy, cost, performance, ) Design 8. Test * * Could be integrated into loop Numbers denote sequence of chapters - 2 -

3 Motivation for considering specs & models Why considering specs and models in detail? If something is wrong with the specs, then it will be difficult to get the design right, potentially wasting a lot of time. time Typically, we work with models of the system under design (SUD) What is a model anyway? - 3 -

4 Models Definition: A model is a simplification of another entity, which can be a physical thing or another model. The model contains exactly those characteristics and properties of the modeled entity that are relevant for a given task. A model is minimal with respect to a task if it does not contain any other characteristics than those relevant for the task. [Jantsch, 2004]: Which requirements do we have for our models? - 4 -

5 Requirements for specification & modeling techniques: Hierarchy Hierarchy Humans not capable to understand systems containing more than ~5 objects. Most actual systems require more objects Hierarchy (+ abstraction) Behavioral hierarchy Examples: states, processes, procedures. proc proc proc Structural hierarchy Examples: processors, racks, printed circuit boards - 5 -

6 Requirem. for specification & modeling techniques: Component-based design Systems must be designed from components Must be easy to derive behavior from behavior of subsystems Work of Sifakis, Thiele, Ernst, Concurrency Synchronization and communication - 6 -

7 Requirements for specification & modeling techniques (3): Timing Timing behavior Essential for embedded and cy-phy systems! Additional information (periods, dependences, scenarios, use cases) welcome Also, the speed of the underlying platform must be known Far-reaching consequences for design processes! The lack of timing in the core abstraction (of computer science) is a flaw, from the perspective of embedded software [Lee, 2005] - 7 -

8 Requirements for specification & modeling techniques (3): Timing (2) 4 types of timing specs required, according to Burns, 1990: 1. Measure elapsed time Check, how much time has elapsed since last call? execute t 2. Means for delaying processes t - 8 -

9 Requirements for specification & modeling techniques (3): Timing (3) 3. Possibility to specify timeouts Stay in a certain state a maximum time. 4. Methods for specifying deadlines Not available or in separate control file. execute t - 9 -

10 Specification of ES (4): Support for designing reactive systems State-oriented behavior Required for reactive systems; classical automata insufficient. Event-handling (external or internal events) Exception-oriented behavior Not acceptable to describe exceptions for every state We will see, how all the arrows labeled k can be replaced by a single one

11 Requirements for specification & modeling techniques (5) Presence of programming elements Executability (no algebraic specification) Support for the design of large systems ( OO) Domain-specific support Readability Portability and flexibility Termination Support for non-standard I/O devices Non-functional properties Support for the design of dependable systems No obstacles for efficient implementation Adequate model of computation What does it mean to compute?

12 Problems with classical CS theory and von Neumann (thread) computing Even the core notion of computable is at odds with the requirements of embedded software. In this notion, useful computation terminates, but termination is undecidable. In embedded software, termination is failure, and yet to get predictable timing, subcomputations must decidably terminate. What is needed is nearly a reinvention of computer science. Edward A. Lee: Absolutely Positively on Time, IEEE Computer, July, 2005 Search for non-thread-based, non-von-neumann MoCs

13 Models of computation What does it mean, to compute? Models of computation define: Components and an execution model for computations for each component Communication model for exchange of information between components. C-1 C

14 Dependence graph: Definition Sequence constraint Nodes could be be programs or or simple operations Def.: A dependence graph is a directed graph G=(V,E) in which E V V is a relation. If (v 1, v 2 ) E, then v 1 is called an immediate predecessor of v 2 and v 2 is called an immediate successor of v 1. Suppose E* is the transitive closure of E. If (v 1, v 2 ) E*, then v 1 is called a predecessor of v 2 and v 2 is called a successor of v

15 Dependence graph: Timing information Dependence graphs may contain additional information, for example: Timing information Arrival time deadline

16 Dependence graph: I/O-information

17 Dependence graph: Shared resources

18 Dependence graph: Periodic schedules A job is single execution of the dependence graph Periodic dependence graphs are infinite

19 Dependence graph: Hierarchical task graphs

20 Communication Shared memory Comp-1 memory Comp-2 Variables accessible to several components/tasks. Model mostly restricted to local systems

21 Shared memory thread a { u = 1;.. P(S) //obtain mutex if u<5 {u = u + 1;..} // critical section V(S) //release mutex } thread b {.. P(S) //obtain mutex u = 5 // critical section V(S) //release mutex } Unexpected u=6 possible if P(S) and V(S) is not used (double context switch before execution of {u = u+1} S: semaphore P(S) grants up to n concurrent accesses to resource n=1 in this case (mutex/lock) V(S) increases number of allowed accesses to resource Thread-based (imperative) model should be supported by mutual exclusion for critical sections

22 Non-blocking/asynchronous message passing Sender does not have to wait until message has arrived; send () receive () Potential problem: buffer overflow

23 Blocking/synchronous message passing - rendez-vous Sender will wait until receiver has received message send () receive () No buffer overflow, but reduced performance

24 Organization of computations within the components (1) Finite state machines

25 Organization of computations within the components (2) Discrete event model queue a b c a:=5 b:=7 c:=8 a:=6 a:=9 time action Von Neumann model Sequential execution, program memory etc

26 Organization of computations within the components (3) Differential equations 2 x 2 t b Data flow (models the flow of data in a distributed system) Petri nets (models synchronization in a distributed system)

27 Models of computation considered in this course Communication/ local computations Undefined components Communicating finite state machines Data flow Petri nets Shared memory StateCharts Scoreboarding + Tomasulo Algorithm ( Comp.Archict.) Message passing Synchronous Asynchronous Plain text, use cases (Message) sequence charts SDL Kahn networks, SDF C/E nets, P/T nets, Discrete event (DE) model Von Neumann model * Classification based on implementation with centralized data structures VHDL*, Verilog*, SystemC*, C, C++, Java Only experimental systems, e.g. distributed DE in Ptolemy C, C++, Java with libraries CSP, ADA

28 Summary Requirements for specification & modeling Hierarchy.. Appropriate model of computation Models of computation = Dependence graphs models for communication - Shared memory - Message passing models of components - finite state machines (FSMs) - discrete event systems,

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