Implementing debug. and trace access. through functional I/O. Alvin Yang Staff FAE. Arm Tech Symposia Arm Limited

Size: px

Start display at page:

Download "Implementing debug. and trace access. through functional I/O. Alvin Yang Staff FAE. Arm Tech Symposia Arm Limited"

Christal Sharp
5 years ago
Views:

1 Implementing debug and trace access through functional I/O Alvin Yang Staff FAE Arm Tech Symposia 2017

2 Agenda Debug and trace access limitations A new approach Protocol based Bare metal vs mission mode Shared vs dedicated interface controller Securing access End-to-end solution 2

3 Limitations of JTAG-based access Today s debug access over JTAG poses a number of practical challenges. Visibility is increasingly being constrained by insufficient bandwidth. A new approach is required to provide sufficient visibility and bandwidth from silicon bring-up to in-field deployment. 3

4 Moving to protocol-based debug Today Typically restricted to lab environment Future Access over arbitrary existing interface enables debug through product lifespan 4

CoreSight SoC-600 enabling debug throughout the product lifespan Removes reliance on JTAG Better visibility through increased bandwidth Debug throughout product lifespan Remote debug reduces cost of

5 CoreSight SoC-600 enabling debug throughout the product lifespan Removes reliance on JTAG Better visibility through increased bandwidth Debug throughout product lifespan Remote debug reduces cost of ownership Benefits include In-field debug, while device operating in its intended environment Remote debug sessions (e.g. data center, car, IoT node) More bandwidth translates to faster fault identification E.g. debug and trace over same link IO cost savings 5

6 Standard API one API for all tools Standard API used by debug/analysis tools to Configure the target Debug tool CoreSight SoC600 Debug the target Receive trace from the target Standard Debug/Trace API OS Kernel Interface to memory/devices This abstracts the underlying protocols and transport. Debug/Trace Target interface Functional I/O Driver Host Debug/Trace Protocol Arm Tool vendor Debug/Trace Target agent Functional I/O Driver Target SoC Vendor 6

7 Reference protocol spec/implementation Arm to provide a protocol specification and host/target reference software implementations. Debug tool Standard Debug/Trace API CoreSight SoC600 OS Kernel Interface to memory/devices CoreSight Wire Protocol - CSWP Reference code will be freely available. Debug/Trace Target interface Functional I/O Driver Host Debug/Trace Protocol Arm Tool vendor Debug/Trace Target agent Functional I/O Driver Target SoC Vendor 7

8 A practical approach balancing cost, intrusiveness and performance (part 1) Lowest silicon cost No additional dedicated resources needed Intrusive Protocol and link run by same CPU being debugged Bare-metal debug not supported Link owned by same target CPU 8

9 Mission Mode - software view DS-5 9

10 A practical approach balancing cost, intrusiveness and performance (part 2) Non-intrusive. Full debug features, including bare-metal. USB interface dedicated to debug. 10

11 A practical approach balancing cost, intrusiveness and performance (part 3) Non-intrusive. Full debug features, including bare-metal. USB PHY interface shared between system and debug. 11

12 Bare-Metal software view 12

13 SoC-600 in FPGA 13

Turn-key solution for authenticated debug Interoperability with other Arm components: SDC-600 (Secure Debug Channel) Socrates Debug Subsystem SoC - Dedicated path to security IP CoreSight SoC Host

14 Turn-key solution for authenticated debug Interoperability with other Arm components: SDC-600 (Secure Debug Channel) Socrates Debug Subsystem SoC - Dedicated path to security IP CoreSight SoC Host CPU - Standardized communication protocol - Full software interoperability with Arm security IP - Secure authentication of debug access Tooling support - Arm Socrates - Arm Development Studio Certificate SDC-600 Secure Debug Channel Isolating I/F Secure CPU Boot ROM Secure RAM Cryptography LCS Mgr Arm Security IP Debug control Secure Always On Alarms Roots of Trust 14

15 SDC-600 in details Direct APB interface from DP to SDC-600. Authentication method through SDC-600 configures access status of MEM-AP to debug memory. Slave COM Port 15

Arm provides specs and a reference implementation Debug tools ecosystem standardization.

16 CoreSight: a comprehensive end-to-end solution IP library & tools for the creation of tailored debug and trace capabilities. Scales with SoC complexity from embedded design to enterprise class design Protocol debug over any link. Arm provides specs and a reference implementation Debug tools ecosystem standardization. Standardized API enables any compliant debugger to support a SoC-600 based chip without HW probes Debug access security & authentication. SoC-600 coupled with SDC-600 and Security IP offerings provide advanced security Hardware PoC platform & Linux drivers. 16

17 For further information Find demos and more information at the Arm demo area 17

18 Thank You! Danke! Merci! 谢谢! ありがとう! Gracias! Kiitos! 18

19 The Arm trademarks featured in this presentation are registered trademarks or trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. All rights reserved. All other marks featured may be trademarks of their respective owners. 19

Beyond TrustZone Security Enclaves Reed Hinkel Senior Manager Embedded Security Market Develop

Beyond TrustZone Security Enclaves Reed Hinkel Senior Manager Embedded Security Market Develop Part2 Security Enclaves Tech Seminars 2017 Agenda New security technology for IoT Security Enclaves CryptoIsland