+Denotes lead-free and RoHS-compliant.

Transcription

1 9-4067; Rev 0; /08 MAX95 Evaluation Kit General Description The MAX95 evaluation kit (EV kit) is a fully assembled and tested printed-circuit board (PCB) that simplifies the evaluation of the MAX95 400Mbps, 0-bit LVDS serializer and the MAX Mbps, 0-bit LVDS deserializer. The MAX95 serializer transforms 0-bitwide parallel LVCMOS/LVTTL data into a serial highspeed, low-voltage differential signaling (LVDS) data stream. The serializer pairs with a deserializer, the MAX906, which receives the serial output and transforms it back to 0-bit-wide parallel LVCMOS/LVTTL data. The EV kit requires a single.v supply and two reference clock inputs with a 6MHz to 40MHz range to operate. The 0-bit parallel input data is connected to a 4-pin header and the output data is sampled at a separate 4-pin header. The EV kit circuit can be modified to isolate and evaluate the MAX95 and MAX906 independently. DESIGNATION QTY DESCRIPTION C, C, C5, C8 4 C, C4, C6, C7 4 C9 0nF ±0%, 50V X5R ceramic capacitors (060) TDK C608X5RH0K 00nF ±0%, 50V X5R ceramic capacitors (060) TDK C608X5RH04K 0µF ±0%, 6.V X5R ceramic capacitor (0805) TDK C0X5R0J06K FB, FB, FB 470Ω at 00MHz, 000mA ferrite beads (060) Murata BLM8PG47SHB J, J4 x -pin headers *EP = Exposed pad. Features.V Single Supply 0-Bit Parallel LVCMOS/LVTTL Interface Allows Common-Mode Testing Independent Evaluation of Serializer (MAX95) and Deserializer (MAX906) Low-Voltage, Low-Power Operation Fully Assembled and Tested PART MAX95EVKIT+ +Denotes lead-free and RoHS-compliant. Ordering Information TYPE EV Kit Component List DESIGNATION QTY DESCRIPTION J, J 50Ω SMA PC-mount receptacles J5 -pin header JU JU4 4 -pin headers R R4, R7 5 00Ω ± resistors (060) R5, R6 49.9Ω ± resistors (060) TP Test point U 0- b i t LV D S ser i al i zer ( 6- p i n thi n QFN - E P *, m m x m m ) M axi m M AX 95E TE + U 0-bit LVDS deserializer (8-pin SSOP) Maxim MAX906EAI+ 4 Shunts PCB: MAX95 Evaluation Kit+ Evaluates: MAX95/MAX906 Component Suppliers SUPPLIER PHONE WEBSITE Murata Mfg. Co., Ltd TDK Corp Note: Indicate that you are using the MAX95 or MAX906 when contacting these component suppliers. Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim s website at

2 MAX95 Evaluation Kit Evaluates: MAX95/MAX906 Quick Start Recommended Equipment Before beginning, the following equipment is needed:.v DC power supply Two clock generators Data generator for LVCMOS/LVTTL 0-bit parallel signal input Logic analyzer or data-acquisition system or oscilloscope Procedure The MAX95 EV kit is fully assembled and tested. Follow the steps below to verify board operation. Caution: Do not turn on the power supply or enable the clock generators until all connections are completed. ) Verify that all shunts are in their default positions. See Table for default shunt positions. ) Connect the.v power supply to the +.V pad. Connect the ground terminal of this supply to the pad. ) Connect the data generator to 4-pin connector J and set it to generate 0-bit parallel data at LVCMOS/LVTTL levels (high-level input from V to and low-level input from 0.8V to ). See Table for input bit locations. 4) Connect the first clock generator to SMA connector J and set it for an output with a frequency of 6MHz to 40MHz. Use LVCMOS/LVTTL levels. Note that the TCLK SMA connector is terminated with two parallel-connected 00Ω resistors. 5) Connect the second clock generator to SMA connector J and set it for the same frequency as the first clock generator. The frequency tolerance between the two clocks should not be larger than. Note that the REFCLK SMA connector is terminated with two parallel-connected 00Ω resistors. 6) Set the logic analyzer or data-acquisition system for LVCMOS/LVTTL level signal input. 7) Connect the logic analyzer or data-acquisition system or oscilloscope to the signal output 4-pin connector J4. See Table for output bit locations. 8) Turn on the power supply. 9) Enable the first clock generator. 0) Enable the second clock generator. ) Enable the data generator. ) Enable the logic analyzer or data-acquisition system and begin sampling data. Detailed Description The MAX95 EV kit is a fully assembled and tested PCB that simplifies the evaluation of the MAX95 400Mbps, 0-bit LVDS serializer and the MAX Mbps, 0-bit LVDS deserializer. The serializer/deserializer data transfer starts with the serializer initially locking onto the reference clock and then sending the serialized data to the deserializer. A start-bit high and a stop-bit low frame the 0-bit data and function as the embedded clock edge in the serial data stream. The serial rate is the TCLK frequency times the data and appended bits. For example, if TCLK is 40MHz, the serial rate is 40 x (0 + bits) = 480Mbps. Since only 0 bits are from input data, the payload rate is 40 x 0 = 400Mbps. The serializer output pins (OUT+ and OUT-) are held in high impedance when V CC is first applied and while the PLL is locking to the local reference clock. If the serializer goes into high impedance, the deserializer loses PLL lock and needs to reestablish phase lock before data transfer can resume. This is done by transmitting all zeros for at least one frame. The EV kit requires a single.v supply to operate and two reference clock inputs in the 6MHz to 40MHz range. The 0-bit parallel input data can be supplied to 4-pin header J with a data generator running at the same frequency as the reference clock, or the bits can be configured by manually installing shunts across header J pins. The output 0-bit parallel data can be sampled or individually tested at 4-pin header J4. The first reference clock is for the serializer PLL reference. The second reference clock is for the deserializer PLL reference. The tolerance between the two references should not be larger than. They can share a clock signal by a splitter. In real applications, the serializer and deserializer references may connect to a single system clock. Input Signal The MAX95 EV kit accepts 0-bit parallel data at LVCMOS/LVTTL levels (high-level input from V to V CC and low-level input from 0.8V to ). The 0-bit pattern can be supplied to the EV kit by connecting a data generator to 4-pin header J or by connecting selected J pins to a high/low LVCMOS/LVTTL state. See Table for input bit locations on 4-pin header J. Output Signal The MAX95 EV kit outputs 0-bit parallel data at LVCMOS/LVTTL levels on 4-pin header J4. To sample the 0-bit pattern, connect a logic analyzer or dataacquisition system to J4. See Table for the output bit locations on 4-pin header J4.

3 MAX95 Evaluation Kit MAX95 Reference Clock TCLK The MAX95 EV kit allows the MAX95 to accept an input clock from either a data generator/logic analyzer or an input clock from an individual function generator by changing jumper JU. The TCLK input clock is 50Ω terminated on the EV kit by two parallel-connected 00Ω resistors. See Table for TCLK input selections. Table. EV Kit Jumper Settings JUMPER JU JU JU JU4 *Default position. SHUNT POSITION - TCLK connected to a clock applied on J- DESCRIPTION -* TCLK connected to an external clock applied on J -* Deserializer output data on rising edge - Deserializer output data on falling edge -* Deserializer in normal operation - Deserializer in sleep mode, outputs in high-z -* Deserializer parallel outputs enabled Table. Input/Output Bit Locations Jumper Settings The MAX95 EV kit circuit contains four jumpers that allow the user to put the serializer and deserializer into several operational modes. See Table for jumper settings and EV kit operation descriptions. - Deserializer ROUT0 ROUT9 and pins in high-z mode, pin is still working SIGNAL BIT0 BIT BIT BIT BIT4 BIT5 BIT6 BIT7 BIT8 BIT9 Input (J) J- J-4 J-6 J-8 J-0 J- J-4 J-6 J-8 J-0 Output (J4) J4- J4- J4-5 J4-7 J4-9 J4- J4- J4-5 J4-7 J4-9 Evaluates: MAX95/MAX906

4 MAX95 Evaluation Kit J HEADER4 J- J- J- J-4 J-5 J-6 J-7 J-8 J-9 J-0 J- J- J- J-4 J-5 J-6 J-7 J-8 J-9 J-0 J- J- J- J-4 J 6 IN IN IN4 IN5 IN6 IN7 JU 5 4 IN IN0 U MAX95 4 IN8 IN V C8 0nF OUT+ OUT- 8 TCLK R 00Ω R 00Ω C9 0μF C 0nF C 00nF A R5 49.9Ω 0 9 A FB FB FB A TP R6 49.9Ω Evaluates: MAX95/MAX906 C 0nF C4 00nF JU REFCLK A _R/F REFCLK 4 A ROUT0 ROUT ROUT J4- J4- J4-5 J4 HEADER4 J4- J4-4 J4-6 C6 00nF J5 C5 0nF R7 00Ω 5 RI+ 6 RI- JU4 8 REN 9 0 A JU 7 PWRDN A A 4 D U MAX906 ROUT ROUT4 D D D D ROUT5 ROUT6 ROUT7 ROUT8 ROUT C7 00nF J4-7 J4-9 J4- J4- J4-5 J4-7 J4-9 J4- J4- J4-8 J4-0 J4- J4-4 J4-6 J4-8 J4-0 J4- J4-4 J R 00Ω R4 00Ω REFCLK Figure. MAX95 EV Kit Schematic 4

5 MAX95 Evaluation Kit Figure. MAX95 EV Kit Component Placement Guide Component Side Figure. MAX95 EV Kit PCB Layout Component Side Evaluates: MAX95/MAX906 Figure 4. MAX95 EV Kit PCB Layout Solder Side Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 0 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.