A Discussion on Atmel Lock Byte and Firmware Protection Frank Armstrong June 2013

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1 A Discussion on Atmel Lock Byte and Firmware Protection Frank Armstrong June 2013 Definitions JTAG, ISP Joint Test Action Group (JTAG), In-System Programming (ISP) are methods for programming and debugging Atmel microcontrollers. These two methods are a subset of the term serial or parallel programming methods that can be enabled or disabled via the Atmel Lock Byte. The other two methods include High Voltage Serial Programming (HVSP) and Parallel Programming (PP). The terms JTAG and ISP are used inter-changeably with serial or parallel programming methods to refer to all debugging and programming methods simultaneously. If a specific method is required, an additional note stating this fact will appear. Firmware refers to the program code and program data stored in the microcontroller. The firmware is typically generated from higher level source programs (C++, C, ASM), linked, and stored as code and data on the microcontroller. The code and data is persistent until re-programmed either via JTAG or by the microcontroller itself. If the microcontroller code space can be further refined into separate code spaces, the term firmware may be qualified to refer to a specific code package (e.g. application firmware or boot firmware). The word code is sometimes used inter-changeably with the word firmware. Overview With more and more functionality being incorporated into microcontrollers, thereby causing a greater proportion of intellectual property in the microcontroller firmware rather than hardware, protecting access to the microcontroller firmware is critical. This article helps provide additional detailed insight into using the Atmel Lock Byte and firmware protection methods. Shown in Table 1 Atmel Lock Byte Register is an example of an Atmel Lock Byte. Table 1 Atmel Lock Byte Register Lock Byte Internal External Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved Reserved BLB12 BLB11 BLB02 BLB01 LB2 LB1 Note: Not all bits available on all Atmel microcontrollers. Groups of bits are labeled as Internal and External. The External bits allow or inhibit access to serial or parallel programming access (i.e. JTAG, ISP). The Internal bits allow or inhibit access to the LPM and/or SPM 1 instruction within the firmware itself. From a practical standpoint, consider the 1 The (E)LPM and SPM instructions are used for Extended Load Program Memory (ELPM), Load Program Memory (LPM) and Store Program Memory (SPM) respectively. These instructions are used for flash memory, signature

2 External bits as potentially enabling/disabling some of the following external microcontroller accesses: the ability to JTAG debug, the ability to read/program flash and EEPROM memory via JTAG or ISP. The Internal bits potentially protect boot firmware from accidently re-programming boot firmware (overwriting the bootloader) or boot firmware from accidently programming application firmware (in cases where application firmware field upgrades are unnecessary). The purpose of the Atmel Lock Byte is to restrict unwarranted access to the microcontroller firmware. Understanding the Lock Byte and potential firmware protection schemes can help mitigate unauthorized copying. Don t ever believe It won t happen to me. Test Setup A small firmware application was written to help clarify and test the functionality of the Lock Byte. The AVR Dragon is used with an ATmega644 and Atmel Studio 6.1. The USART port was level shifted to RS- 232 allowing the PC to communicate with the ATmega644 via Tera Term. The goal was to experiment with as little hardware as necessary and as small an application as feasible. Low cost and simple. Right out of the box, the ATmega644 is configured as show in Table 2 External - Lock Byte = xff. Having a Lock Byte bit set to 1 is referred to as unprogrammed. Table 2 External - Lock Byte = xff shows the ATmega644 has the Lock Byte unprogrammed as shipped. There are four spaces within the microcontroller code architecture. One space is dedicated to the fuse and lock bytes. A second space is dedicated to the signature and RC oscillator calibration bytes. A third space is reserved for application firmware. A fourth space is reserved for boot firmware. Each of these four spaces is shown in the Section column in Table 2 External - Lock Byte = xff. Access to each of the four spaces is controlled using the SPMCSR register. External Table 2 External - Lock Byte = xff Lock = FF JTAG Section Read Write Fuse Bytes Lock Byte Signature Bytes OSCCAL default Boot byte, fuse and lock byte access. They are not used for EEPROM access. Note that not all instructions are available in all microcontroller architectures.

3 Lock = FF JTAG Section Read Write Application EEPROM Note: Although the JTAG was used, the ISP interface is the same. Table 2 External - Lock Byte = xff shows that unrestricted access to the microcontroller is possible when the Lock Byte is set to FF (unprogrammed) with the JTAG emulator (AVR Dragon). A in the table indicates that the JTAG as able to read or write to the particular microcontroller memory space. Note that regardless of the Lock Byte value, performing a Chip Erase returns the Lock Byte to xff allowing unrestricted JTAG access. JTAG debugging with the Lock Byte set to xff is preferred. The first step is to set the Lock Byte to xfe. Table 3 External - Lock Byte - xfe Lock = FE JTAG Section Read Write Fuse Bytes Lock Byte Signature Bytes OSCCAL default Boot Application EEPROM Table 3 External - Lock Byte - xfe shows that all writing via JTAG to the microcontroller is prohibited except for writing the Lock Byte. However, keep in mind that only programming of the lock bits is possible (i.e. writing them from a 1 to a 0 ). Writing a lock bit from 0 to 1 is not possible until a Chip Erase is performed. Note an observed odd behavior if the microcontroller itself writes the Lock Byte from FF to FE, subsequent reads of the Lock Byte by the microcontroller read FC, which is incorrect. However, after connecting the JTAG, the microcontroller starts to read the Lock Byte as FE indicating that something with the JTAG fixed the reading of the Lock Byte by the microcontroller after connecting the JTAG. Note the intriguing behavior of the Lock Byte in the Table 3 External - Lock Byte - xfe write column. When programmed to xfe, the Lock Byte can still be written even though the other memory cannot be

4 written. However, when the Lock Byte is xfc, the Lock Byte cannot be written. I suspect this is an errata as well. Next, change the Lock Byte to xfd as shown in Table 4 External - Lock Byte - xfd. This Lock Byte setting is undocumented. Setting the Lock Byte to FD has the same odd behavior as above - the microcontroller reads the Lock Byte as FC until the JTAG is connected which then causes the microcontroller to then read the Lock Byte as FD. Table 4 External - Lock Byte - xfd Lock = FD JTAG Section Read Write Fuse Bytes Lock Byte Signature Bytes OSCCAL default Boot Application EEPROM The setting of the Lock Byte to FD appears to behave exactly as having the Lock Byte set to FF. That is, the firmware is readable and writeable via JTAG. The LB2/LB1 bits should never be set to 01. Next change the Lock Byte to xfc. LB2/LB1 = 00. This setting is shown in Table 5 External - Lock Byte - xfc. Table 5 External - Lock Byte - xfc Lock = FC JTAG Section Read Write Fuse Bytes Lock Byte Signature Bytes OSCCAL default Boot Application EEPROM

5 With the Lock Byte set to xfc, only the Fuses, Lock Byte and Signature bytes can be read. This setting prevents JTAG access to the firmware and EEPROM. Note that further changes to the Lock Byte are also disabled (i.e. trying to change FC to CC is prohibited). The only recovery mechanism to gain JTAG access to the microcontroller is to perform a Chip Erase. Note that Chip Erase is only available in serial or parallel programming (i.e. the microcontroller cannot change LB2/LB1 to allow JTAG access). Setting the Lock Byte to FC provides firmware access security via serial or parallel programming. Internal Next, explore the Internal bit settings. First, return the Lock Byte to xff as shown in Table 6 Internal - Lock Byte = xff. Table 6 Internal - Lock Byte = xff Lock = FF Code Location Boot Section (@0x7100/0xE200) Application Section (@0x2000/0x4000) Section/Instruction LPM SPM LPM SPM Fuse Bytes (See Note B) Lock Byte Signature Bytes OSCCAL default Boot Application In Table 6 Internal - Lock Byte = xff, a indicates that the instruction is valid when the instruction is located in the code location shown in the table. For example, the in the row labeled Application intersecting with the column Boot Section/LPM, indicates that putting a LPM instruction within the boot section allows code in the boot section to read from the code application section. Note that the boot section size can change via BOOTSZ but the values (/) in the table remain identical. In Table 6 Internal - Lock Byte = xff, a indicates that the instruction is invalid when the instruction is located in the code location shown in the table. Note that the Application Section/SPM column is filled with. This indicates that an SPM instruction located within the code application section never works. This fact is also indicated on the particular microcontroller datasheet (e.g. doc2593 section ). Table 7 BOOTSZ Configurations show the SPM instruction placement to become part of the code application section when the BOOTSZ changes. For example, if BOOTSZ were 512 words, then an SPM

6 instruction at a location less than 0x7E00 would not work since it is now in the application section 2. Refer to the particular microcontroller datasheet for any variations on a particular microcontroller. Table 7 BOOTSZ Configurations BOOTSZ Application Section Ends (words/bytes) 4096 words 0x7000 / 0xE words 0x7B00 / 0xF words 0x7C00 / 0xF words 0x7E00 / 0xFC00 Note A: Fundamentally, the firmware should be able to access constant data, tables and arrays located within the same code section space. To allow for this behavior, the two table locations as shown by See Note A should always be in all Lock Byte configurations. That is to say, code written in the boot section can always read constant data stored in the boot section. Likewise, any code written in the application section can always read constant data in the application section. Note B: Attempting to write the Fuse Bytes has detrimental side effects. Not recommended. The Lock Byte can ALWAYS be programmed (changing any lock bit from 1 to 0 but not conversely) independent of any current Lock Byte setting (except for LB2/LB1 = 00). This means you can provide a failsafe mechanism in the firmware to lock the External access to the firmware when the microcontroller starts running. Typically, the Lock Byte LB2/LB1 bits are programmed after programming the device via JTAG or ISP. However, at boot time, the firmware can also program these bits to 0 as a failsafe mechanism. Just make sure the code is located in the boot section (Refer to Table 7 BOOTSZ Configurations). Special consideration is necessary when programming the Lock Byte via serial or parallel programming that is, program the BLB bits first because when the LB bits are programmed to 0, the serial or parallel programming no longer works. The Lock Byte can only be programmed from code in the boot section because that is the only location that allows an SPM instruction. Note that once the lock bits are programmed (set to 0 ), there is no way to return them to 1 without a chip erase. Examine what happens when you change only the BLB02/BLB01 bits in the Lock Byte. Table 8 Internal - Lock Byte = xf7 Lock = F7 Code Location 2 The boot section code placed at 0x7100 was left intact and the BOOTSZ was changed to 2048 words. Using the SPM instruction to change program memory failed to work since the code was now in application space.

7 Boot Section Application Section Section/Instruction LPM SPM LPM SPM Fuse Bytes (See Note B) Lock Byte Signature Bytes OSCCAL default Boot Application (See Note C) As you can see, you cannot read the application code section from code located in the boot section. One possible use for this setting would be to conceal application code access from a debug monitor program running in boot code (also consider the fact that running the debug monitor in the application section would allow the application code to be revealed). Note C: This is an area where caution needs to be observed. You can change code in the application section from the boot section by using the SPM instruction, but note that you cannot verify what was changed because you are prohibited from reading the data back while in the boot section using the LPM instruction. If you allow read access from the application section, note that the application section code can now be read while in the application section code. Examine the next change to the BLB02/BLB01 bits. Table 9 Internal - Lock Byte = xfb Lock = FB Code Location Boot Section (@0x7100/0xE200) Application Section (@0x2000/0x4000) Section/Instruction LPM SPM LPM SPM Fuse Bytes (See Note B) Lock Byte Signature Bytes OSCCAL default Boot (See Note D) Application

8 Note D: This appears to be an undocumented feature. You can erase the memory using SPM but you cannot program the memory. More than likely overlooked because in most circumstances there is no need to remove all programming ability in the microcontroller. In Table 9 Internal - Lock Byte = xfb, the SPM instruction cannot be used in the boot section for programming either the boot section code or the application section code. This Lock Byte setting has disabled any code updates within the microcontroller itself thereby causing the microcontroller firmware to be a static object only updateable via serial or parallel programming. Examine the next change to the BLB02/BLB01 bits. Table 10 Internal - Lock Byte = xf3 Lock = F3 Code Location Boot Section (@0x7100/0xE200) Application Section (@0x2000/0x4000) Section/Instruction LPM SPM LPM SPM Fuse Bytes (See Note B) Lock Byte Signature Bytes OSCCAL default Boot (See Note D) Application In Table 10 Internal - Lock Byte = xf3, the SPM instruction cannot be used in the boot section for programming either the boot section code or the application section code. Additionally, the boot section cannot read the application section. Note that the Lock Byte setting for xf3 is the combination of the results for the settings xf7 and xfb. Next, change the BLB12/BLB11 bits. Table 11 Internal - Lock Byte = xef Lock = EF Code Location Boot Section (@0x7100/0xE200) Application Section (@0x2000/0x4000) Section/Instruction LPM SPM LPM SPM Fuse Bytes (See Note B) Lock Byte Signature Bytes

9 Lock = EF Code Location Boot Section (@0x7100/0xE200) Application Section (@0x2000/0x4000) Section/Instruction LPM SPM LPM SPM OSCCAL default Boot Application Table 11 Internal - Lock Byte = xef is prohibiting the SPM instruction from changing code in the boot section. This setting is useful for preventing a boot loader code object from modifying itself. For example, this setting can be used to protect the boot loader code from accidental erasure by the bootloader program itself. The only way to change the bootloader is via serial or parallel programming (i.e. JTAG or ISP). Next, change the BLB12/BLB11 bits. Table 12 Internal - Lock Byte = xdf Lock = DF Code Location Boot Section (@0x7100/0xE200) Application Section (@0x2000/0x4000) Section/Instruction LPM SPM LPM SPM Fuse Bytes (See Note B) Lock Byte Signature Bytes OSCCAL default Boot Application Table 12 Internal - Lock Byte = xdf prevents the application code from reading the boot section code. This setting is useful if the application code contains a debug monitor allowing flash memory to be dumped. This would prevent this debug monitor from accessing the code from the boot section. Note that this protection level allows for security key storage. Next, change the BLB12/BLB11 bits.

10 Table 13 Internal - Lock Byte = xcf Lock = CF Code Location Boot Section (@0x7100/0xE200) Application Section (@0x2000/0x4000) Section/Instruction LPM SPM LPM SPM Fuse Bytes (See Note B) Lock Byte Signature Bytes OSCCAL default Boot Application Table 13 Internal - Lock Byte = xcf prevents the boot section from changing itself and prevents the application section from accessing the boot section. This setting is ideal for protecting bootloader code from being accidently erased as well as for allowing storage of security keys in the boot section. Lock Byte Conclusion Multiple microcontroller firmware source locations must be considered when trying to protect access to microcontroller firmware. The firmware sources are: application firmware source on the microcontroller, boot firmware source on the microcontroller, field upgrade files containing firmware sources and serial or parallel programming access to firmware. Protecting only one source is not sufficient. All four sources must be protected, otherwise the firmware is vulnerable to being copied. The simplest case is fully static firmware contained in the microcontroller with no field upgrades possible. Programming the Lock Byte to xfc (LB2/LB1 = 00) secures the firmware in this situation and allows complete firmware access to both the boot and application code sections within the firmware. The firmware can only be changed via a serial or parallel programmer after a Chip Erase is performed. Be wary of any application code that would allow the microcontroller firmware to be accessed (dumped) via a microcontroller port (i.e. serial). In most circumstances, a small bootloader is contained in the boot section which checks the integrity of the application code (in the application section) before running the application as well as deciding which application to execute. The bootloader also allows field upgrades of the application code but not of the bootloader itself. The Lock Byte setting should be xcc. This setting prevents any serial or parallel programming access (LB2/LB1 = 00), prevents the bootloader from overwriting itself and prevents application code from reading bootloader code (BLB12/BLB11 = 00) and allows the bootloader complete access to the application code. The remaining issue is protecting the field upgradeable file which is discussed in the next section.

11 Code Protection Models Six firmware code protection models are described in increasing level of complexity. 1. Having no code protection (LB2/LB1 = 11) is definitely the easiest approach. However, if your microcontroller hardware is minimal, a competitor can easily lower overall product costs by eliminating the costs associated with developing the microcontroller firmware. 2. Setting the Lock Byte bits LB2/LB1 to 0 when programming the microcontroller firmware would be the next easiest approach. However, if the code is field upgradeable, a copy of the assembly language code is available with the field upgradeable hex/binary file. Also, forgetting to program the LB2/LB1 bits in production when initially programming the microcontroller exposes the microcontroller firmware inadvertently. 3. Using approach 2 and programming LB2/LB1 at boot time as a failsafe mechanism provides protection against inadvertently forgetting to program the LB2/LB1 bits. 4. Using approach 3 and setting BLB12/BLB11 = 00 and BLB02/BLB01 = 11, resulting in the Lock Byte = xcc provides further protection because the boot section cannot read itself (for extraction) and the boot section cannot be read by the application section (the bootloader monitor and keys usually resides in the bootloader). This step is only available on microcontrollers with BLB bits. 5. Using approach 4 and adding source level encryption to the upgradeable hex/binary file keeps the field upgradeable hex/binary file secure. The remaining issue is not exposing the decryption key along with the field upgradeable hex/binary file. 6. Using approach 5 and adding key management procedures. Up to model 5, the field upgradeable hex file (or binary) is not encrypted allowing complete access to the product firmware if an upgrade file is given to the customer. Using model 5 or greater provides greater security of the developed firmware. Code Protection Conclusion The recommendation is to use model 3 at a minimum at all times. If the LB2/LB1 bits are not programmed (that is, not set to 0) as in model 1, then the firmware is wide open and there is no benefit of doing any additional work protecting the firmware. Don t be surprised when you see copies. The preferred method is model 5. Using different key management techniques may become over burdensome depending on the product but many options exist in model 6 and key management can be kept to a minimum. Code Protection Model What follows is additional discourse describing a possible code protection system as in model 6.

12 KeyB KeyB 21 June 2013 Example Code Protection Model Computer Program Boot Section Code KeyA KeyA Program Application Hex file Encryption Encrypted file Decryption Can be made part of Atmel Studio Build Process Bootloader Figure 1 Code Protection Model Example Referring to Figure 1 Code Protection Model Example, the resulting key from combining KeyA and KeyB must be used for encryption and decryption. Several combinations of using keys exist. 1. Only KeyB can be used. This allows a single key to be used. KeyB can be stored in the computer program that generates the encrypted binary file and likewise, in the microcontroller boot code. This approach minimizes key management because the computer program generating the encrypted file must be matched to the bootloader with the same key. Having one key allows for one computer program and one bootloader. 2. KeyA and KeyB can be used. A single KeyA can be used on all products or alternatively, a different KeyA can be used for different customers and/or different applications preventing the wrong application from reaching an incorrect product. This may be useful if the product has differing levels of features dependent on firmware version. Key management is critical in this case. Care must be taken when encrypting the source file. Any a priori knowledge of the format or values contained in the final encrypted file could lead to less security. Developing a unique encrypted file format improves security. Additionally, relocating code segments from known locations in the encrypted file improves security (i.e. address 0 is typically a jump instruction which could be used in helping to decrypt the file ). Many other obfuscation techniques exist for the formatting of the encrypted file to improve security.

13 The encryption/decryption process must be symmetrical and use the same algorithm (e.g. 3DES, AES). The decryption algorithm must be of a small enough size to fit in the bootloader. Refer to doc2541 and doc2589 for additional information. Note that the application section can have N applications as shown in Figure 2 Application Section Configuration. Each application section can consist of M pages in flash memory where M is the smallest divisible unit of erasable and programmable flash memory. If the microcontroller has no boot section, the application section may consist of two application sections: the application itself and a bootloader. In a typical example where a boot section exists in the microcontroller, the bootloader would reside in the boot section and the application section would be split into multiple application sections where one application section contains a previous working application, another application section contains an updated application and a third application section contains a mechanism for reading and possibly verifying application memory integrity. Bootloaders often verify the integrity of the application before execution. Depending on the programming of the BLB bits, the bootloader may not be able to read application memory from the boot section. In this case, the bootloader can call application N i which allows for application integrity verification. Application Section Containing One or More Applications App N 0 M 0 Pages Application Section App N 1 M 1 Pages App N i M j Pages Figure 2 Application Section Configuration Consider the schemes for getting the key file (KeyA) into the bootloader for decryption. Entering the key prior to decryption can be done via a bootloader command either programmatically or via a terminal. If the bootloader command is exposed to the user via a terminal, the user may have unrestricted access

14 to the key (or be required to manually enter the KeyA). That same user would then be able to decrypt the binary file outside the bootloader given that the user knows the decryption algorithm. Therefore, the embedding of KeyB in the microcontroller and the computer program is critical. Securing KeyB is also critical. Note that by preventing the bootloader from updating itself, the only way to change KeyB is by re-programming the bootloader via serial or parallel programming (i.e. JTAG). Code Protection Model Conclusion The amount of firmware security should be an intentional product decision rather than just ignored. Intellectual property theft is becoming a growing concern. A spectrum of code protection models were discussed allowing the developer to choose an appropriate code protection model. Bootloader Monitor Code This section briefly describes the bootloader monitor program written for testing the Lock Byte configurations. The bootloader monitor code was kept to a minimum This is a short description of the commands used in the small application for testing different values of the Lock Byte. Serial Commands F Used to read/write/erase flash memory E Used to read/write EEPROM memory R Used to reads/write RAM memory I Used to read/write SRAM memory L Used to read/write fuse and/or lock bytes S Used to read signature bytes W Used to switch between locating LPM and SPM instructions in boot or application area Faaaa[x p <cr> dd[p <cr>] All commands follow the same structure (except for W). First is one letter to indicate the command (F, E, R, I, L or S). Next is an address. For the flash the address can be between 0 and FFFF. For the Ram, the address has to be between 100 and 10FF. The other commands have similar constraints. For the command W, Wa sets to application space, Wb sets to boot space. Next, if you just enter <cr>, then it prints the data at that address. If you enter <x>, it erases the entire page of data that the address is on. If you enter p, then it prints the whole page of data that the address is on. If you enter <space>, then it waits for data that will ultimately be written. If you enter p after the data, then the page is written with that same data. Baud rate hard-coded for 9600 baud. Tera term set to local echo. Tera Term set to new-line receive/transmit CR only.

15 Below is a screen shot showing some example commands. F0p dumps one page of flash memory starting at address 0. S dumps the signature space. Note that location 1 is the RC oscillator calibration byte. L dumps the fuse and lock bytes. The lock byte is at location 1. Fe200p dumps one page of flash memory starting at byte address xe200. E0 44 programs EEPROM address 0 with x44. E0p dumps one page of EEPROM memory starting at address 0. Note that the page size for the EEPROM was made identical to the page size for flash memory. Similarly for the RAM. Figure 3 Example trace dump

16 References Doc2593.pdf 8-bit Atmel Microcontroller with 64K Bytes In-System Programmable Flash Atmega644/V Doc2541.pdf AVR230: DES Bootloader Doc2589.pdf AVR231: AES Bootloader

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