AN1869 APPLICATION NOTE

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1 AN1869 APPLICATION NOTE UNDERSTANDING THE ST92x185 AND ST92x195 MEMORY MAP 1 INTRODUCTION The aim of this application note is to describe the representation of the memory map of ST92x185 and ST92x195 family devices and more specifically how the memory is allocated. 2 MEMORY MAP REPRESENTATION All ST92x185 and ST92x195 embedded memories (RAM, ROM, TDSRAM) are allocated starting from their respective start address, and then incrementing the address pointer. This does not concern user and/or system stacks mapped in RAM which are actually allocated starting from the stack start address, and then decrementing the address pointer down to a defined limit. Stack size and start addresses are set in the CRT9.asm file via labels defined in the script (.scr) file. IMPORTANT: The following MUST be taken into account when allocating memory space: EPROM and ROM are always mapped UPWARDS from the BOTTOM of segment 00h, RAM is always mapped DOWNWARDS from the TOP of segment 20h, TDSRAM is always mapped UPWARDS from the BOTTOM of address in segment 22h. Figure 1. Allocation of the Various Types of Internal Memory 84 Kbytes 256 Bytes 8Kbytes 48 Kbytes h 512 Bytes 6Kbytes 32 Kbytes 1 KByte 2Kbytes ROM/EPROM RAM TDSRAM AN1869/0704 Rev. 2 1/14

2 The following table describes the memory size available for each of the ST92x185 and ST92x195 devices. For more details, please refer to Table 2, Origin and Length Parameter Values for EPROM/ROM and Internal RAM, on page 10. Table 1. Internal Memory Map Device Type Salestype Family ROM or EPROM size available (Kbytes) RAM size availables (bytes) TDSRAM size availables (Kbytes) EPROM ST92T195 B ST92T195 D ROM (TXT) ST92195 B 32, 48, 56, , 6, 8 ST92195 C 32, 48, 56, 64, 84, , 6, 8 ST92195 D 32, 48, 56, , 6, 8 ROM (No TXT) ST92185 B 24, ST92185 D 24, ROMLESS ST92R195 B - 1K 8 ST92R195 C - 2.5K ST92E195 & ST92T195 - EPROM AND OTP DEVICES MEMORY MAP ST92E195 and ST92T195 microcontrollers are full-set devices. This means that all peripherals offered for ST92185 and ST92195 families are available for the ST92E195 and ST92T195 devices and the memory consists of a RAM and an EPROM. 2/14

3 Figure 2. ST92E195 & ST92T195 Memory Map 8 Kbytes TDSRAM 229FFFh SEGMENT 22h 22FFFFh 22C000h 22BFFFh 227FFFh h 223FFFh h 21FFFFh PAGE Kbytes PAGE Kbytes PAGE Kbytes PAGE Kbytes SEGMENT 21h Internal RAM 512 bytes 20FE00h SEGMENT 20h h 20C000h 20BFFFh h 207FFFh h 203FFFh h PAGE Kbytes PAGE Kbytes PAGE Kbytes PAGE Kbytes SEGMENT 1 Max. 84 Kbytes 01FFFFh 01C000h 01BFFFh h 014FFFh PAGE 7-16 Kbytes PAGE 6-16 Kbytes PAGE 5-16 Kbytes SEGMENT 0 Min. Internal EPROM h 00FFFFh 00C000h 00BFFFh h 007FFFh h 003FFFh h PAGE 4-16 Kbytes PAGE 3-16 Kbytes PAGE 2-16 Kbytes PAGE 1-16 Kbytes PAGE 0-16 Kbytes 3/14

4 2.2 ST92195 & ST ROM DEVICES MEMORY MAP The memory size of ST92185 and ST92195 microcontrollers depends on the customer choice. Figure 3. ST92195 Memory Map Max. 8 Kbytes TDSRAM Min. 2 Kbytes 229FFFh h 2287FFh SEGMENT 22h 22FFFFh 22C000h 22BFFFh 227FFFh h 223FFFh h 21FFFFh PAGE Kbytes PAGE Kbytes PAGE Kbytes PAGE Kbytes SEGMENT 21h Internal RAM Min. 256 bytes Max. 512 bytes 20FF00h 20FE00h SEGMENT 20h h 20C000h 20BFFFh h 207FFFh h 203FFFh h PAGE Kbytes PAGE Kbytes PAGE Kbytes PAGE Kbytes SEGMENT 1 SEGMENT 0 Max. 96 Kbytes Min. 32 Kbytes Internal ROM 01FFFFh 01C000h 01BFFFh h 017FFFh h 013FFFh h 00FFFFh 00C000h 00BFFFh h 007FFFh h 003FFFh h PAGE 7-16 Kbytes PAGE 6-16 Kbytes PAGE 5-16 Kbytes PAGE 4-16 Kbytes PAGE 3-16 Kbytes PAGE 2-16 Kbytes PAGE 1-16 Kbytes PAGE 0-16 Kbytes The major difference between ST92195 and ST92185 families is that the ST92185 family does not possess any Teletext features (i.e. is not equipped with a Slicer, Multi-Byte Transfer functions, etc...). 4/14

5 Figure 4. ST92185 Memory Map 2 Kbytes TDSRAM 2287FFh SEGMENT 22h 22FFFFh 22C000h 22BFFFh 227FFFh h 223FFFh h 21FFFFh PAGE Kbytes PAGE Kbytes PAGE Kbytes PAGE Kbytes SEGMENT 21h Internal RAM 256 bytes 20FF00h SEGMENT 20h h 20C000h 20BFFFh h 207FFFh h 203FFFh h PAGE Kbytes PAGE Kbytes PAGE Kbytes PAGE Kbytes SEGMENT 0 Max. 32 Kbytes Min. 24 Kbytes 00FFFFh 00C000h 00BFFFh h 007FFFh 005FFFh PAGE 3-16 Kbytes PAGE 2-16 Kbytes PAGE 1-16 Kbytes Internal ROM h PAGE 0-16 Kbytes 2.3 ST92R195 - ROMLESS MEMORY MAP Devices in this family do not possess any internal ROM memory. The User can connect up to 4 Mbytes as external memory (ROM and RAM). In the example given in Figure 5., the ST92R915 device is connected to 1 x of external ROM and 2 x 512 Kbytes of external RAM. 5/14

6 Figure 5. ST92R195 Memory Map 3FFFFFh SEGMENTS 3F,3E,3D,3C,3B,3A,39,38h External RAM 512 Kbytes h 37FFFFh SEGMENTS 37,36,35,34,33,32,31,30h External RAM 512 Kbytes 8 Kbytes TDSRAM 229FFFh SEGMENT 22h h 22FFFFh 22C000h 22BFFFh 227FFFh h 223FFFh h 21FFFFh PAGE Kbytes PAGE Kbytes PAGE Kbytes PAGE Kbytes SEGMENT 21h Internal RAM Min. 1 Kbytes Max. 2.5 Kbytes 20FC00h 20F600h SEGMENT 20h h 20C000h 20BFFFh h 207FFFh h 203FFFh h PAGE Kbytes PAGE Kbytes PAGE Kbytes PAGE Kbytes SEGMENT 0 External ROM 00FFFFh 00C000h 00BFFFh h 007FFFh h 003FFFh h PAGE 3-16 Kbytes PAGE 2-16 Kbytes PAGE 1-16 Kbytes PAGE 0-16 Kbytes 6/14

7 3 SCRIPT FILE AN APPLICATION NOTE In this section, we give an example of the script file (extension.scr ) used by the C Compiler. This file explains to the C Compiler how to link the software (variables, constants, functions, etc.) to the hardware (ROM, RAM, TDSRAM, etc.). 3.1 SCRIPT FILE DESCRIPTION Script File Example OUTPUT(<your_application>.u) MEMORY { rom : ORIGIN = 0x000000, LENGTH = 32K, MMU = DPR0 NO ram: ORIGIN = 0x20FF00, LENGTH = 256, MMU = DPR3 tdsram0: ORIGIN = 0x228000, LENGTH = 1K, MMU = DPR2 tdsram1: ORIGIN = 0x228400, LENGTH = 1K, MMU = DPR2 tdsram2: ORIGIN = 0x228800, LENGTH = 1K, MMU = DPR2 tdsram3: ORIGIN = 0x228C00, LENGTH = 1K, MMU = DPR2 tdsram4: ORIGIN = 0x229000, LENGTH = 1K, MMU = DPR2 tdsram5: ORIGIN = 0x229400, LENGTH = 1K, MMU = DPR2 tdsram6: ORIGIN = 0x229800, LENGTH = 1K, MMU = DPR2 tdsram7: ORIGIN = 0x229C00, LENGTH = 1K, MMU = DPR2 } SECTIONS {.text: { text_start =.; crt9.o(.text) _start_constants =.; constant.o(.data) _end_constants =.; *(.text) _etext =.; DO_OPTION_I; _text_end =.; } > rom tdsram0.bk9: { txt_dec0.o(.bss) } > tdsram0 tdsram1.bk9: { txt_dec1.o(.bss) } > tdsram1 tdsram2.bk9: { txt_dec2.o(.bss) } > tdsram2 tdsram3.bk9: { txt_dec3.o(.bss) } > tdsram3 tdsram4.bk9: { 7/14

8 txt_dec4.o(.bss) } > tdsram4 tdsram5.bk9: { txt_dec5.o(.bss) } > tdsram5 tdsram6.bk9: { txt_dec6.o(.bss) } > tdsram6 tdsram7.bk9: { txt_dec7.o(.bss) } > tdsram7 data: { _data_start =.; *(.data) _edata =.; _data_end =.; } > rom bss: { _bss_start =.; *(.bss COMMON) _ebss =.; _bss_end =. ; } > ram /* Stacks labels definition */ _stack_size = DEFINED(_stack_size)? _stack_size: 0x1E; _user_stack_size = DEFINED(_user_stack_size)? _user_stack_size: 0x80; _stack_start = DEFINED( _stack_start)? _stack_start: 0xB0; _stack_end = _stack_start + _stack_size; _user_stack_start = DEFINED(_user_stack_start)? _user_stack_start : 0xFFFF; _user_stack_end = _user_stack_start + _user_stack_size; } 8/14

9 3.1.2 Notes on setting Stack Memory The following labels are defined in the script file and are used in CRT9.asm file to set the various stack memory areas: _stack_size, _user_stack_size, _stack_start, _stack_end, _user_stack_start, _user_stack_end In the example given in section on page 7: ROM is located in segment 00h starting from address h (DPR0) up to address 007FFFh (32 Kbytes). rom : ORIGIN = 0x000000, LENGTH = 32K, MMU = DPR0 NO RAM is located in segment 20h starting from address 20FF00h (DPR3) up to address (256 bytes). ram : ORIGIN = 0x20FF00, LENGTH = 256, MMU = DPR3 The User stack is located in RAM, starting from address in segment 20 (DPR3) down to address 20FF80h (80h). The System stack is located in the Register File, starting from register B0h down to register 93h (1Eh). TDSRAM is located in segment 22h starting from address (DPR2) up to address 229FFFh (8 Kbytes). disarm: ORIGIN = 0x228000, LENGTH = 8K, MMU = DPR ORIGIN & LENGTH Parameters for the Script File Depending on the application being developed, the User will have to correctly set the following parameters in the script file: ROM ORIGIN, ROM LENGTH, RAM ORIGIN, RAM LENGTH, TDSRAMx ORIGIN, TDSRAMx LENGTH. In the example given in section on page 7, TDSRAM memory has been divided into several memory blocks (1 block per page). This is done in order to take into account the software for the Teletext functions. All the salestypes with their associated Origin and Length parameter values for EPROM/ROM and internal RAM are listed in Table 2. TDSRAM Origin and Length parameter values are not included in this table as TDSRAM is always mapped starting from address. 9/14

10 Table 2. Origin and Length Parameter Values for EPROM/ROM and Internal RAM Size Device ROM RAM TDSRAM Script File Parameters Values ROM or EPROM Internal RAM Origin Length Origin Length ST92185B2 24K 256 2K 0x K 0x20FF ST92185B3 32K 256 2K 0x K 0x20FF ST92195B1 32K 256 2K 0x K 0x20FF ST92195B2 32K 256 6K 0x K 0x20FF ST92195B3 32K 256 6K 0x k 0x20FF ST92195B4 48K 256 6K 0x K 0x20FF ST92195B5 48K 256 8K 0x K 0x20FF ST92195B6 56K 256 8K 0x k 0x20FF ST92195B7 64K 256 8K 0x K 0x20FF ST921T95B7 64K 256 8K 0x K 0x20FF ST92R195B9-1K 8K 0x Depends on external ROM size 0x20FC00 ST92195C3 48K 256 2K 0x K 0x20FF ST92195C4 48K 512 6K 0x K 0x20FE ST92195C5 48K 512 8K 0x K 0x20FE ST92195C6 56K 512 8K 0x K 0x20FE ST92195C7 64K 512 8K 0x K 0x20FE ST92195C8 84K 512 8K 0x K 0x20FE ST92195C9 96K 512 8K 0x K 0x20FE ST921R95C9-2.5K 8K 0x Depends on external ROM size 1K 0x20F K ST92195D5 48K 512 8K 0x K 0x20FE ST92195D6 56K 512 8K 0x K 0x20FE ST92195D7 64K 512 8K 0x K 0x20FE ST92T195D7 64K 512 8K 0x K 0x20FE /14

11 3.2 ROMLESS WITH EXTERNAL RAM For ROMLESS devices connected to an external RAM, the user has to declare the address of the external RAM block in the script file (e.g. 1 new line added for the 64K external RAM block). Using the same example as in section 2.3 on page 5: MEMORY { roam: ORIGIN = 0x000000, LENGTH = 64K, MMU = DPR0 NO NO NO ram: ORIGIN = 0x20FC00, LENGTH = 1K, MMU = DPR3 /* internal */ xram0: ORIGIN = 0x300000, LENGTH = 64K, MMU = DPR1 /* external */ xram1: ORIGIN = 0x310000, LENGTH = 64K, MMU = DPR1 /* external */... xram14: ORIGIN = 0x3E0000, LENGTH = 64K, MMU = DPR1 /* external */ xram15: ORIGIN = 0x3F0000, LENGTH = 64K, MMU = DPR1 /* external */ tdsram0: ORIGIN = 0x228000, LENGTH = 1K, MMU = DPR2 tdsram1: ORIGIN = 0x228400, LENGTH = 1K, MMU = DPR2... tdsram7: ORIGIN = 0x229C00, LENGTH = 1K, MMU = DPR2 } In this example: External ROM is located in segment 00h starting from address h (DPR0) up to address 00FFFFh (size 64Kbytes). rom : ORIGIN = 0x000000, LENGTH = 64K, MMU = DPR0 NO NO NO Internal RAM is located in segment 20h starting from address 20FC00h (DPR3) up to address (1 Kbyte). ram : ORIGIN = 0x20FC00, LENGTH = 1K, MMU = DPR3 External RAM is located in segment 30h starting from address h (DPR1) up to address 3FFFFFh (1 Mbyte). This is done by adding 16 new lines (16x64K=1Mbytes). xram0 : ORIGIN = 0x300000, LENGTH = 64K, MMU = DPR1 (line 0) xramxx :... (lines 1 to 14) xram15 : ORIGIN = 0x3F0000, LENGTH = 64K, MMU = DPR1 (line 15) Internal TDSRAM is located in segment 22h starting from address (DPR2) up to address 229FFFh (8 Kbyte). ram : ORIGIN = 0x228000, LENGTH = 8K, MMU = DPR2 11/14

12 3.3 VERIFICATION OF THE MEMORY MAPPING USING EMULATOR In order to verify that the memory is correctly mapped in the right location in the script file, you have to test your program on the Emulator Board. Emulator Boards are configured using a file named Harware.gdb. In this file, the user must describe the targeted memory size and location. ORIGIN and LENGTH parameter values must be the same as in the script file. Refer to Table 2, Origin and Length Parameter Values for EPROM/ROM and Internal RAM, on page 10. This procedure is used to detect any errors in the script file. An example of Hardware.gdb file (for the HDS2V2 Emulator) is: #This is for HDS2V2 emulator reset_map map ORIGIN=0x LENGTH=64K TYPE=SR map ORIGIN=0x20fe00 END=0x20ffff TYPE=SW map ORIGIN=0x LENGTH=8192 TYPE=IW ROM is located in segment 00h starting from address h up to address 00FFFFh (size 64Kbytes). rom : ORIGIN = 0x000000, LENGTH = 64K TYPE=SR RAM is located in segment 20h starting from address 20FE00h up to address (512 bytes). ram : ORIGIN = 0x20FE00, END= 0x20FFFF TYPE=SW but you could have written (identical as previous line) ram : ORIGIN = 0x20FE00, LENGTH = 512 TYPE=SW TDSRAM is located in segment 22h starting from address up to address 229FFFh (8 Kbytes). ram : ORIGIN = 0x228000, LENGTH = 8192 TYPE=IW The TYPE parameter used in the hardware.gdb file is composed of 2 letters: 1st letter: S for Sytem; Memory is located inside the emulator (emulator internal memory) U for User; Memory is located on the user board or TV chassis (example: ST92R195/ ROMLESS external memory) I for Internal; Memory is located inside the ST92x195 or ST92x185 (Microcontroller internal memory) 2nd letter: R for Read memory (example: ROM, EPROM,...) W for Read & Write memory (example: RAM, TDSRAM,...) Refer to the Emulator User Manual for more details about the Hardware.gdb file. 12/14

13 4 REVISION HISTORY Table 3. Revision History Date Revision Description of Changes July First Issue 21-July Stylesheet update. No content change. 13/14

14 The present note which is for guidance only, aims at providing customers with information regarding their products in order for them to save time. As a result, STMicroelectronics shall not be held liable for any direct, indirect or consequential damages with respect to any claims arising from the content of such a note and/or the use made by customers of the information contained herein in connection with their products. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 14/14

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