SH69P55A EVB. Application Note for SH69P55A EVB SH69P55A EVB SH69V55A

Transcription

1 Application Note for SH69P55A EVB SH69P55A EVB The SH69P55A EVB is used to evaluate the SH69P55A chip's function for the development of application program. It contains of a SH69V55A chip to evaluate the functions of SH69P55A including the ADC input and the PWM output, including LCD 4x20 (LED 6x8) driver. The following figure shows the placement diagram of SH69P55A EVB. J1 VCC J2 GND JP1 5V 3V EXT JP2 IDD TEST J4 1 ON S2 ON S1 J3 POWER STOP HALT LVR ADC PWM J6 1 ROMH U2 74HC273 U1 SH69V55A 1 ROML U3 74HC273 Stand Alone With ICE JP3 Y1 C1 C2 EX_RC JP4 PC0 PC1 PC2 PC3 J5 1 JP6 SW1 RESET 0 R8 Ver 0.1 1/14 1

2 There are two configurations of SH69P55A EVB in application development: ICE mode and stand-alone mode. In the ICE mode, the ICE (motherboard) is connected to the SH69P55A EVB by the ICE interface. SH69P55A EVB USB port Application Board Evaluation Board USB RICE Power PC Application Board Evaluation Board RICE66 Emulator LPT port Power PC (a) ICE mode In standalone mode, the SH69P55A EVB is no longer connected to the motherboard, but the Flash (or EPROM) must be inserted to the socket that stored the application program. DC 5V Application Board Evaluation board (b) Stand-alone mode Ver 0.1 2/12

3 The process of your program s evaluation on SH69P55A EVB User can use Sino Wealth Rice66 Integrated Development Environment (IDE) to emulate the program and produce the obj file. Rice66 IDE is a real-time in-circuit emulator program. It provides real-time and transparent emulation support for the SH6X series 4-bit microcontroller. And integrate assembler can create binary (*.obj) file and the other files. Use Flash (or EPROM) In standalone mode Rice66 IDE is built-in with an object file depart function. The command Split object file can separate the one 16 bits object file into two 8 bits files, which contain the high and low bytes respectively. Write the high/low byte obj file to Flash (or EPROM) and insert them to EVB (ROMH and ROML). Then, user can evaluate the program in standalone mode. Ver 0.1 3/12

4 SH69P55A interface connector: IO/LCD port interface: J6 (TOP View from EVB) SH69P55A EVB PG3 PK0 PK1 PJ0 PJ1 PJ2 PJ3 PC0 PC1 PC2 PC3 GND EXT VDD SEG1/PA0 SEG2/PA1 SEG4/PA2 SEG4/PA3 SEG5/PF0 SEG6/PF1 SEG7/PF2 SEG8/PF3 SEG9/PI0 1 PG2 PG1 PG0 PB3 PB2 PB1 PB0 PD3COM1 PD2/COM2 PD1/COM3 PD0/COM4 PE3/SEG20/COM5 PE2/SEG19/COM6 PE1/SEG18/COM7 PE0/SEG17/COM8 PH3/SEG16 PH2/SEG15 PH1/SEG14 PH0/SEG13 PI3/SEG12 PI2/SEG11 PI1/SEG10 External VCC input for stand alone mode: J1, J2 -The external power input when the EVB worked in stand-alone mode. The voltage of Vcc must be 5V±5%. Interface to ICE: J4, J5 -connect to RICE66 2.0, or connect to RICE with a transition board. J3 -connect to RICE directly. Interface to test the EV chip operating current JP2 - User can test the EV chip current through JP2 Note: In ICE mode, the current value is correct only when the RICE66 runs in external clock from EVB mode. (Select the external clock from EVB in OSC Frequency Config manual.) Ver 0.1 4/12

5 Switch setting: S1: Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Remarks OXC0 OSC1 OSC2 WDT LVR LVR0 RST - x x x x x x On - PORTC.3 used as digital I/O x x x x x x Off - PORTC.3 used as Reset Pin x x x x Off x x - Disable LVR x x x x On On x - Enable LVR and LVR voltage is low x x x x On Off x - Enable LVR and LVR voltage is high x x x On x x x - Disable the Watch Dog Timer x x x off x x x - Enable the Watch Dog Timer Off Off Off x x x x - Select 4M Internal RC as OSC clock On Off Off x x x X - Select External RC as OSC clock Off On Off x x x x - Select 400k ~ 8M Ceramic as OSC clock On On Off x x x x Select 400k ~ 8M Crystal as OSC clock Off Off On x x x x - Select the k Crystal as OSC clock S2: Bit4 Bit3 Bit2 Bit1 Remarks CK0 CK1 - - System Clock Range Select Off Off - - 4MHz < OSC clock <=8MHz On Off - - 2MHz < OSC clock <=4MHz Off On - - 1MHz < OSC clock <=2MHz On On kHz < OSC clock <= 1MHz Jumper setting: JP1 Short at 3V position Short at 5V position Short at EXT position EV chip power supply select The power of EV chip is set as internal 3V power source. The power of EV chip is set as internal 5V power source. The EV chip use external power supply that was input from EXT_VDD pin. JP3 Short at Stand-alone position Short at With-ICE position EVB ICE/Stand-alone mode select Select stand-alone mode. (The system clock is provided by the on board oscillator.) Select with-ice mode. (The system clock is provided by the ICE.) JP4 Short at PC0 Open at PC0 Short at PC1 Open at PC1 Short at PC2 Open at PC2 EVB PORTC0 ~2 I/O select PLL is disabled in the program, PORTC.0 is used as normal I/O. PLL is enabled in the program, PORTC.0 isused as PLL_C. If the system clock is Internal RC oscillator or External RC oscillator, PORTC.1 is used as normal I/O. If the system clock is Ceramic oscillator, Crystal oscillator or k Crystal oscillator, PORTC.1 is used as OSCO. If The system clock is Internal RC oscillator, PORTC.2 is used as normal I/O. If the system clock is External RC oscillator, Ceramic oscillator, Crystal oscillator or k Crystal oscillator, PORTC.2 is used as OSCI. Ver 0.1 5/12

6 JP6 Short Open STACK overflow select The stack overflow function in the ICE mode will on The stack overflow function in the ICE mode will off JP7 Short at PC3 Open at PC3 EVB PORTC3 I/O select If the RESET pin function (S1) selection is RST (bit2) =1 (Disable), PORTC.3 is used as normal I/O.(unplug the R8) If the RESET pin function (S1) selection is RST (bit2) =0 (Enable), PORTC.3 is used as RESET pin.(plug the R8) SW1: Reset the whole system by pressing the button. Ver 0.1 6/12

7 Diagnostic LED: Power LED: STOP LED: HALT LED: LVR LED: ADC LED: PWM LED: The LED will be turned on when the EVB is powered. The LED will be turned on when the system is in STOP mode. The LED will be turned on when the system is in HALT mode. The LED will be turned on when the VDD is lower than LVR voltage The LED will be turned on when the ADC function is running. The LED will be turned on when the PWM function is running. Oscillator setting: The SH69P55A EVB supports 5 on board oscillators. S1[6~8]: OSC[2:0] (Oscillator type select) 000 = Internal RC oscillator (4MHz) (Select OSCO pin as PORTC.1 and OSCI pin as PORTC.2) 001 = External RC oscillator (400KHz ~ 8MHz) (Select OSCO pin as PORTC.1) 010 = Ceramic resonator (400KHz ~ 8MHz) 011 = Crystal oscillator (400KHz ~ 10MHz) 100 = KHz Crystal oscillator Capacitor selection for oscillator Ceramic Resonators Frequency C1 C2 455kHz 47~100pF 47~100pF 3.58MHz - - 4MHz - - *- The specified ceramic resonator has internal built-in load capacity Crystal Oscillator Frequency C1 C kHz 5~12.5pF 5~12.5pF 4MHz 8~15pF 8~15pF 8MHz 8~15pF 8~15pF Ver 0.1 7/12

8 Notes: 1 Application notes: 1.1 After entering into the RICE66 and successfully downloaded the user program, use the F5 key on the PC keyboard to reset the EVB before running the program. If abnormal response occurs, the user must switch off the ICE power and quit RICE66, then wait for a few seconds before restarting. 1.2 When running the RICE66 for the first time, the user needs to select the correct MCU type, clock frequency... then save the settings and restart RICE66 again. 1.3 Can t Step (F8) or Over (F9) a HALT and STOP instruction. 1.4 Can t emulate the interrupt function in Step (F8) operating mode. 1.5 When you want to escape from HALT or STOP (in ICE mode), please press F5 key on the PC keyboard twice. 1.6 The maximum current limit supplied from EVB to the target is 100mA. When the current in the target is over 100mA, please use external power supply. 2 Programming notes: 2.1 Clear the data RAM and initialize all system registers during the initial programming. 2.2 The instruction should be added at the beginning of the program to ensure the IC is stable. 2.3 Never use the reserved registers. 2.4 Do not execute arithmetic operation with those registers that only have 1, 2 or 3 bits. This kind of operation may not produce the result you expected. 2.5 To add p=69p55a and romsize=8192 at the beginning of a program. If any problem occurs during the compilation of the program, check the device and set if it was set correctly. 2.6 Both index register DPH and DPM have three bits; so pay attention to the destination address when using them. 2.7 Notes for interrupt: Please make sure that the IE flag is enabled before entering into a HALT or a STOP mode. It means that the HALT or STOP instruction must follow the set IE instruction closely After the CPU had responded to an interrupt, IRQ should be cleared before resetting IE in order to avoid multi-responses Interrupt Enable instruction will be automatically cleared after entering into the interrupt-processing subroutine. If setting IE is too early, it is possible to reenter into the interrupt. So the Interrupt Enable instruction should be placed at the last 3 instructions of the subroutine. Ver 0.1 8/12

9 2.7.4 CPU will not respond to any interrupt during the next two instructions after the Interrupt Enable flag be set from 0 to After CPU has responded to an interrupt, IE will be cleared by the hardware. It is recommended to clear the IRQ at the end of interrupt subroutine The stack has eight levels. If an interrupt is enabled, there will be only seven levels that can be used It is recommended that the last line of program is END It takes second to wake up from the STOP mode when the kHz Crystal is used as a system oscillator. So, if the system is waked up by port interrupts (e.g. key pressing), the key may have been released when the program begins to read Key value. Please pay more attention to this application The oscillator of SH69V55A has been improved, so the EVB current is possible to be increased. Please refer to the main chip current. Examples: 1> Description: CPU can not wakeup after executing the HALT or STOP instruction. Program: Interrupt Enable instruction is set outside the interrupt subroutine <Wrong example> <Correct example > LDI IE, 0FH; enable interrupt LDI IE, 0FH ; enable interrupt HALT HALT Analysis: After two instructions, if an interrupt request comes or IRQ is non-zero during the third instruction cycle, CPU will respond to the interrupt and IE will be cleared. Then when returning to main program, CPU starts to execute HALT or STOP and will not be activated, because IE is cleared to zero and all interrupts are disabled. Solution: HALT or STOP are being followed closely by the LDI IE, 0FH 2> Description: CPU responds to one interrupt several times. Program: Interrupt Enable instruction is placed outside the interrupt subroutine. L1: LDI IE, 0FH ; enable interrupts JUMP L1 Analysis: After executing this two instructions, and IRQ is not cleared in time, CPU will respond to the interrupt again when it executes the two instructions followed by LDI IE, 0FH. This will happen again and again. So CPU responds to one interrupt several times. Solution: The relative IRQ flag is cleared in time after responding to the interrupt. Ver 0.1 9/12

10 3> Description: CPU is running dead in the interrupt-processing program. Program: an interrupt subroutine. ENTERINT: LDI IE, 0FH LDA STACK, 0 RTNI Analysis: After executing LDI IE, 0FH and the following two instructions, an interrupt request comes or the last relative IRQ flag is not cleared in time, then CPU will respond to the interrupt again, so the interrupt is nesting again. When the stack is over 8 levels, it will run into a dead loop. Solution: Make sure that the CPU can quit from interrupt subroutine within two instruction cycles after interrupt is enabled; After the interrupt is responded, the relative IRQ flag should be cleared before enabling the interrupt. 2.8 Notes for TIMER When setting the Timer Counter, write first T0L/T1L, then T0H/T1H After setting TM0/TM1, T0L/T1L, T0H/T1H, there is no need to rewrite after the Timer counts overflow, otherwise it will cause a time error every time. The timer is interrupted by the reload register that was set in different time. 2.9 Notes for I/O Each I/O port (excluding those open drain output ports) contains pull-high MOS controllable by the program. Each pull-high MOS is controlled by the value of the corresponding bit in the port pull-high control register (PPCR), independently. When the port is selected as an input port (Write 1 to the relevant bit in the port pull-high control register (PPCR) could turn on the pull-high MOS and write 0 could turn off the pull-high MOS). So the pull-high MOS can be turned on and off individually. But when the port is selected as output port, the pull-high MOS must be turned off automatically, regardless the value of the corresponding bit in the port pull-high control register (PPCR) When a digital I/O is selected to be an output port, the reading of the associated port bit actually represents the value of the output data latch, not the status on the pad. Only when a digital I/O is selected to be an input port, the reading of the associated port bit represents the status on the corresponding pad Setting those I/O ports with open drain output type as input will cause leakage current ranging from tens to hundreds micro-ampere. So do not forget to enable the pull-high MOS or connect these input ports with external resistors (pull-high or pull-low) to prevent the I/O Floating In 42 pin package, PORTK must be selected to be output 0. In 32 pin package, PORTH.0, PORTH.1 and PORTI ~ K must be selected to be output 0. In 28 pin package, PORTF.2, PORTF.3 and PORTH ~ K must be selected to be output 0. (Refer to the relevant section in the SH69P55A Data Sheet for more detail information.) Ver /12

11 2.9.5 When counting external pulse, please directly read the PORT status to make sure that the counted number is correct The Key De-bounce time is recommended to be 50ms. But in the Rubber Key application, it is best to test Rubber Key s De-bounce time Jumping between BANKs When program jumping between ROM banks, it is best to shield all interrupts temporarily. The interrupts are enabled only after the jump is finished. Otherwise, it may not be able to return to the correct BANK after the jump. (During saving the value of BANK, interrupt may cause some un-estimated mistakes.) It is recommended storing the interrupt subroutine in BANK0. So that when the program runs in other BANK while an interrupt occurs, it will automatically jump to the interrupt subroutine in BANK0 and return to the current BANK automatically after the interrupt Notes for key scan If key scan function is shared with LCD function, the LCD function must be selected as 4com, 6com or 8com. It is important that if the LCD function is selected as 4com, PORTD must be selected as COM port (the LCD control register $29 bit0~2 can be selected as 100, 110 and 111 ). PORTA0~3, PORTF0 must be selected as SEG output (SEG configuration register $2E bit0~2 can t be 000 ) Although the LCD or LED is turned off, the automatic key scan is also valid Notes for LCD The user can also use the NOT recommended settings if the LCD performance needed If the LVR function and the LCD function are running, it will cause random waveform at LCD COM and SEG ports while the power of the chip is cut off. So, the LCD panel will display random symbols. The time that the random symbols display lies on the power drop-off time (the capacitance discharging time). It has two ways to solve this problem. 1) Connect a discharge resistance between VDD and GND to reduce the power drop-off time. So the random symbols display time will also decreased (figure1). 2) Insert a diode between VDD and capacitance, then pull a port to detect the power drop (figure2). When the function detects the power drop, it must set all LCD COM and SEG port to be output 0. So the random symbols are no longer to be displayed. PORT +5V 470uF 1K VDD SH69P55A +5V 470uF DIODE VDD SH69P55A GND GND GND GND figure1 figure2 Ver /12

12 Application notes Revision History Revision No. History Date 0.0 Original Aug PortC.3 pull-high resistance R8 is modified to be Plugable. Oct.2007 Ver /12