SA CHANNEL SEGMENT DRIVER FOR DOT MATRIX LCD
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1 80 CHANNEL SEGENT DVE FO DOT ATX LCD Technical Specification Hong Kong Office oom C, 19/F, itz Plaza, 122 Austin oad, Tsim Sha Tsui, Kowloon, Hong Kong Tel: (852) Fax: (852) China Tel: (86) China Fax:(86) Web site: 1
2 ntroduction is a low cost 80-channel segment LCD driver C that fabricated by low power COS technology. This C is used together SA3086 for 80 x 80, 160 x 80 and 240 x 80 dot matrix display. t can also be used with SA3670 for 80 x 100, 160 x 100, 240 x 100 displays. nterface with LCD controller is 1-bit serial. Features Low power COS process. Dot matrix LCD driver with 80-channel output. Serial display data and control signal from the controller LS. Display driving bias: static ~ 1/10. Power supply voltage: V. ax. supply voltage for display: 13.0V (V LCD = V DD - V EE ). Serial interface with LCD controller. Configuration Segment driver Common driver 80 x 80 1 pc of 1 pc of SA x 80 2 pcs of 1 pc of SA x 80 3 pcs of 1 pc of SA x pc of 1 pc of SA x pc of 1 pc of SA x pc of 1 pc of SA3670 2
3 Block Diagram SEG SEG79 LCD driver 80 bit V V SS DD Level shifter 80 bit CL1 Latch 80 bit Data register 80 bit D0 CL2 DO1 Enable shift register DO2 Figure 1. Block Diagram 3
4 Pad Diagram (0,0) S01 79 VEE GND 85 CL / CL2 90 DO DO S80 96 S31 49 S30 50 S29 51 S28 52 S27 53 S26 54 S25 55 S24 56 S23 57 S22 58 S21 59 S20 60 S19 61 S18 62 S17 63 S16 64 S15 65 S14 66 S13 67 S12 68 S11 69 S10 70 S09 71 S08 72 S07 73 S06 74 S05 75 S04 76 S03 77 S02 78 Chip Size: 3009 x 4012 Pad size: 100 x 100 Unit: m 30 S50 29 S51 28 S52 27 S53 26 S54 25 S55 24 S56 23 S57 22 S58 21 S59 20 S60 19 S61 18 S62 17 S63 16 S64 15 S65 14 S66 13 S67 12 S68 11 S69 10 S70 09 S71 08 S72 07 S73 06 S74 05 S75 04 S76 03 S77 02 S78 01 S79 48 S32 47 S33 46 S34 45 S35 44 S36 43 S37 42 S38 41 S39 40 S40 39 S41 38 S42 37 S43 36 S44 35 S45 34 S46 33 S47 32 S48 31 S49 Substrate should be connect or floating 4
5 Pad Coordinates PAD PAD COODNATE PAD PAD COODNATE PAD PAD COODNATE NU. NAE X Y NU. NAE X Y NU. NAE X Y 1 S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S VEE S S S S S S S S S S GND S S CL S S S S / S S S S CL S S DO S S S S DO S S S S S S S
6 Pin Descption Pin (No.) /O Name Description nterface V DD (40) V SS GND (36) V EE (31), (33, 32), (35, 34) Power Operating Voltage Negative Supply Voltage LCD driver output voltage level For logical circuit ( V) 0V (GND) For LCD driver circuit Bias voltage level for LCD drive (select level) Bias voltage level for LCD drive (Non-select level) Selection of the shift direction of shift register Power Supply Power / (38,39) LCD driver Data interface / DO1 DO2 V DD V SS Out n V DD or V SS V SS V DD n Out DO1 (42) DO2 (44) /O /O LCD driver Data interface Data input/output of shift register Controller or S01- S80 O Driver Output LCD Driver Segment Output LCD (46) CL1, CL2 (37,41) Alternated signal for LCD driver output Data shift / Latch clock The alternating signal to convert LCD drive waveform to AC CL1: Data latch clock CL2: Data shift clock Controller Data Shift Direction / Data Direction 0 1 S80 S S01 S80 6
7 aximum Absolute Limit (Ta = 25 C) Characteristic Symbol Value Unit Operating Voltage V DD -0.3 to +7.0 V Driver Supply Voltage V LCD V DD to V DD V nput Voltage 1 V N1-0.3 to V DD V nput Voltage 2 (V 1 V 4 ) V N2 V DD to V EE V Operating Temperature T OP - 30 to + 85 C Storage Temperature T SG -55 to C * Voltage greater than above may damage the circuit * V EE : connect a protection resistor (220Ω± 5%) Electrical Characterstics DC Characteristics (V DD = V, V DD -V EE = 3-13V, V SS = 0V, Ta = C) Characteristic Symbol Test condition in ax Unit Applicable pin Operating Current * DD f CL2 = 400kHz - 1 ma Supply Current * EE f CL1 =1kHz - 10 µa - nput High Voltage V H 0.7V DD V - DD V CL1, CL2, DO1, nput Low Voltage V L 0 0.3V DD DO2,, nput Leakage Current LKG V N = 0-V DD -5 5 µa /, F, Output High Voltage V OH OH = -0.4mA V DD Output Low Voltage V OL OL = +0.4mA DO1, DO2 Voltage Descending V ON = 0.1mA for one of D1-1.1 V V (,,, S1-S80 ) V ON = 0.05mA for each D2-1.5 * S (S01-S80) S1-S80 Leakage Current V V N = V DD -V EE (Output S1~S80: floating) µa,,, * The parameter is guaranteed. AC Characteristics (V DD = 2.7 to 5.5V, V DD -V EE = 3 to 13V, V SS = 0V, Ta = -30 to +85 C) Characteristic Symbol Test condition in ax Unit Applicable pin Data Shift Frequency f CL khz CL2 Clock High Level Width t WCKH CL1, CL2 Clock Low Level Width t WCKL CL2 Clock Set-up Time t SL From CL2 to CL t LS From CL1 to CL CL1, CL2 ns Clock ise/fall Time t /t F Data Set-up Time t SU Data Hold Time t DH DO1, DO2 Data Delay Time t D C L = 15pF nput/output current is excluded; when input is at the intermediate level with COS, excessive current flows through the input circuit to the power supply, to avoid this, input level must be fixed at "H" or "L". 7
8 Timing Characteristics Data n (DO1, DO2) Data out (DO1, DO2) LCD OUTPUT WAVEFOS Figure 3. AC characteristics Output of Latch (DATA) Output (S1-S80) Figure 4. Output Waveforms 8
9 APPLCATON CCUT (1) 160 * 100 LCD Display SA3670 combination with Controller FL LP CP F NC VSS NC DB0 CL1 CL2 DO1 / DO2 VEE CL1 CL2 DO1 / DO2 VEE 1 DSPOFF NC V1 1 2 SA3670 U1 DO1 YSCL F /NH CO V1 V4 DO2 SEG X 100 LCD DSPLAY SEG V4 VSSH Data flow direction: The LCD display segment data direction is S160 to S01 9
10 APPLCATON CCUT (2) 160 * 80 LCD Display SA3086 combination with Controller FL LP CP F NC VSS NC DB0 CL1 CL2 DO1 / DO2 VEE CL1 CL2 DO1 / DO2 VEE DSPOFF NC V1 SA3086 D2_DL CL1 SC1 SC2 DSPOFFB. AS CS CO 1-80 SEG X 80 LCD DSPLAY SEG V4 V12 V43 D4_D. SC79 SC80 VSSH Data flow direction: The LCD display segment data direction is S160 to S01 10
11 eference of DC booster for Vlcd 1. Use external oscillator for booster U4B 74HC U4A 74HC04 VLCD k 7 C1 C2 C3 C p C Q1 2 10k 10k Constrast 30k 0.1u 0.1u 2. Use PU signal to generate clock pulse for booster VLCD CLK Freq U1A 1 2 U1B 3 4 C1 C2 C3 C4 C5 11
12 3. Use PW output of CU for booster PW /PW VLCD D1 2.2u C1 D2 2.2u C2 D3 2.2u C3 D4 2.2u C4 D5 2.2u C5 *Note: Diode recommends using BAT54 or Schottky diode. nverter for buffer for CL pulse. f PU CLK output can drive more than 1mA current, then inverter may be omitted. ncrease value of capacitor will give higher drive for booster circuit. The circuit within dotted line is for controlling the contrast of LCD. Set higher duty ratio for dimmer LCD, lower duty ratio for darker LCD. 12
13 evisions: Version 1 First release Version 2 Page All Page 9 Change name of Pad V1 V4 Application circuit (2) update Version 3 Page 11 Change value of capacitors, add contrast control. Version 4 Page 3,4 Update for pad diagram and pad coordinates. Version 5 Page 11 Add the PW booster circuit. Version 6 odify datasheet cover 13
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