12MHz XTAL USB DAC PCM2702E

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Toby Martin
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1 EVALUATION FIXTURE FEATURES COMPLETE EVALUATION FIXTURE FOR THE PCM70E USB DIGITAL-TO- ANALOG CONVERTER ON-BOARD OUTPUT FILTER USING OPA5UA DUAL CMOS OP AMP.5mm STEREO MINI JACK FOR LINE LEVEL OUTPUTS PLUG-AND-PLAY OPERATION NO SPECIAL SOFTWARE REQUIRED () EXTERNAL 5V POWER SUPPLY RE- QUIRED () DESCRIPTION The is an evaluation platform for Burr-Brown s PCM70E stereo audio Digital-to- Analog Converter (DAC) with an on-chip Universal Serial Bus (USB) interface controller. The board includes all necessary power supply and interface connectors needed for customer demonstration and performance measurements. NOTES: () Requires Microsoft Windows 98 or later, which includes standard device drivers for USB audio playback. () The PCM70E is a self-powered device, as defined by the USB Revision.0 specification. Therefore, it requires an external power supply. Bus-powered operation is supported for evaluation purposes only. The PCM70E is not compliant with USB specifications when utilized as a buspowered device. Windows is a registered trademark of Microsoft Corp. BLOCK DIAGRAM MHz XTAL USB Series B Connector CN00 V BUS D M D P GND USB DAC PCM70E To DAC: V CC nd-order Low-Pass Filter OPA5 To Op Amp CN0 Line Out (Stereo Mini-Jack) Monitor (LED) To DAC: V DD JP00 CN00 Power Supply Configuration Power Supply Connector (6.VDC max) SBAU05 International Airport Industrial Park Mailing Address: PO Box 00, Tucson, AZ 857 Street Address: 670 S. Tucson Blvd., Tucson, AZ Tel: (50) 76- Twx: Internet: Cable: BBRCORP Telex: FAX: (50) Immediate Product Info: (800) Burr-Brown Corporation LI-55 Printed in U.S.A. May, 000

2 HARDWARE DESCRIPTION PCM70E AND OUTPUT LOW-PASS FILTERS The PCM70E is soldered directly to the demo board. All necessary interface and power-supply bypass components are included. A MHz crystal provides the reference clock source required by the on-chip clock generation circuitry. The left and right audio outputs are DC coupled to an output filter stage. An OPA5UA dual op amp is configured as a stereo nd-order low-pass filter using a Multiple Feed- Back (MFB) circuit arrangement. The op amp is DC biased to.5 volts by connecting the PCM70E s V COM pin to the non-inverting inputs of the OPA5UA. The outputs of the active filters are AC coupled to a.5mm stereo mini jack for connection to powered speakers or audio test equipment. CONNECTORS CN00 is a series B USB connector, which is used to interface the PCM70E to the USB port on a PC or USB hub. CN00 is the power-supply connector, required for selfpowered operation. It is designed for use with a wall-mount power supply. Maximum input voltage is 6.VDC. CN0 is the stereo line level output jack. Powered speakers may be connected to CN0 for demonstration purposes. Alternatively, audio measurement equipment may be connected here for performance evaluation. POWER SUPPLY CONFIGURATION JP00 is used to select either self-powered or bus-powered operation. Self-powered operation requires an external power supply, connected at CN00. Bus-powered mode derives power from the V BUS pin of the USB port via CN00. Figure shows the available settings for JP Bus-Powered (demonstration only) Self-Powered (requires external supply at connector CN00) Unused FIGURE. Power-Supply Configuration Using JP00. LED INDICATORS Two Light Emitting Diodes (LED) are included for visual indication of playback and bus status. D00, the Playback indicator, is illuminated when the PCM70E plays audio data received from the USB bus. D005, the Suspend indicator, is illuminated when the USB bus suspends audio data transmission to the PCM70E. SCHEMATIC AND PCB LAYOUT The complete circuit diagram of the evaluation fixture is shown in Figure. The is a -layer printed circuit board. Figure shows the printed circuit board layout, including silk screen, top layer (component side) and bottom layer (solder side).

3 CN CN 00 DC Jack YKB-06 (6.V max) C 00 Q 00 SC00 R 00 00Ω C 00 D 00 (JUMPER) C 00 Q 00 DTAESA R Ω D 00 TLG8P D 00 SS D 00 SS R.5kΩ R 00 Ω Q 00 DTAESA C 005 C 00 R 00 Ω R 005 Ω R Ω D 005 TLR8P C 0 8pF X 00 MHz XTI XTO V DD C V CC P DGNDC AGNDP V DD V CC L 5 DGND AGNDL 6 D V OUT L 7 8 D PCM70 V BUS V CC V COM 9 DGNDU AGND 0 PLYBCK V OUT R SSPND AGNDR ZERO V CC R TEST TEST0 TEST TEST C 0 8pF C 0 C 00 C 009 C 006 C 008 R 0 kω C 0 800pF C 007 R 0 kω C 0 800pF R 0.9kΩ R 0.9kΩ R 05 kω R 06 kω C 05 0pF U0 OPA5UA / C 06 0pF U0 OPA5UA / R 07 00Ω C R 08 00Ω C 09 C 0 CN 0 Stereo MinI Jack YKB-57 FIGURE. Schematic for the.

4 Silk Screen Component Placement Top Layer (component side) Bottom Layer (solder side) FIGURE. Printed Circuit Board Layout for the.

5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 000, Texas Instruments Incorporated

Hardware UART for the TMS320C3x

TMS320 DSP DESIGNER S NOTEBOOK Hardware UART for the TMS320C3x APPLICATION BRIEF: SPRA223 Contributed by Lawrence Wong Digital Signal Processing Products Semiconductor Group Texas Instruments June 1993