Vivek Ganti Reg. No. 71,368; and Gregory Ourada Reg. No UNITED STATES PATENT AND TRADEMARK OFFICE

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1 By: Vivek Ganti Reg. No. 71,368; and Gregory Ourada Reg. No UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Mail Stop PATENT BOARD Patent Trial and Appeal Board U.S. Patent & Trademark Office P.O. Box 1450 Alexandria, VA AMERICAN MEGATRENDS, INC., MICRO-STAR INTERNATIONAL CO., LTD, MSI COMPUTER CORP., GIGA-BYTE TECHNOLOGY CO., LTD., AND G.B.T., INC. Petitioner, v. KINGLITE HOLDINGS INC. Patent Owner Case IPR U.S. Patent 6,633,976 PETITION FOR INTER PARTES REVIEW OF U.S. PATENT NO. 6,633,976

2 TABLE OF CONTENTS I. Introduction... 1 II. Overview... 1 III. The 976 Patent... 1 A. Summary of the Technology... 2 B. The claimed embodiments of the 976 Patent... 4 C. Challenge to the validity of the 976 Patent... 5 IV. Mandatory Notices (37 C.F.R. 42.8(a)(1))... 6 D. Notice of related matters (37 C.F.R. 42.8(b)(2))... 6 E. Real party-in-interest (37 C.F.R. 42.8(b)(1))... 7 F. Notice of Counsel and Service Information (37 C.F.R. 42.8(b)(3-4))... 8 V. Grounds for Standing... 8 VI. Statement of Relief Requested... 9 VII. Claim Construction... 9 A. Applicable Principles of Claim Construction B. Level of Skill in the Art... 9 C. Terms to be Construed Small amount of BIOS initialization code... 10

3 2. Dispatch manager Critical nonvolatile storage device System memory VIII. Identification of Challenge (37 C.F.R (b)) A. Ground 1: The teachings of Shipman and Harmer render obvious claims 1-5 and Independent Claim Independent Claim Dependent Claim Dependent Claim Dependent Claims 4 and Dependent Claims 5, 8-12, and Dependent Claim Dependent Claims 13 and B. Ground 2: The teachings of Shipman, Harmer, and Patel render obvious claim IX. No Secondary Conditions exist X. Fees (37 C.F.R ) ii

4 XI. Conclusion TABLE OF AUTHORITIES Cases Allen Eng g Corp. v. Bartell Indus., Inc., 299 F.3d 1336, 1346 (Fed. Cir. 2002) Catalina Mktg. Int l, Inc. v. Coolsavings.com, Inc., 289 F.3d 801, 808 (Fed. Cir. 2002) Graham v. John Deere Co., 383 U.S. 1 (1966) In re Kahn, 441 F.3d 977, (Fed. Cir. 2006)... 18, 30 KSR International Co. v. Teleflex, Inc., 550 U.S. 398 (2007)... 18, 24, 35, 37 Statutes 35 U.S.C. 314(a) C.F.R (b) C.F.R (b) C.F.R C.F.R (b) C.F.R (a) C.F.R. 42.6(d) C.F.R. 42.8(a) C.F.R. 42.8(b)... 6, 7, 8 iii

5 37 C.F.R (b)... 9 pre-aia 35 U.S.C pre-aia 35 U.S.C , 13, 18, 50 iv

6 EXHIBIT LIST Ex Ex Ex Ex Ex Ex U.S. Patent No. 6,633,976 to Stevens ( 976 Patent ) The file history of the 976 Patent U S. Patent No. 5,835,760 ( Harmer ) U S. Patent No. 5,671,413 ( Shipman ) U.S. Patent No. 4,975,950 to Lentz ( Lentz ) U.S. Patent No. 5,999,989 to Patel ( Patel ) Ex Operating Systems, Second Edition, H. M. Deitel (1990) Ex Ex Ex PCI Local Bus Specification U.S. Patent No. 6,615,160 to Quinnett et al. ( Quinnett ) Gary Kildall, The Evolution of an Industry: One Person s Viewpoint, "Dr. Dobb's Journal of Computer Calisthenics & Orthodontia", Vol.5, No.1, (January 1980) (number 41), page 6 7 ( Kildall ) Ex The Protected Area Run Time Interface Extension Services Specification ( PARTIES ) Ex Ex Declaration of Michael Perla Declaration of Vivek Ganti v

7 I. Introduction American Megatrends, Inc. Micro-Star International Co., Ltd, MSI Computer Corp., Giga-Byte Technology Co., Ltd., and G.B.T., Inc. ( Petitioner ) petitions for inter partes review seeking cancellation of claims 1-17 of U.S. Pat. No. 6,633,976 ( the 976 Patent, Ex. 1001), which is assigned to Kinglite Holdings Inc. ( KL ). KL is referred to as Patent Owner in this Petition. II. Overview This Petition furthers the purpose of inter partes review the cancellation of unpatentable claims. The challenged claims 1-17 of the 976 Patent never should have issued. This Petition establishes a reasonable likelihood that Petitioners will prevail regarding at least one of the claims challenged and that the challenged claims are unpatentable under pre-aia 35 U.S.C Thus, Petitioners respectfully request that the Board grant the Petition and institute trial on all of the challenged claims. III. The 976 Patent The 976 Patent is titled Method of Storing Bios Modules and Transferring Them to Memory for Execution. The 976 Patent issued on October 14, 2003, and appears to claim priority to August 10, 2000, which is the patent s filing date. (Ex. 1001, p.1). 1

8 A. Summary of the Technology The general field of technology is a Basic Input Output System (BIOS). As described in the 976 Patent, the BIOS program is typically stored in nonvolatile memory (flash 15 memory), and which brings up (initializes) a computer system when it is powered on. (Ex. 1001, p.6, 1:14-17). The 976 Patent asserts that it is an improvement over the prior art teachings of the U.S. Pat. No. 5,835,760, issued to Harmer. (Ex. 1001, p.6, 2:9-11). U.S. Pat. No. 5,835,760 is submitted herein as Exhibit 1003 ( Harmer ). In its Background section, the 976 Patent explicitly describes its asserted improvements over Harmer by identifying two specific distinctions: 1) Harmer does not disclose or suggest the use of a flash memory or nonvolatile memory and 2) Harmer does not disclose or suggest selectively transferring modules of the BIOS into RAM, only the entire BIOS. (Ex. 1001, p.6, 1:64-2:2). Regarding the first distinction, the 976 Patent admits that BIOS is typically stored in nonvolatile memory (flash 15 memory), thereby leaving the second distinction as the key issue in any invalidity inquiry. (Id., 1:15-16; Ex. 1012, pp , 32-34). 2

9 The 976 Patent s asserted improvement in the field of BIOS is achieved through the use of BIOS modules that can be transferred from a critical nonvolatile storage device to system memory. (Ex. 1001, p.6, 2:24-29). The 976 Patent claims a dispatch manager that is operative to selectively load and iteratively execute a predetermined number of tasks relating to complete initialization of the computer. (Ex. 1001, p.10, 9:50-10:4). The specification of the 976 Patent illuminates this claimed embodiment by explaining that the dispatch manager executes to sequentially copy selected BIOS modules identified in its list of tasks to execute. (Id., p.7, 3:10-13). Therefore, the thrust of the invention described in the 976 Patent pertains to a BIOS comprising modules. These modules may be selectively loaded from read-only memory (ROM) to system random access memory (RAM). (Ex. 1012, p. 16, 35). As discussed in further detail below, this concept of making a BIOS modular is disclosed in U.S. Pat No. 5,671,413 issued to Shipman et al., submitted herein as Ex ( Shipman ). Shipman describes the application of module programming techniques to a BIOS stored in ROM. (Ex. 1004, p.14, 3:29-31, FIG. 1). Shipman dispatches its BIOS modules using a decompression dispatcher to selectively load BIOS modules into system memory (e.g., random access memory (RAM)). (Ex. 1004, p.13, 1:39-41)(explaining that the decompression dispatcher is 3

10 responsible for dispatching the service components into random access memory (RAM) of the computer system for execution on an as needed basis ). B. The claimed embodiments of the 976 Patent Below are the elements of representative claim 1 along with corresponding examples from the written description of the 976 Patent: Claim 1 of the 976 Patent [1P] A method for processing basic input output system (BIOS) modules of a computer having a central processing unit (CPU), a computer bus, and a critical nonvolatile storage device, comprising the steps of: Corresponding Specification Excerpts transferring modules of the BIOS into RAM rather than the entire BIOS (Ex. 1001, p.6, 2:1-2). [1.1] storing a predetermined small amount of BIOS initialization code in a first portion of the critical nonvolatile storage device that is operative to initialize the CPU and the system memory; [1.2] storing a dispatch manager in a second portion of the critical nonvolatile storage device that is operative to selectively load and iteratively execute a predetermined number of tasks relating to complete initialization of the computer; 4 The ROM 12 stores initialization code that initializes the CPU 11 (Ex. 1001, p.7, 4:42-43) The dispatch manager executes to sequentially copy selected BIOS modules identified in its list of tasks to execute. (Ex. 1001, p.7, 3:10-13). [1.3] turning on the computer; After the computer is turned on, the minimal initialization code is executed to initialize the CPU and the system memory. (Ex. 1001, p.7, 3:1-3).

11 [1.4] executing the predetermined small amount of BIOS initialization code to initialize the CPU and the system memory; [1.5] copying the dispatch manager from the critical nonvolatile storage device to the system memory; and [1.6] executing the dispatch manager to execute the predetermined number of tasks to initialize the computer. After the computer is turned on, the minimal initialization code is executed to initialize the CPU and the system memory. (Ex. 1001, p.7, 3:1-3). The dispatch manager 17 is copied 56 from the critical nonvolatile storage device 15 into the system memory 11. (Ex. 1001, p.10, 9:17-20). The dispatch manager 17 iterates 64 through all tasks in the list of tasks until all tasks are loaded and executed. Once all tasks are 35 loaded 63 the operating system of the [sic] computer 10a is launched 65. (Ex. 1001, p.10, 9:32-36) C. Challenge to the validity of the 976 Patent This Petition challenges the validity of claims 1-17 of the 976 Patent. As described above, the 976 Patent is directed to sequentially loading BIOS modules from a nonvolatile storage (e.g., ROM) to system memory (e.g. system RAM). (Ex. 1001, p.7, 3:10-12). Based on admissions in the 976 Patent, this is the only feature of the invention that the 976 Patent considers to be an improvement over the prior art. (Ex. 1012, pp , 31-35; Ex. 1001, p.6, 1:63-2:11). The 976 Patent issued after a first office action allowance. (Ex. 1002, p.40). However, in allowing the 976 Patent, the examiner did not consider certain prior art references, presented herein, that render obvious the challenged claims. Among these references is Shipman. This Petition demonstrates how Shipman combined 5

12 with other prior art reveals the obvious nature of the challenged claims. More specifically, this Petition focuses on Shipman s disclosure of a BIOS that is implemented via a number independently executable service components. (Ex. 1004, Abstract). In addition to Shipman and the other prior art set forth herein, the expert testimony of Michael Perla supports this challenge. Mr. Perla, a technical expert in the field of software design and development for over twenty-five years, explains why the challenged claims are unpatentable in view of Shipman in combination with a second reference (Harmer). (Ex. 1012, pp. 4-5, 25, 56, 8, 66, 177). Mr. Perla draws on his considerable experience to explain how a person of ordinary skill in the art ( POSITA ) would have been motivated to combine the relevant teachings of Shipman and Harmer in a manner that renders the challenged claims obvious. Mr. Perla explains the development of the BIOS in the 1980 s, over a decade before the filing of the application which led to the issuance of the 976 Patent. (Ex. 1012, pp , 30). Shipman applies modular programming, a well-known technique to BIOS, which is also described in Harmer s teachings. (Ex. 1012, p. 25, 68). IV. Mandatory Notices (37 C.F.R. 42.8(a)(1)) D. Notice of related matters (37 C.F.R. 42.8(b)(2)) The 976 Patent is presently asserted against Micro-star International Co., Ltd ( Micro-Star ) and MSI Computer Corp (collectively, MSI ) in the District Court 6

13 for the Central District of California (CV JVS (PJWx)). The 976 Patent is also presently asserted against GIGA-BYTE Technology Co., Ltd. ( GIGA- BYTE ) and G.B.T, Inc. (collectively, GBT ) in the District Court for the Central District of California (CV JVS (PJWx)). MSI and GBT are both customers of American Megatrends Inc. ( AMI ). AMI has successfully intervened in these two district court cases and the two cases have been consolidated. The owner of the 976 Patent then asserted it directly against AMI. E. Real party-in-interest (37 C.F.R. 42.8(b)(1)) The real parties in interest are: American Megatrends, Inc. (American corporation, principal place of business in 5555 Oakbrook Parkway, Norcross, Georgia 30093) Micro-star International Co., Ltd (Taiwanese corporation with its principal place of business at No. 69, Lide Street, Zhonghe District, New Taipei City 235, Taiwan) MSI Computer Corp (American corporation with its principal place of business at 901 Canada Court, City of Industry, California 91748) GIGA-BYTE Technology Co., Ltd. (Taiwanese corporation, principal place of business at No.6, Bao Chiang Road, Hsin-Tien Dist., New Taipei City 231, Taiwan) 7

14 G.B.T, Inc. (American corporation, principal place of business in Railroad St, City Of Industry, CA 91748) F. Notice of Counsel and Service Information (37 C.F.R. 42.8(b)(3-4)) Lead Counsel: Vivek Ganti (Reg. No. 71,368) Address: HILL, KERTSCHER & WHARTON, LLP, 3350 Riverwood Parkway, Suite 800, Atlanta, GA Tel Fax Backup Counsel: Gregory Ourada (Reg. No. 55,516) Address: HILL, KERTSCHER & WHARTON, LLP, 3350 Riverwood Parkway, Suite 800, Atlanta, GA Tel Fax Please address all correspondence to the lead counsel at the address shown above. Petitioners consent to electronic service of papers by at: and Pursuant to 37 C.F.R (b), a Power of Attorney by Petitioners appointing each of the above designated counsel is concurrently filed. V. Grounds for Standing Petitioners certify that the 976 Patent is eligible for inter partes review and that the Petitioners are not estopped or barred from requesting inter partes review challenging the claims identified in the Petition. The required fee is paid via online using Deposit Account No (Customer ID No ). The Office is 8

15 authorized to charge fee deficiencies and credit overpayments to this Deposit Account No VI. Statement of Relief Requested Petitioners request inter partes review and cancellation of claims 1-17 of the 976 Patent based on the detailed statements presented in Sections VII and VIII. VII. Claim Construction A. Applicable Principles of Claim Construction. The Board should construe the claims using the broadest reasonable interpretation ( BRI ). See 37 C.F.R (b). Petitioners propose BRI-based constructions of terms herein solely for purposes of the inter partes review ( IPR ) proceeding as provided by 37 C.F.R (b) and (b)(3). The BRIbased standard is not used in litigation or other proceedings, and on that basis Petitioners note that these constructions are not necessarily appropriate for use in litigation or any other proceedings which employ a standard of claim construction other than BRI. B. Level of Skill in the Art With respect to the 976 Patent, a POSITA is a person having at least a Bachelor of Science degree in computer science or software engineering or a Bachelor of Science degree in a technical field requiring computer science or 9

16 software engineering courses and at least one year of industry experience in computer science or engineering related to firmware. (Ex. 1012, p. 8, 14). C. Terms to be Construed 1. Small amount of BIOS initialization code The term small amount of BIOS initialization code appears in claims 1 and 14. Under the BRI standard, this term is at least as broad as the beginning routine that is executed when a computer is turned on. (Ex. 1012, p. 18, 41). According to a POSITA, initialization code refers to the first executable code of any personal computer that was necessary to test and initialize various computing components. (Id., p. 17, 38). It was well-known that executing initialization code is a critical step found in virtually every personal computer prior to the time of invention. (Id.). The conventional usage of BIOS initialization code is consistent with the 976 Patent s usage of this term. (Ex. 1012, p. 17, 37). For example, the 976 Patent states that initialization code is operative to initializes [sic] the CPU 11 and the system memory 13. (Ex. 1001, p.8, 5:27-29). Moreover, the phrase small amount, appearing before BIOS initialization code, is redundant based on the context of the claims. (Ex. 1012, p. 18, 39). Claim 1 is directed to the idea of dispatching a predetermined number of tasks relating to complete initialization of the computer. (Id.). The small amount of 10

17 BIOS initialization code is outside of these dispatched tasks. (Id.). In this respect, the 976 Patent claims the idea of separating a small portion of the initialization code (which is the beginning routine that is executed when a computer is turned on) from the remainder of the initialization code (to be executed by the dispatch manager) once the system memory and CPU have been initialized. (Id.). The idea of separating the initialization code in this manner implies that the predetermined small amount of BIOS initialization code is relatively small compared to the total amount of initialization code, some of which is dispatched by the dispatch manager. (Id.). 2. Dispatch manager The term dispatch manager appears in claims 1-4, 14 and 15. Under the BRI standard, a dispatch manager is at least as broad as a program that handles the loading and executing of tasks. (Ex. 1012, p. 20, 45). In the 976 Patent, the dispatch manager performs the function of selecting a number of tasks and then iteratively executing these tasks. (Ex. 1001, p.1, Abstract). The concept of dispatching is widely recognized as a method for controlling the instructions utilized by a computer system to serve the end user. (Ex. 1012, p. 19, 44). Therefore, at the very least, a dispatch manager s purpose includes the ability to 11

18 handle other tasks, specifically the execution of BIOS modules. (Id., pp , 42-43). 3. Critical nonvolatile storage device The term critical nonvolatile storage device appears in claims 1 and 14. Under the BRI standard, this term is at least as broad as a device or technology that a CPU can use to execute an initial set of instructions, where the device or technology is capable of preserving data in the event of a power off condition, including but not limited flash memory, ROM, PROM, EPROM or EEPROM. (Ex. 1012, p. 21, 49). According to a POSITA, a nonvolatile storage device is capable of preserving data in the event of a power off condition. (Id., pp , 48). Next, in the context of the 976 Patent, a critical nonvolatile storage device is a device or technology that the CPU 11 can use to execute an initial set of instructions. (Ex. 1001, p.8, 5:7-10). Specific examples of this term include flash memory, a read only memory (ROM), a programmable read only memory (PROM), an erasable programmable read only memory (EPROM), and electrically erasable programmable read only memory (EEPROM). (Id., p.8, 5:1-10). 12

19 4. System memory The term system memory appears in claims 1-4, 13-15, and 17. Under the BRI standard, this term is at least as broad as any random access memory used by the central processing unit. (Ex. 1012, p. 21, 50). The 976 Patent interchangeably uses the phrase system memory and random access memory (RAM) by referring to item 13 of the figures as either RAM or system memory (Ex. 1001, p.8, 5:10-11). VIII. Identification of Challenge (37 C.F.R (b)) Petitioners request IPR on two Grounds of Unpatentability: (1) the combination of Shipman and Harmer render claims 1-5 and 7-17 obvious under 35 U.S.C. 103(a); and (2) the combined teachings of U.S. Patent No. 5,999,989 ( Patel ), Shipman and Harmer render obvious dependent claim 6 under 35 U.S.C. 103(a). In accordance with 37 C.F.R. 42.6(d), the references of the Grounds of Unpatentability are filed with this Petition. Ground 1 of Unpatentability challenges claims 1-5 and 7-17 as obvious. Ground 1 applies Shipman (Ex. 1004) which is a U.S. Patent applied for on October 31, 1994, which issued on September Shipman qualifies as prior art 13

20 under at least 35 U.S.C. 102(a) and 102(b). Shipman was not considered by the examiner during the prosecution of the 976 Patent. Ground 1 combines Shipman with Harmer (Ex. 1003). Harmer was filed on October 13, 1995 and issued on November 10, Thus, Harmer qualifies as prior art at least 35 U.S.C. 102(a) and 102(b). Harmer is also discussed as prior art in the 976 Patent. (Ex. 1001, p.6, 1:36-2:11). Ground 2 of Unpatentability challenges dependent claim 6 by combining the teachings of Patel (Ex. 1006) with Shipman (Ex. 1004) and Harmer (Ex. 1003). Patel is a U.S. Patent filed on June 17, 1997, and issued Dec. 7, Patel qualifies as prior art under at least 35 U.S.C. 102(a) and 102(e). Like Shipman, Patel was not considered by the examiner during the prosecution of the 976 Patent. Petitioners now present a detailed explanation of the Grounds of Unpatentability of the challenged claims: A. Ground 1: The teachings of Shipman and Harmer render obvious claims 1-5 and Shipman implements a BIOS using independently-executable BIOS modules. (Ex. 1004, p.1 Abstract; p.2, FIG. 1). The BIOS modules are initially stored in non-volatile memory and are then dispatched into random access memory on an as needed basis. (Id., p.1 Abstract. p.13, 1:37-45). The terminology of Shipman is important to analyze before comparing the contents of Shipman to the 14

21 claims of the 976 Patent. The following chart illustrates the specific language that Shipman uses to refer to certain key concepts of the 976 Patent: Terms from the 976 Patent BIOS modules Shipman (Ex. 1004) service components (e.g., Ex. 1004, p.1 Abstract)/ BIOS components (e.g., id., p.14, 3:5-8)/ components (e.g., id., p.15, 6:54-56) 1 : BIOS initialization code basic input/output system (BIOS) of a computer system are implemented via a number of independently executable service components. (Ex. 1004, Abstract). Beginning code that tests and initializes the memory controller related components (202). (Ex. 1004, p.18, 12:11-12). ROM The ROM (10) is a non-volatile device used to store the BIOS components (Id., p.14, 3:13-15) critical nonvolatile storage device system memory RAM System random access memory, RAM, (22) (Id., p.14, 3:50) dispatch manager decompression dispatcher Components are dispatched through a utility called the decompression dispatcher (Id., p.15, 5:4-5). Mr. Perla testifies: Shipman s decompression dispatcher performs two primary purposes: it decompresses BIOS modules and it dispatches the BIOS modules. ([Ex. 1001], p.14, 4:37-40 The decompression dispatcher is the component responsible for all dispatching activities including decompression ). The dispatching aspect of Shipman s decompression dispatcher functions like the dispatch manager of the 976 Patent. (Ex. 1012, p. 24, 61). 1 Shipman uses the terms component and module interchangeably. (e.g., Ex. 1004, p.15, 6:54-56). 15

22 As a POSITA would understand, the critical components of the 976 Patent were taught by Shipman in the prior art. As mentioned, Ground 1 combines Shipman with Harmer. Harmer discloses dividing up a BIOS program into a first portion and a second portion. (Ex. 1003, p.14, 5:39-43)( This embodiment includes ROM storage memory (peripheral ROM) for containing a first portion but not all of the expansion BIOS associated with the particular peripheral computer device ). The 976 Patent also characterizes Harmer in this way, stating that in Harmer: The host computer executes instructions contained in the first portion of the BIOS and reads the second portion of the BIOS (i.e., the entire BIOS) from the protected area of the hard disk drive into the system RAM. (Ex. 1001, p.6, 1:55-60). Like Shipman, Harmer divides the BIOS into separate segments. However, Harmer demonstrates the idea and the need to store some portions of BIOS in a second memory device. (Ex. 1003, p.14, 5:42-46; see also Ex. 1001, p.6, 1:42-47). Specifically, Harmer encourages a POSITA to store some BIOS in secondary memory in order to reduce or eliminate the cost of expansion BIOS ROM associated with the secondary memory when that secondary memory is a peripheral computer device. (Ex. 1012, p. 36, 103; Ex. 1003, p.13, 4:63-67). Expansion BIOS is a memory space in addition to the BIOS ROM and it is used to support newly-added BIOS modules. (Ex. 1012, p. 50, 151). As Harmer 16

23 states, expansion ROM may be costly, and accordingly, Harmer solves this problem by using a mass storage device other than the expansion ROM to store expansion BIOS. (Ex. 1003, p.13, 4:57-61, 4:63-67). A POSITA would be motivated to combine the relevant teachings of Shipman and Harmer. (Ex. 1012, pp. 37, 53, 55, 107, 163, 169). Shipman discloses a decompression dispatcher that dispatches BIOS modules from ROM to RAM. (Ex. 1004, p.2, FIG. 1). Harmer discloses the ability to distribute BIOS modules for storage in different memory devices (e.g., BIOS ROM and mass storage device). (Ex. 1003, p.13, 4:57-61, 4:63-67). Given this ability, it would be obvious for a POSITA to store some of Shipman s BIOS modules in different storage devices to reduce the cost of BIOS memory. (Ex. 1012, p. 52, 162). For example, if more BIOS modules are needed in Shipman, mass storage devices can be used to store these additional modules instead of attempting to increase the size of the expansion ROM to support additional modules. (Ex. 1012, p. 50, 151). The purpose of a modular BIOS is to allow the flexibility of adding, removing, and developing new BIOS modules. (Ex. 1012, pp , 29, item 3). With space as a concern, Harmer instructs a POSITA to consider using memory devices other than the expansion BIOS to offset the cost of storage. (Ex. 1012, p. 50, 151). The Shipman-Harmer combination renders the claims of the 976 Patent obvious. The combination of familiar elements according to known methods is 17

24 likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 416 (2007). In Graham v. John Deere Co., 383 U.S. 1 (1966), the United States Supreme Court clarified the nonobviousness requirement in United States patent law, set forth in 35 U.S.C The Court held that 103 required a determination of the scope and content of the prior art, the differences between the claimed invention and the prior art, and the level of ordinary skill in the prior art. (Id. at 17-18). In addition, secondary considerations may, in appropriate cases, serve as evidence of nonobviousness. (Id.). A basis to combine teachings from the references need not be stated expressly in any prior art reference. In re Kahn, 441 F.3d 977, (Fed. Cir. 2006). There need only be an articulated reasoning with rational underpinnings to support a motivation to combine teachings. (Id. at 988). A detailed comparison of the Shipman-Harmer combination to the challenged claims reveals more particularly the basis for holding these claims unpatentable under 35 U.S.C Independent Claim 1 i. The preamble of claim 1 The preamble of claim 1 states: 18

25 A method for processing basic input output system (BIOS) modules of a computer having a central processing unit (CPU), a computer bus, and a critical nonvolatile storage device, comprising the steps of: (Ex. 1001, claim 1). Generally, a preamble does not limit the claims. Allen Eng g Corp. v. Bartell Indus., Inc., 299 F.3d 1336, 1346 (Fed. Cir. 2002). However, a preamble may be construed as limiting if it recites essential structure or steps, or if it is necessary to give life, meaning, and vitality to the claim. Catalina Mktg. Int l, Inc. v. Coolsavings.com, Inc., 289 F.3d 801, 808 (Fed. Cir. 2002). The preamble of claim 1 recites BIOS modules, a limitation that does not appear in the body of claim 1. However, this issue of whether the claims are limited to BIOS modules is of no consequence given the fact that Shipman discloses BIOS modules. (Ex. 1012, p. 25, 65-66). Shipman describes a method for processing BIOS modules by storing them in a ROM: The BIOS stored in a read only memory (ROM) is organized into a set of components. (Ex. 1004, p.13, 1:60-63). Shipman s components disclose the claimed BIOS modules. (Ex. 1012, p. 23, 58). In addition, FIG. 1 of Shipman (and its associated text) describe a computer with a CPU, a bus, and a critical nonvolatile storage device (e.g., a device that a CPU can use to execute an initial set of instructions, ROM, etc.). (Ex. 1012, p. 25, 67). A portion of FIG. 1 of Shipman, presented below, demonstrates a critical 19

26 nonvolatile storage device (e.g., ROM 10) storing BIOS modules (e.g., a BIOS that is organized into a set of BIOS components (32 through 54), each of which is capable of being dispatched as an independent executable object : (Ex. 1004, p.2, FIG. 1 and p.14, 3:5-8). When compared to the 976 Patent, an example of critical nonvolatile storage device, as used in claim 1 of the 976 Patent, is a flash memory, a ROM, or other device or technology that the CPU 11 can use to execute an initial set of instructions. (Ex. 1001, p.8, 5:3-9)(emphasis added). As the foregoing Figure 1 of Shipman illustrates, a ROM 10 exists within the computer which uses initial instructions to load various BIOS components, or modules. Shipman dispatches these BIOS modules from flash (e.g., ROM 10) to RAM (e.g., system memory). (Ex. 1004, p.11, FIG. 12, step 1212; p.19, 14:35-38). 20

27 Therefore, if and to the extent that the preamble has any patentable weight, the Shipman-Harmer combination teaches it, as it provides a POSITA a method for processing BIOS modules in a standard computing environment comprising at least a central processing unit (CPU), a computer bus, and a critical nonvolatile storage device. (Ex. 1012, p. 25, 65-67). ii. The first step of claim 1 The first step of claim 1 states: storing a predetermined small amount of BIOS initialization code in a first portion of the critical nonvolatile storage device that is operative to initialize the CPU and the system memory[.] (Ex. 1001, p.10, 9:50-10:4). First Shipman discloses storing a predetermined small amount of BIOS initialization code in a first portion of the critical nonvolatile storage device. Shipman s modular BIOS is described in FIG. 2. (Ex. 1004, p.3, FIG. 2, p.13, 2:32-33). The very beginning of Shipman s process begins at step 202 where Shipman executes code that tests and initializes the memory controller related components. (Ex. 1004, p.18, 12:10-12). A POSITA would understand that the initialization code of step 202 is the beginning routine that is executed upon powering on a computer. (Ex. 1012, pp. 27, 18, 72, 41). 21

28 After Shipman executes the initialization code in step 202, Shipman initializes a decompression dispatcher (step 204) and dispatches BIOS modules (step 206). (Ex. 1004, p.18, 12:13-16). These BIOS modules include initialization modules such as POST. (Id., see also p.14, 4:53-54). To this end, Shipman executes some small initialization code in step 202, and then executes other initialization code as BIOS modules, which are handled by a dispatch manager. (Id.; see also p.3, FIG. 2, items 204 and 206). Shipman s scheme of dividing its initialization code demonstrates Shipman s intent to minimize its BIOS initialization code before its remaining initialization modules are dispatched. (Ex. 1004, p.18, 12:13-16). Therefore, Shipman suggests that its BIOS initialization code in step 202 is small. (Ex. 1012, p. 28, 75). To the extent that initialization code is not implicitly small, it would be obvious to minimize the initialization code in view of Harmer. Harmer teaches that the initialization code can be a small amount by describing an expansion BIOS that includes a small amount of initialization code 124. (Ex. 1003, p.16, 9:38-40). A POSITA would be motivated to combine Harmer with Shipman in order to minimize initialization code, which has the benefit of reducing the cost of the ROM as much as possible. (Ex. 1003, p.17, 11:42-45). 22

29 Next, claim element [1.1] further requires the BIOS initialization code to be operative to initialize the CPU and the system memory. A POSITA would understand that step 202 of FIG. 2 of Shipman suggests that both the CPU and system memory is initialized. (Ex. 1012, p. 26, 70). System memory must be initialized before content is copied to the system memory to ensure proper operation. (Ex. 1012, p. 26, 71). In other words, system memory initialization allows the system memory to be subsequently used. Because Shipman uses system memory, it must initialize it. (Id.). Shipman later dispatches BIOS modules to the system memory, which indicates that the system memory was initialized prior to the dispatching step. (Id.). This is suggested by Shipman, which initializes the memory controller and its related components. In addition, initializing the CPU immediately after power up has been a part of commercial personal computers (PCs) since the 1980s, such as the early IBM PCs. (Ex. 1012, p. 27, 72). Shipman also suggests the standard practice of initializing the CPU, by disclosing initializing the memory controller and its related components. (Ex. 1004, p.3, FIG. 2, step 202). To the extent that Shipman does not explicitly name the CPU and system memory (RAM) as the components that are subject to initialization, it would have been obvious to a POSITA to initialize these two components before initializing the remainder of the computer system. This is no more than applying the 23

30 conventional wisdom, popularized by commercially-available PCs prior to the time of invention. (Ex. 1012, pp , 71-72). It is important to initialize components before they are used. Thus, it would be obvious to initialize (at the very least) the system memory and CPU before the dispatch manager uses the system memory and CPU to dispatch BIOS modules. (Ex. 1012, p. 27, 73). In this respect, claiming to initialize the CPU and system memory is nothing more than a combination of familiar elements according to known methods that yield predictable results. KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 416 (2007). iii. The second step of claim 1 The second step of claim 1 states: storing a dispatch manager in a second portion of the critical nonvolatile storage device that is operative to selectively load and iteratively execute a predetermined number of tasks relating to complete initialization of the computer[.] (Ex. 1001, claim 1). Shipman s decompression dispatcher discloses this limitation. (Ex. 1012, pp , 81). Shipman describes storing a decompression dispatcher in the ROM. (Ex. 1004, p.2, FIG. 1 items 10 and 52). The decompression dispatcher is responsible for all dispatching activities (Ex. 24

31 1004, p.13, 1:37-40). Each of Shipman s modules is capable of being dispatched as an independent executable object. (Id., p.14, 3:5-8). The flowchart of FIG. 5 of Shipman illustrates that the decompression dispatcher selectively loads and iteratively executes the modules. (Id., p.5, at FIG. 5), and states that FIG. 5 is a flow diagram of how components are dispatched p.13, 2:39-40). For example, box 514 of FIG. 5 shows how one component is loaded and then, at box 516, a check is made to determine if there are more components to process. (Id., p.5, FIG. 5 and pp.18-19, 12:63-13:2). In addition, the modules are selected from a packing list or packing information. (Id., p.5, FIG. 5, step 512; Ex. 1012, pp , 82, 84). This inherently discloses the concept of loading modules selectively. (Ex. 1012, pp , 84). The flowchart of FIG. 5 also shows the selectively-loaded modules. (Ex. 1012, 82). Each BIOS module is independently executable. (Ex. 1004, p.14, 3:5-8). In step 522 of FIG. 5, the execution process checks whether a particular module is the last component actively dispatched. (Ex. 1012, p. 30, 83). Shipman also explicitly states that some of these modules include tasks relating to completing the initialization of the computer. (Ex. 1004, p.14, 3:8-10). Shipman refers to these modules as initialization components: Initialization components are dispatched during a Power On Self Test (POST) cycle such that the initialization components are active during initialization. The initialization 25

32 components are terminated prior to loading an operating system. (Ex. 1004, p.13, 1:66 2:3). Thus, the initialization components complete the initialization of the computer in order to load an operating system (OS). (Ex. 1012, p. 31, 85). Finally, Shipman s decompression dispatcher is operative to execute a predetermined number of tasks. When dispatching components the decompression dispatcher works from a packing list provided in the ROM image by the BIOS build process. (Ex. 1004, p.15, 5:27-29). A packing list provides a detailed description of the packing as well as other important pieces of information regarding the types of components. (Id., 5:32-34). A POSITA would understand that a packing list specifies a predetermined number of tasks. (Ex. 1012, pp , 84). In summary, a POSITA reading the Shipman and Harmer references would understand the concept of storing a dispatch manager in a second portion of the critical nonvolatile storage device, which selectively loads and iteratively executes a predetermined number of tasks to complete the initialization of the computer. (Ex. 1012, p. 31, 85). iv. The third step of claim 1 The third step of claim 1 is turning on the computer. (Ex. 1001, p.10, 9:50-10:4). Shipman discloses: Computer systems are designed to perform functional tests of the BIOS every time the computer is turned on. (Ex. 1004, p.13, 1:16-18). Therefore, this claim limitation is met. (Ex. 1012, p. 31, 87). 26

33 v. The fourth step of claim 1 The fourth step of claim 1 states: [E]xecuting the predetermined small amount of BIOS initialization code to initialize the CPU and the system memory. (Ex. 1001, p.10, 9:50-10:4). As Shipman s flowchart of FIG. 2 shows, there is BIOS initialization code that is executed to test and initialize the memory controller. (Ex. 1004, p.3, FIG. 2, item 202). This is done prior to dispatching any modules as shown in step 206. (Id.). A POSITA would equate this teaching of Shipman with the performance of the fourth step of Claim 1. (See Ex. 1012, p. 32, 90). vi. The fifth step of claim 1 The fifth step of claim 1 states: [C]opying the dispatch manager from the critical nonvolatile storage device to the system memory. (Ex. 1001, p.10, 9:50-10:2). Shipman states that [t]he dispatcher data and executable code is copied (302) from the ROM to the RAM. (Ex. 1004, p.18, 12:17-19). A POSITA would understand that Shipman s RAM is system memory. (Ex. 1012, p. 32, 91). This is performed in step 206 of FIG. 2 after the step to test and initialize in box 202. (Ex. 1004, p.3, FIG. 2; Ex. 1012, p. 32, 91). vii. The sixth step of claim 1 The sixth step of claim 1 states: [E]xecuting the dispatch manager to execute the predetermined number of tasks to initialize the computer. (Ex. 1001, 27

34 p.10, 9:50-10:4). Shipman states that [i]nitialization components are dispatched during a Power On Self Test (POST) cycle such that the initialization components are active during initialization. The initialization components are terminated prior to loading an operating system. (Ex. 1004, p.13, 1:66 2:3). By terminating the initialization components (which execute initialization tasks), Shipman ensures that the computer completes initialization before an operating system is loaded. (Ex. 1012, p. 33, 93). A POSITA would understand this to teach the sixth step of Claim 1 because Shipman s decompression dispatcher executes a predetermined number of tasks (e.g., those initialization tasks of the initialization components in the packing list) to complete the initialization of the computer. (Ex. 1012, p. 33, 93; Ex. 1004, p.14, 3:8-11; p.14, 4:46-49). 2. Independent Claim 14 Independent claim 14 has all of the limitations of claim 1, and the additional limitation of: storing a predetermined number of BIOS modules on the secondary nonvolatile storage device that are operative to control operation of the computer[.] (Ex. 1001, p.11, 11:1-12:3). This limitation is directed to the concept of storing at least some BIOS modules in a nonvolatile memory that is different from the nonvolatile memory which stores the dispatch manager and initialization code. (Ex. 1012, p. 49, 149). Shipman discloses secondary nonvolatile memory as 28

35 disk drives. (Ex. 1004, p.13, 1:16). Shipman s disk drive is mass media storage that is nonvolatile and separate from the BIOS ROM. (Ex. 1012, p. 49, 149). Shipman also discloses storing BIOS modules in nonvolatile memory (e.g., BIOS ROM). (Ex. 1012, p. 49, 149). Harmer teaches using a secondary nonvolatile storage device (e.g., mass memory) to store a portion of the BIOS modules separate from the BIOS ROM memory which stores the initialization code. (Ex. 1012, pp , ). Specifically Harmer states: a first portion of the system BIOS is contained within a BIOS ROM located within the host computer. A second portion of the system BIOS is stored within the mass memory storage of the mass memory storage peripheral computer device[.] (Ex. 1003, p.14, 6:59-64). Harmer further explains that it handles the portion of BIOS of the secondary nonvolatile memory in a similar manner to the way it handles the portion of BIOS of the first nonvolatile memory: This second portion of system BIOS is retrieved and stored in system RAM in the same manner as the expansion BIOS stored within the mass memory storage as described previously. (Id., 6:64-67). In other words, distributing the BIOS among multiple memories has no unpredictable consequences. It would be obvious to a POSITA to store Shipman s modules in another memory such as Harmer s mass media storage. (Ex. 1012, pp , ). 29

36 This is sufficient to sustain an obviousness challenge because it provides an articulated reasoning with rational underpinnings as to why the teachings of the references may be combined. See In re Kahn, 441 F.3d at When the 976 Patent issued, prior art systems had peripheral components requiring their own BIOS modules. (Ex. 1012, pp , 150). These BIOS modules are needed for initializing the peripheral components and these modules were typically stored in expansion ROM, which is nonvolatile memory. (Ex. 1012, p. 50, 151). Harmer explains that, instead of using costly expansion ROM, secondary nonvolatile storages devices may be used to store these BIOS modules. (Ex. 1003, p.13, 4:20-22). Harmer encourages a POSITA to store some BIOS in secondary memory in order to reduce or eliminate the cost of expansion BIOS ROM associated with the secondary memory when that secondary memory is a peripheral computer device. (Ex. 1012, p. 50, 152; Ex. 1003, p.13, 4:63-67). By applying this rationale, it would be obvious to combine Shipman s teaching of storing a predetermined number of BIOS modules in a nonvolatile storage device with Harmer s usage of storing such modules in a secondary nonvolatile storage device. (Ex. 1012, pp. 50, 53, 152, 163). Moreover, Shipman explicitly describes BIOS modules (e.g., the run-time modules) being operative to control operation of the computer. (Ex. 1012, pp , 102). An example of a run-time module is one that includes a shutdown 30

37 handler, which controls the operation of the computer. (Ex. 1004, p.16, 7:1-7; Ex. 1012, pp , 102). Claim 14 also differs from claim 1 by requiring a protected area of the secondary nonvolatile memory. Harmer discloses this limitation by stating: In the case in which the mass memory storage is a hard disk drive, the portion of the expansion BIOS may be stored in a portion of the mass memory storage which is not user accessible. A variety of methods may be used to protect this portion of the hard drive from being accessed during normal operation of the hard drive. (Ex. 1003, p.19, 15:18-24). In addition to teaching this limitation of claim 14, Harmer also provides the rationale for modifying Shipman. For example, Harmer states that storing BIOS modules in a protected area was understood to be a preferred method because it prevents a user from accessing and potentially interfering with the BIOS modules when using the secondary nonvolatile storage device during normal operation. (Id.). For all of the foregoing reasons, Claim 14 is obvious to a POSITA in view of the Shipman-Harmer combination. (Ex. 1012, p. 55, 171). 3. Dependent Claim 2 Dependent claim 2 recites limitations that are similar to the limitations of claim 14. Therefore, claim 2 is obvious for the same reasons claim 14 is obvious. 31

38 4. Dependent Claim 3 Dependent claim 3 further limits claim 1 by adding three steps to the claimed dispatch manager. i. The first step of claim 3 The first step of claim 3 is determining which BIOS modules are required for operation of the computer. Shipman describes a packing list used to determine which modules are required to be loaded and executed. (Ex. 1012, pp , 110). Shipman states that a packing list describes all the attributes of the packed ROM image. This list is used by the decompression dispatcher to dispatch components. (Ex. 1004, p.14, 4:33-36). Also, Shipman s flowchart of FIG. 6 explains how a list pointer is fetched and checked to determine if all modules are processed. (Ex. 1004, p.19, 13:8-14). These teachings satisfy the first step of Claim 3. (Ex. 1012, pp , 110). ii. The second step of claim 3 The second step of claim 3 is determining if a required BIOS module is stored in the system memory. In other words, this step refers to the dispatch manager determining whether the module has been dispatched to RAM. (Ex. 1001, p.7, 3:16-20). 32

39 Shipman explains that it checks if each component is actively dispatched. (Ex. 1004, p.15, 5:14-16). Actively dispatched, as it is used in Shipman, means that the module is stored in RAM and ready for execution. (Ex. 1004, p.15, 5:14-16; Ex. 1012, p. 38, 112). Accordingly, Shipman determines if a required BIOS module is stored in the system memory. (Ex. 1012, p. 38, 112). iii. The third step of claim 3 The third step of claim 3 is executing the BIOS module if the required BIOS module is in memory. Following the flowchart of FIG. 2, after Shipman checks if a component is actively dispatched (e.g., decompressed and stored in system memory), Shipman executes the module in step 522. (Ex. 1004, p.19, 13:3-7). iv. The fourth step of claim 3 The fourth step of claim 3 is copying the required BIOS module from the secondary nonvolatile storage device to the system memory if the required BIOS module is not in memory, and executing the copied BIOS module. A POSITA understands that Shipman loads and executes BIOS modules from ROM to RAM when the BIOS module has yet to be dispatched. (Ex. 1012, p. 38, 113). For example, Shipman dispatches the BIOS modules into RAM by copying them from ROM to RAM. (Ex. 1004, p.19, 14:35-38). In addition, dispatching on an as needed basis constitutes loading of required (as opposed to all) modules based 33

40 on a specific condition; for example, when a module(s) is not in memory. (Ex. 1012, pp , 117). Shipman s flowchart of FIG. 5, at step 516, shows how the dispatch manager continues to check whether every selected component has been uncompressed and loaded into system RAM. (Ex. 1004, p.5, FIG. 5, step 516). As mentioned above, loaded means loaded into system RAM. Therefore, Shipman ensures that unloaded modules are copied to system RAM and executed if they have not already been loaded and executed. (Ex. 1012, pp , 117). Harmer teaches the use of loading modules from a secondary nonvolatile memory device. (Ex. 1003, p.14, 6:60-65). As Mr. Perla testifies, [i]t would be obvious to copy the required BIOS module from the secondary nonvolatile storage device based on the combined teachings of Shipman and Harmer. (Ex. 1012, p. 41, 120). Both references load BIOS modules from nonvolatile storage. (Ex. 1012, p. 41, 121). Harmer explains the benefits and incentives a POSITA to store some BIOS modules in a secondary nonvolatile storage device. (Ex. 1003, p.13, 4:45-49). Specifically, Harmer states the cost savings of using a secondary nonvolatile storage device instead of an expansion ROM. (Id.). v. The fifth step of claim 3 The fifth step of claim 3 is repeating the previous three steps until all required BIOS modules are copied and executed. Shipman discloses the iterative 34

41 process of checking to determine if all components are loaded and executed. (Ex. 1004, p.18, 12:55-56 and p.5, FIG. 5). 5. Dependent Claims 4 and 15 Dependent claims 4 and 15 recite limitations that are similar to the limitations of claim 3. Therefore, claims 4 and 15 are obvious for reasons similar to why claim 3 is obvious. 6. Dependent Claims 5, 8-12, and 16 Dependent claims 5, 8-13, and 16 specify the type of secondary nonvolatile storage device. The secondary nonvolatile storage device can be a hard disk (claim 5), a flash memory (claim 8), a compact disk ROM (claim 9), a floppy disk drive (claim 10), a zip disk drive (claim 11), a superdisk drive(claim 12), or any selection of the above (claim 16). In effect, these dependent claims offer nothing more than well-known, commercially available options of popular mediums of nonvolatile storage devices. When there is a design need or market pressure to solve a problem and there are a finite number of identified, predictable solutions, a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. See KSR, 550 U.S. at 421. Here, there is a design need for storing BIOS modules of 35

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