High-Yield Repairing Algorithms for 2D Memory with Clustered Faults

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1 High-Yield Repairing Algorithms for 2D Memory with Clustered Faults Tsung-Chu Huang ( 黃宗柱 ) Department of Electronic Engineering National Changhua University of Education

2 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 2 T.-C. HUANG, NCUE

3 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 3 T.-C. HUANG, NCUE

4 Magnetic Core RAM By the early 1960 s, Magnetic Core RAM became largely universal as main memory, replacing drum memory. High-Yield Repairing Algorithms 4 T.-C. HUANG, NCUE

5 Magnetic Core RAM The memory cells consist of wired threaded tiny ferrite rings (cores). X and Y lines to apply the magnetic filed. Sense/Inhibit line to read the current pulse when the polarization of the magnetic field changes. High-Yield Repairing Algorithms 5 T.-C. HUANG, NCUE

6 Dynamic RAM (DRAM) Each bit of data is stored in a separate capacitor within an integrated circuit Volatile The highest density RAM currently available The least expensive one Moderately fast High-Yield Repairing Algorithms 6 T.-C. HUANG, NCUE

7 Static RAM (SRAM) Each bit is stored on four transistors that form two cross-coupled inverters Expensive Volatile Fast Low power consumption Less dense than DRAM High-Yield Repairing Algorithms 7 T.-C. HUANG, NCUE

8 Flash Memory Stores information in an array of memory cells made from floating-gate transistors Cheap Non-volatile Slow Enormously durable Limited endurance High-Yield Repairing Algorithms 8 T.-C. HUANG, NCUE

9 Phase Change Memory (PCM) Changes amorphous or crystaline phases by thermal current Emerging High density Nonversatile (source: wikipedia) High-Yield Repairing Algorithms 9 T.-C. HUANG, NCUE

10 Memory Families Introduction (Source: ITRS2010) High-Yield Repairing Algorithms 10 T.-C. HUANG, NCUE

11 Memory Families (Source: ITRS2010) High-Yield Repairing Algorithms 11 T.-C. HUANG, NCUE

12 Importance of Memory Repairing ITRS: Memory occupies 87% by 2014 TISA: > 33% of Semiconductor product 100% ROM, SRAM, 90% 80% 70% 60% 50% 40% 30% %Area New Logic %Area Reused Logic %Area Memory and/or DRAM 20% 10% 0% High-Yield Repairing Algorithms 12 T.-C. HUANG, NCUE

13 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 13 T.-C. HUANG, NCUE

14 Tunnel Magnetoresistance (TMR) Two thin films of altering ferromagnetic materials and an insulating spacer. Fe/MgO/Fe junctions reach over 200% decrease in electrical resistance at room temperature 600 (room temperature)-1100 (4.2 K) % TMR at junctions of CoFeB/MgO/CoFeB High-Yield Repairing Algorithms 16 T.-C. HUANG, NCUE

15 MRAM One of the two plates is a permanent magnet set to a particular polarity, the other's field will change to match that of an external field. High-Yield Repairing Algorithms 20 T.-C. HUANG, NCUE

16 Basic NOR-Type Array High-Yield Repairing Algorithms 33 T.-C. HUANG, NCUE

17 Basic MRAM Structures Conventional Structure with WWL + RWL Single WL Structure High-Yield Repairing Algorithms 37 T.-C. HUANG, NCUE

18 Fault Model Selected MJT Selected WWL Disturbed WWL High-Yield Repairing Algorithms 38 T.-C. HUANG, NCUE

19 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 39 T.-C. HUANG, NCUE

20 Yield 良率 $USD High-Yield Repairing Algorithms 40 T.-C. HUANG, NCUE

21 Importance of Memory Test Without test at stage k Cost wasted: (1-Y)(P k+1 -P k ) $1 $10 $100 Rule of Tens High-Yield Repairing Algorithms 41 T.-C. HUANG, NCUE

22 Importance of Memory Repair When chips are very small, assume the probability of defected chip is a Y=1- a Yield ( 良率 ) 100% Seed s Model Y e AD 0 Y Murphy s Model 1 e AD AD 2 20%!!! a=ad High-Yield Repairing Algorithms 42 T.-C. HUANG, NCUE

23 Wafer Test Tester Prober High-Yield Repairing Algorithms 43 T.-C. HUANG, NCUE

24 Final Test Logic Tester Load board High-Yield Repairing Algorithms 44 T.-C. HUANG, NCUE

25 Typical Model of Memory Array Row Address Decoder C: Cell Array Read/Write Logic D: Data A: Address Column Address Decoder High-Yield Repairing Algorithms 45 T.-C. HUANG, NCUE

26 Brief Introduction to March Test Zero-One Algorithm Check-board Algorithm March C Algorithm Demo using an Excel file Usually we need multiple algorithms to promote the test coverage High-Yield Repairing Algorithms 46 T.-C. HUANG, NCUE

27 Conventional Memory Test External memory test Typically 30M$/ATE Expensive! Clock Address Read/Write Data Go/NoGo (Pass/Fail) High-Yield Repairing Algorithms 47 T.-C. HUANG, NCUE

28 Conventional Memory Diagnosis External memory Diagnosis Clock Address Read/Write Data Faulty Cell Address (+ Fault Types) High-Yield Repairing Algorithms 48 T.-C. HUANG, NCUE

29 Pros and Cons of MRAM Low Yield Repair Low Dependability ECC High R/W Current Partitioned Power-Gating SiP 3D-IC (Source: ITRS2010) High-Yield Repairing Algorithms 49 T.-C. HUANG, NCUE

30 Yield and Dependability Combinatory Yield 100% 80% 60% Deterministic Faults Intermittent Errors SRAM Flash (soft errors) (disturbance) Memory Repairing Error Correction Codes 40% 20% 0% (disturbance) MRAM kb Mb Gb Tb Pb Memory Capacity per Chip High-Yield Repairing Algorithms 50 T.-C. HUANG, NCUE

31 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 51 T.-C. HUANG, NCUE

32 Fault Models Fault (Type) Model Stuck-At Faults More Serious for MRAM Coupling Faults Neighborhood-Pattern Sensitive Faults Transition Faults Retention Faults Fault Distributing Model Line Faults Row, Column Clustered Faults What else? Hypercube Faults?? High-Yield Repairing Algorithms 52 T.-C. HUANG, NCUE

Fault Distribution Model IFA (Inductive Fault Analysis) Fault

Decoder C: Cell Array 0 0 1 1 0 1 1 0 1 0 1 0 1 0 0 0 0 1 0 0 1 1 1

0 0 0 1 0 0 1 0 0 0 0 0 1 0 1 1 0 1 Read/Write Logic D: Data ECFA

33 Fault Distribution Model IFA (Inductive Fault Analysis) Fault Distributor A: Address Fault Models Massive Diagnoses Row Address Decoder C: Cell Array Column Address Decoder Read/Write Logic D: Data ECFA (Effect-Cause Fault Analysis) High-Yield Repairing Algorithms 53 T.-C. HUANG, NCUE

34 Early Distribution Models Fault Types: Uniformly Random Faults Line Faults Word-Line (Row) Bit-Line (Column) Some Previous Work: CRESTA, 2000 [6] BRAVES, 2003 [3] Fault Distributor, 2007 [13] High-Yield Repairing Algorithms 54 T.-C. HUANG, NCUE

35 Recent Distribution Models Additional Fault Type: + Clustered Faults Major Previous Work: MESP/Divided-Lines, 2010 [11] High-Yield Repairing Algorithms 55 T.-C. HUANG, NCUE

36 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 56 T.-C. HUANG, NCUE

37 Conventional Memory Repair Laser Fusing or Flash Programming Address Decoder 1 Word Line 0 Spare Word Line Laser Fusing (Source: GSI Group) Flash Programming High-Yield Repairing Algorithms 57 T.-C. HUANG, NCUE

38 BISR: Built-In Self-Repair A typical BISR scheme Q D ADR MAO EMA REF ERR FCA BIRA DNE CNT Wrapper ARU Main Memory CLK POR BIST Spare Memory High-Yield Repairing Algorithms 58 T.-C. HUANG, NCUE

39 BISR with Spare Rows Priority Encoder BCAM: Binary Content Addressable Memory High-Yield Repairing Algorithms 59 T.-C. HUANG, NCUE Spare Rows

40 Spare Rows and Columns Pri. En Priority Encoder 111 High-Yield Repairing Algorithms 60 T.-C. HUANG, NCUE

41 Row Adr. Dec. Conventional Memory Repair BCAM-based Remap n Col. Adr. Dec Adr. m+n m m M-row N-column Memory 15 Binary CAM BCAM s Spare Row Memory 0 1 Dio Hit High-Yield Repairing Algorithms 61 T.-C. HUANG, NCUE

42 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 62 T.-C. HUANG, NCUE

43 Hypercubes: Two 4-Cubes (Figures released from Google) High-Yield Repairing Algorithms 63 T.-C. HUANG, NCUE

K-Map representing a Hypercube A 5 A 4 A 3 A 2 A 1 A 0 000 001 011 010 110 111 101 100 000 001

44 K-Map representing a Hypercube A 5 A 4 A 3 A 2 A 1 A Implicant Cover Subcube High-Yield Repairing Algorithms 64 T.-C. HUANG, NCUE

45 More Multi-Fault Occurrence Address Line Faults Row High-Yield Repairing Algorithms 65 T.-C. HUANG, NCUE

46 More Multi-Fault Occurrence Address Line Faults Column High-Yield Repairing Algorithms 66 T.-C. HUANG, NCUE

47 More Multi-Fault Occurrence Address Line Faults Cluster High-Yield Repairing Algorithms 67 T.-C. HUANG, NCUE

48 More Multi-Fault Occurrence Address Line Faults Scattered Clusters probably due to address fluctuation High-Yield Repairing Algorithms 68 T.-C. HUANG, NCUE

49 More Multi-Fault Occurrence Address Line Faults Scattered Clusters probably due to address fluctuation High-Yield Repairing Algorithms 69 T.-C. HUANG, NCUE

50 More Multi-Fault Occurrence Address Line Faults Scattered Clusters probably due to address fluctuation High-Yield Repairing Algorithms 70 T.-C. HUANG, NCUE

51 More Multi-Fault Occurrence Address Line Faults Scattered Clusters probably due to address fluctuation High-Yield Repairing Algorithms 71 T.-C. HUANG, NCUE

52 More Multi-Fault Occurrence Address Line Faults Scattered Clusters probably due to address fluctuation High-Yield Repairing Algorithms 72 T.-C. HUANG, NCUE

53 Proposed VERA Verifier/Estimator for Redundancy Analysis Conditional-Probability-based Fault Distributor Uniformed-distribution p=1-y o First Faulty Address Condictional Probabilty of Driven Cells of a Driving Cell at (13, 10) (good) p(row) p(col) p(cluster) p(cube) p(random) Poison Distribution 5 n trials High-Yield Repairing Algorithms 73 T.-C. HUANG, NCUE

54 Number of Blocks (Trials) Result Histogram 2 x #Good Blocks = 18,817 Original Yield = 18.8% #Faulty Blocks = 81,183 First-Fault Probability = Probability of Following Fault Types: - Random: Row: Column: Cluster: Cubic: Number of Faulty Cells per Memory Blocks High-Yield Repairing Algorithms 74 T.-C. HUANG, NCUE

55 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 75 T.-C. HUANG, NCUE

56 Basic Concept Diameter (degree) n of an n-cube faulty cell k Qm n e.g., ( ) k-cube (Max.) distance from node to cube m+n-cube Q m+n Q k Hamming distance High-Yield Repairing Algorithms 76 T.-C. HUANG, NCUE

57 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 77 T.-C. HUANG, NCUE

58 Row Adr. Dec. Hypercube-based Remapping n Col. Adr. Dec. Adr. m+n m+n m M-row N-column Memory Ternary CAM TCAM s Spare n-cube Memory 0 1 Dio m+n m+n Spare Col. Adr. Dec. Masked-Bit Concentrator Address Shifter Hit n High-Yield Repairing Algorithms 78 T.-C. HUANG, NCUE

59 from prior rows Proposed TCAM Design Mask-Bit-Readable TCAM Cell WL Mout0 Mout Qij A ij Aij 2314 BL BL WL of Spare Cube ML Mouti-1 Mouti Kij Kij KL BL BL KL MWL 233 RWmaski MATCHi Priority Encoder High-Yield Repairing Algorithms 79 T.-C. HUANG, NCUE

60 Address (Bubble) Shifter If matched by the TCAM comparison Extract the masked address bits to a sub-address Also called Masked Bit Concentrator Not necessarily in order but bijective (1-1) Base Address m+n Mask Bits m+n Address Shifter 1 0 X 1 X X 0 X TCAM n Remapped Address High-Yield Repairing Algorithms 80 T.-C. HUANG, NCUE

61 Swapper in the Address Shifter Swapper in Binary Sorting Network ( A j, K j ) ( A j 1, K j 1) ' ' ( A j, K j ) ' ( A j, K ' 1 j 1 ) Only 1 Level of CMOS gates for 1 Stage A B if A>B, otherwise A B A if A>B, otherwise B High-Yield Repairing Algorithms 81 T.-C. HUANG, NCUE

62 In-order Remapped Address Address Shifter using a Parallel Sorter(2n) 241 (A 0, K 0 )=(?, 0) a a a a a (A' 0, K' 0 )=(a, 1) a (A 1, K 1 )=(a, 1)? c?? c (A' 1, K' 1 )=(b, 1) b (A 2, K 2 )=(?, 0)?? c b? (A' 2, K' 2 )=(c, 1) c (A 3, K 3 )=(b, 1) b???? (A' 3, K' 3 )=(d, 1) d (A 4, K 4 )=(?, 0) c?? c b (A' 4, K' 4 )=(0, 0) (A 5, K 5 )=(c, 1)?? b? d (A' 5, K' 5 )=(0, 0) (A 6, K 6 )=(?, 0)? b? d? (A' 6, K' 6 )=(0, 0) (A 7, K 7 )=(d, 1) d d d?? (A' 7, K' 7 )=(0, 0) Extracting the sub-address IN ORDER. High-Yield Repairing Algorithms 82 T.-C. HUANG, NCUE

63 Address Shifter using a Bitonic Sorter Parallel Sorter Half-Cleaner #inputs N n =log 2 N Parallel Sorter New Concentrator %Red. (Area) (Time) Extracting the sub-address IN BIJECTION. High-Yield Repairing Algorithms 83 T.-C. HUANG, NCUE

64 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 89 T.-C. HUANG, NCUE

65 Eg. Essential Spare Pivoting [3] Essential Essential Valid High-Yield Repairing Algorithms 90 T.-C. HUANG, NCUE

66 HYPERA (Redundancy Analysis) Modified Quine-McCluskey Algorithm Externally Repairing Repair-Rate Optimized Essential Cube Pivoting Algorithm Modified from Essential Spare Pivoting Algorithm for Hypercube-based Architecture Reduce the BIRA Complexity in a greedy manner. High-Yield Repairing Algorithms 91 T.-C. HUANG, NCUE

67 Modified QMA for External Analysis 1. Let the maximum degree of spare subcubes be n. Initialize all faulty cell addresses as subcubes of degree d 1 = Sort all subcubes of degree d 1 by weight. 3. Select any pair of subcubes q 1 of degree d 1 and q 2 of degree d 2 < d 1 if d 1 + d 2 ; merge them into a subcubes q of degree d if d 2 n = deg(sparecube). 4. Increment d 1 by 1. if d 1 n then go to step Execute the Essential Tabular Process (ETP) for all subcubes over all minterms. High-Yield Repairing Algorithms 92 T.-C. HUANG, NCUE

68 Modified QMA for External Analysis FCA Imp1 V V Imp2 V V V V Imp3 V V Karnaugh Map : Don t Care Essential Table Espresso High-Yield Repairing Algorithms 93 T.-C. HUANG, NCUE

69 Row Address Example 1 of MQMA Column Address External Analysis Using an optimum algorithm Modified Quine-McKluskey Algorithm Ternary Subcube Address (Cell Address in Octal System) High-Yield Repairing Algorithms 94 T.-C. HUANG, NCUE S 0 S 1 S

70 Heuristics of proposed ECPA within threshold degree existing repaired cells row or column subcube Essential maximum subcube cluster faulty cell detected within threshold radius r High-Yield Repairing Algorithms 95 T.-C. HUANG, NCUE

71 Proposed ECP Algorithm 1 initialize; 2 for each faulty cell address A{ 3 for each spare cube (C, V, E){ 4 if(v) 5 if(e) repaired by merging A to C; 6 else if A and C in a row/col/cluster(r) or d t<n 7 set Essential E and merge A to C; 8 else set Valid V and store C = A; 9 break; 10 } 11 if unrepaired for each non-essential cube C { 12 if(max_dist(a, C) n) set Essential and merge A to C;} 13 if unrepaired, failed and exit; 14 } 15 expand non-essential cubes with degree n; 16 set all Essential; 17 success; High-Yield Repairing Algorithms 96 T.-C. HUANG, NCUE

72 Example: Essential Cube Pivoting Spare cube 0 Spare cube 1 Spare cube 2 Spare cube V E V E V E V E High-Yield Repairing Algorithms 97 T.-C. HUANG, NCUE

73 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 98 T.-C. HUANG, NCUE

74 Number of Blocks (Trials) Case Study for Evaluation 2 x #Good Blocks = 18,817 Original Yield = 18.8% #Faulty Blocks = 81,183 First-Fault Probability = Probability of Following Fault Types: - Random: Row: Column: Cluster: Cubic: Number of Faulty Cells per Memory Blocks High-Yield Repairing Algorithms 99 T.-C. HUANG, NCUE

75 Repair Rate (%) Case Evaluation Repair Rate = 99.8% MQMA/External Repair Rate = 95% ECPA/BIRA Yr = 100% Yr = 96% Proposed MQMA Proposed ECP MESP in [11] ESP in [3] Spare Size (equivalent rows) Yo = 18.8% High-Yield Repairing Algorithms 100 T.-C. HUANG, NCUE

76 Layout (1/2) A 16K-Word Case (TVLSI2010SKLu, followed-up) High-Yield Repairing Algorithms 101 T.-C. HUANG, NCUE

77 Layout (2/2) MBIST: HOY s BRAINS RF: Artisan s Compiler CBD: Synopsys s DC P&R: Synopsys s SE Editor: Virtuoso/Cadence Status: Ready for small cases (128KB) Tutorial available Under verification Tape-in on Aug. High-Yield Repairing Algorithms 102 T.-C. HUANG, NCUE

78 Faulty Row Adr. Dec. Product Grading n Col. Adr. Dec. Adr. m+n m+n m M-row N-column Memory Ternary CAM TCAM s Spare n-cube Memory 0 1 Dio m+n m+n Spare Col. Adr. Dec. Masked-Bit Concentrator Address Shifter Hit n High-Yield Repairing Algorithms 103 T.-C. HUANG, NCUE

79 Outline Introduction Introduction to Memory Introduction to Magnetoresistive RAM Introduction to Memory Test Fault-Distributive Modeling Previous Work Effect-Cause Fault Analysis Proposed HYPERA Remapping Architecture Repairing Algorithms Redundancy Analysis Conclusions High-Yield Repairing Algorithms 104 T.-C. HUANG, NCUE

80 Conclusions A Hypercube-based Remapping Architecture and Efficient Algorithms are proposed. Repairing Rates can be highly improved up to almost 100%. Area overhead is small. Time penalty is still an issue. Effective yield can be still improved by sorting and disabling the access multiplexer for grade-a product. High-Yield Repairing Algorithms 105 T.-C. HUANG, NCUE

81 Our Sparrows Small as the sparrow is, it possesses all its internal organs. ( 麻雀雖小, 五臟俱全 ) -- Chinese sayings High-Yield Repairing Algorithms 106 T.-C. HUANG, NCUE

82 References 1. A. Allan et. al. Test and test equipment, in 2009 technology roadmap for semiconductors, p.29, TST-6, Y. Zorian and S. Shoukourian, Embedded-Memory Test and Repair: Infrastructure IP for SoC Yield, IEEE Design & Test of Computers, vol. 20, no. 3, May-June 2003, pp C.-T. Huang, C.-F. Wu, J.-F. Li, and C.-W. Wu, Built-In Redundancy Analysis for Memory Yield Improvement, IEEE Trans. on Reliability, vol. 52, no. 4, Dec. 2003, pp L.-T. Wang, C.-W. Wu and X. Wen. "VLSI Test Principles and Architectures." ISBN 10: , NY, Elsevier, P. Mazumder and Y. S. Jih, A new built-in self-repair approach to VLSI memory yield enhancement by using neural-type circuits, IEEE Trans. CAD IC Circuits Syst., vol. 12, no. 1, pp , Jan T. Kawagoe, J. Ohtani, M. Niiro, T. Ooishi, M. Hamada, and H. Hidaka, A built-in self-repair analyzer (CRESTA) for embedded DRAMs, in Proc. of IEEE International Test Conference, pp , October W. Jeong, T. Han and S. Kang. An Advanced BIRA using parallel sub-analyzers for embedded memories. In Proc. IEEE International SoC Design Conference, pp , S. Hamdioui and A. J. van de Goor, Efficient Tests for Realistic Faults in Dual-Port SRAMs, IEEE Trans. on Computers, vol. 51, no. 5, May 2002, pp Y. N. Shen, N. Park, and F. Lombardi, Spare Cutting Approaches for Repairing Memories, Proceedings of IEEE International Conference on Computer Design: VLSI in Computers and Processors, Austin, Texas, USA, pp , October M. Lee and C.-W. Wu, Method for Repairing Memory and System thereof. ROC Patent No , disclosed on May 16, S.-K. Lu, C.-L. Yang, Y.-C. Hsiao and C.-W. Wu. Efficient BISR Techniques for Embedded Memories Considering Cluster Faults. IEEE Trans. on VLSI, vol. 18, no.2, pp , R. Nair, S.M. Thatte and J.A. Abraham, "Efficient Algorithms for Testing Semiconductor Random- Access Memories", IEEE Transactions on Computers, Vol. C-27, No. 6, June 1978, pp P. Ohler, S. Hellebrand, and H.-J. Wunderlich, An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy, in Proc. of the 12th IEEE European Test Symposium, pp , May T.-C. Huang, An Address Remapping Architecture and Memory Repairing Method thereof, ROC Patent , Nov. 30, M. Malek, A. Mourad and M. Pandya, Topological Testing, in Proc. International Test Conference, pp , J. Bruck and C.-T. Ho, Fault-Tolerant Cube Graphs and Coding Theory, IEEE Trans. Information Theory, vol.42, no.6, pp , K.E. Batcher, Sorting networks and their applications, in Proc. the AFIPS Spring Joint Computer Conference, vol.32, pp , M. S. Paterson, Improved sorting networks with O(log N) depth, Algorithmica vol.5, no. 1, pp , E. J. McCluskey, Minimzatlon of Boolean functions, J. Bell Syst. Tech., vol.35, no.5, pp , L. Kraus and I. P. Batinic. Built-in spare row and column replacement analysis system for embedded memories, US Patent No. 6,304,989, Oct. 16, High-Yield Repairing Algorithms 107 T.-C. HUANG, NCUE

83 Thank you for your attention! High-Yield Repairing Algorithms 108 T.-C. HUANG, NCUE

Near Optimal Repair Rate Built-in Redundancy Analysis with Very Small Hardware Overhead

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