Supercomputers: Design and Applications

Transcription

1 R01 C. Gordon Bell, J. Craig Mudge, and John E. McNamara, Computer Engineering A DEC View of Hardware Systems Design, Digital Equipment Corporation, 1978 ISBN R02. J. Hayes, Computer Architecture and Organization, McGraw-Hill, R03. Vincent P. Heuring and Harry F. Jordan, Computer Systems Design and Architecture, Prentice-Hall, 1997, ISBN X R04 Daniel P. Siewiorek, C. Gordon Bell, and Allen Newell, Computer Structures: Principles and Examples, McGraw-Hill Book Company, 1982 ISBN R05 William Stallings, Reduced Instruction Set Computers, An IEEE Tutorial The Computer Society Press, IEEE Computer Society, Loc Vaqueros CA, 1986 IEEE Catalog Number , ISBN R06 William Stallings, Computer Organization and Architecture: Designing for Performance, Prentice Hall, 2010, ISBN R07. Encyclopedia Britannica, R08. The Oxford English Dictionary, Second Edition, Clarendon Press, Oxford (England), ISBN R09. Paul E. Ceruzzi, Reckoners: The Prehistory of the Digital Computer, from Relays to the Stored Program Concept, , Greenwood Press, Westport Connecticut, 1983 ISBN R10. The Oxford English Dictionary, Oxford at the Clarendon Press, R11. Readings in Computer Architecture, edited by Mark D. Hill, Norman P. Jouppi, and Gurindar S. Sohi, Morgan Kaufmann Publishers, 2000, ISBN R12 Introduction to Minicomputer Networks, Digital Equipment Corporation, 1971 R13 PDP 11 Peripherals and Interfacing Handbook, Digital Equipment Corporation, 1971 R14 PDP 11 Peripherals Handbook, Digital Equipment Corporation, 1976 R15 R16 Andrew S. Tanenbaum, Structured Computer Organization, (Fifth Edition, published by Pearson/Prentice Hall in 2006; ISBN Miles J. Murdocca and Vincent P. Heuring, Principles of Computer Architecture, Prentice-Hall, ISBN Page 638

2 R46 C. J. Bashe, W. Buchholz, et. al., The Architecture of IBM s Early Computers, IBM J. Research & Development, Vol. 25(5), pages , September R50 P. M. Davies, Readings in Microprogramming, IBM Systems Journal, 1972 (Number 1), pages R51 S. G. Tucker, Microprogram Control for System/360, IBM Systems Journal, Volume 6, No. 4 (1967), pages R56 Articles on pages 18 and 50 of Computerworld, February 20, 2006 R57 R58 R60 R61 R62 R63 G. M. Amdahl, G. A. Blaauw, and F. P. Brooks, Architecture of the IBM System/360, IBM Journal of Research and Development (April 1964). Reprinted in Readings in Computer Architecture, edited by Mark D. Hill [R11]. J. S. Liptay, Structural Aspects of the System/360 Model 85, Part II: The Cache, IBM Systems Journal, 7(1), 15 21, 1968, Reprinted in Readings in Computer Architecture, edited by Mark D. Hill [R11]. John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kauffman Publishers, ISBN S. Mazor, The History of the Microcomputer Invention and Evolution, Proceedings of the IEEE, pp , Dec Reprinted in R11. M.A. McCormack, T.T. Schansman, and K.K. Womack, "1401 Compatibility Feature on the IBM System/360 Model 30," Communications of the ACM, v. 8, n. 12, 1965, pp S.G. Tucker, "Emulation of Large Systems," Communications of the ACM, v. 8, n. 12, 1965, pp R64 Doug Abbot, PCI Bus Demystified, Elsevier, 2004, ISBN R65 R66 R67 Randal E. Bryant & David R. O Hallaron, Computer Systems, A Programmer s Perspective, Prentice Hall, 2011, ISBN John D. Carpinelli, Computer Systems, Organization & Architecture, Addison Wesley Longman, 2001, ISBN Carl Hamacher, Zvonko Vranesic, and Safwat Zaky; Computer Organization, McGraw Hill, 2002, ISBN Page 639

3 R68 R69 R70 R71 David B. Kirk & Wen mei W. Hwu, Programming Massively Parallel Processors, Elsevier/Morgan Kaufmann, 2010, ISBN Betty Prince, High Performance Memories: New Architecture DRAMs and SRAMs Evolution and Function, John Wiley & Sons, 1999, ISBN Tom Shanley & Don Anderson, ISA System Architecture, Addison Wesley, 1995, ISBN Ton Shanley & Don Anderson, PCI System Architecture, Addison Wesley, 1999, ISBN R72 Sajjan G. Shiva, Computer Design & Architecture, Harper Collins, 1991, ISBN R73 R78 R79 R80 R81 R82 R84 Rob Williams, Computer Systems Architecture: A Networking Approach, Pearson/Prentice Hall, 2006, ISBN Denning, P., The Working Set Model for Program Behavior, Communications of the ACM, May Jonathan G. Koomey, Stephen Berard, Marla Sanchez, & Henry Wong; Assessing Trends in the Electrical Efficiency of Computation Over Time, Final Report to Microsoft Corporation and Intel Corporation, submitted to the IEEE Annals of the History of Computing on August 5, David A. Patterson & John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Morgan Kaufmann, 2005, ISBN Katherine Yelick, Multicore: Fallout of a Hardware Revolution. Tahir Ghani (Intel Fellow, Logic Technology Development), Challenges and Innovations in Nano CMOS Transistor Scaling, October Intel White Paper Solving Power and Cooling Challenges for High Performance, June R85 Geoff Koch, Intel s Road to Multi Core Chip Architecture, R91 R98 R99 The Datasheet (2gbddr2.pdf Rev F 12/10 EN) for the Micron DDR2 Memory Chip accessed through [R89]. Copyright 2006, revised in December C. D. Mee and E. D. Daniel, editors Magnetic Recording Technology, McGraw Hill, Bruce Jacob, Spencer W. Ng, and David T. Wang, Memory Systems: Cache, DRAM, Disk, Elsevier/Morgan Kaufmann, 2008, ISBN Page 640

4 R102 Douglas E. Comer, Computer Networks and Internets with Internet Applications, Pearson/Prentice Hall, ISBN R103 Douglas E. Comer and David L. Stevens, Internetworking with TCP/IP: Volume II (Design, Implementation, & Internals), Prentice Hall, ISBN R104 David A. Patterson, Reduced Instruction Set Computers, Communications of the ACM, Volume 28, Number 1, Reprinted in IEEE Tutorial Reduced Instruction Set Computers [R05], edited by William Stallings, The Computer Science Press, 1986, ISBN R106 Cray 1 Computer System Hardware Reference Manual Publication , Revision C, November, R107 R. M. Russell, The Cray 1 computer system, Communications of the ACM, 21(1):63 72, R108 Kai Hwang, Evolution of Modern Supercomputers, the introduction to Chapter 1 in the IEEE Tutorial Supercomputers: Design and Applications, ISBN R109 Harold S. Stone, High Performance Computer Architecture, Addison Wesley (Third Edition), ISBN R110 John Paul Shen and Mikko H. Lipasti, Modern Processor Design: Fundamentals of Superscalar Processors, McGraw Hill, ISBN R111 W. A. Wulf and S. P. Harbison, Reflections in a pool of processors / An experience report on C.mmp/Hydra, Proceedings of the National Computer Conference (AFIPS), June R112 Robert J. Baron and Lee Higbie, Computer Architecture, Addison Wesley Publishing Company, 1992, ISBN Page 641

5 References to Web Sites R17. R18. R19. R20. R21. R22. R23. R24. R25 R26 R27 R28 R29 R30 R31 R32 R33 R34 R35 R36 R37 R38 R39 R40 R41 R42. R43 R44 R45 R47 R48 R49 Page 642

6 R52 R53 R54 R55 R59 R74 R75 R76 R77 R83 R86 R87 R88 R "Memory Prices ( )" Shehzaad Kaka (National Institute of Standards and Technology): Past, Present, and Future of MRAM, presented at the THIC meeting on July 22 23, 2003 at Louisville, Colorado. Web link: According to its web site ( THIC, the Premier Advanced Storage Technology Forum, is a not for profit corporation registered in Illinois. David Patterson, EECS 252 Graduate Computer Architecture (Lecture 4 Memory Hierarchy Review), 1/30/2006, Single-chip-Cloud-Computer?aid= categorypath=products/parametric/dram/ddr2_sdram, accessed July 3, R90 accessed July 3, R92 accessed July 4, R93 November 1, 2010 R94 November 1, 2010 R95 1, 2010 R96 November 1, 2010 R97 accessed July 5, Page 643

7 R100 accessed July 7, R101 accessed June 28, R105 accessed July 11, R113 accessed July 12, R114 accessed July 12, R115 accessed July 12, Page 644