8051 Programming using Assembly
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1 8051 Programming using Assembly
2 The Instruction Addressing Modes dest,source ; dest = source A,#72H ;A=72H A, # r ;A= r OR 72H R4,#62H ;R4=62H B,0F9H ;B=the content of F9 th byte of RAM DPTR,#7634H DPL,#34H DPH,#76H P1,A ;mov A to port 1 Note 1: A,#72H A,72H After instruction A,72H the content of 72 th byte of RAM will replace in Accumulator AL,72H A,#72H AL, r A,# r BX,72H AL,[BX] A,72H Note 2: A,R3 A,3 2
3 Arithmetic Instructions ADD A, Source ;A=A+SOURCE ADD A,#6 ;A=A+6 ADD A,R6 ;A=A+R6 ADD A,6 ;A=A+[6] or A=A+R6 ADD A,0F3H ;A=A+[0F3H] 3
4 Set and Clear Instructions SETB bit ; bit=1 CLR bit ; bit=0 SETB C ; CY=1 SETB P0.0 ;bit 0 from port 0 =1 SETB P3.7 ;bit 7 from port 3 =1 SETB ACC.2 ;bit 2 from ACCUMULATOR =1 SETB 05 ;set high D5 of RAM loc. 20h Note: CLR instruction is as same as SETB i.e: CLR C ;CY=0 But following instruction is only for CLR: CLR A ;A=0 4
5 SUBB A,source ;A=A-source-CY SETB C SUBB A,R5 ;CY=1 ;A=A-R5-1 ADC A,source ;A=A+source+CY SETB C ;CY=1 ADC A,R5 ;A=A+R5+1 5
6 DEC byte ;byte=byte-1 INC byte ;byte=byte+1 INC R7 DEC A DEC 40H ; [40]=[40]-1 CPL A ;1 s complement Example: A,#55H ;A= B L01: CPL A P1,A ACALL DELAY SJMP L01 CALL NOP & RET & RETI All are like 8086 instructions. 6
7 Logic Instructions ANL byte/bit ORL byte/bit XRL byte EXAMPLE: R5,#89H ANL R5,#08H 7
8 Rotate Instructions RR A Accumulator rotate right RL A Accumulator Rotate left RRC A Accumulator Rotate right through the carry. RLC A Accumulator Rotate left through the carry. 8
9 Structure of Assembly language and Running an 8051 program ORG ADD ADD HERE: SJMP END 0H R5,#25H R7,#34H A,#0 A,R5 A,#12H HERE Myfile.lst Myfile.obj EDITOR PROGRAM ASSEMBLER PROGRAM LINKER PROGRAM OH PROGRAM Myfile.asm Myfile.abs Other obj file Myfile.hex 9
10 Memory mapping in 8051 ROM memory map in 8051 family 4k 8k 32k 0000H 0000H 0000H 0FFFH DS AT89C51 1FFFH 8752 AT89C52 7FFFH from Atmel Corporation from Dallas Semiconductor 10
11 RAM memory space allocation in the FH Scratch pad RAM 30H 2FH 20H 1FH 18H 17H 10H 0FH 08H 07H 00H Bit-Addressable RAM Register Bank 3 Register Bank 2 (Stack) Register Bank 1 Register Bank 0 11
12 8051 Flag bits and the PSW register PSW Register CY AC F0 RS1 RS0 OV -- P Carry flag Auxiliary carry flag Available to the user for general purpose Register Bank selector bit 1 Register Bank selector bit 0 Overflow flag User define bit Parity flag Set/Reset odd/even parity PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC -- RS1 RS0 OV -- P RS1 RS0 Register Bank Address H-07H H-0FH H-17H H-1FH 12
13 Instructions that Affect Flag Bits: Note: X can be 0 or 1 13
14 Example: ADD A,#88H A,#93H B CY=1 AC=0 P=0 Example: ADD A,#9CH A,#64H Example: A,#38H ADD A,#2FH F CY=0 AC=1 P=1 9C CY=1 AC=1 P=0 14
15 Register Indirect Addressing Mode In this mode, register is used as a pointer to the data. A,@Ri ; move content of RAM loc.where address is held by Ri into A ( i=0 or 1 In other word, the content of register R0 or R1 is sources or target in, ADD and SUBB insructions. Example: Write a program to copy a block of 10 bytes from RAM location sterting at 37h to RAM location starting at 59h. Solution: R0,37h R1,59h R2,10 L1: INC R0 INC R1 DJNZ R2,L1 ; source pointer ; dest pointer ; counter jump 15
16 Indexed Addressing Mode And On-Chip ROM Access This mode is widely used in accessing data elements of look-up table entries located in the program (code) space ROM at the 8051 C A,@A+DPTR A= content of address A +DPTR from ROM Note: Because the data elements are stored in the program (code ) space ROM of the 8051, it uses the instruction C instead of. The C means code. 16
17 Example: Assuming that ROM space starting at 250h contains Hello., write a program to transfer the bytes into RAM locations starting at 40h. Solution: ORG 0 DPTR,#MYDATA R0,#40H L1: CLR A C A,@A+DPTR JZ INC DPTR INC R0 SJMP L1 L2: SJMP L2 ; ORG 250H MYDATA: DB Hello,0 END Notice the NULL character,0, as end of string and how we use the JZ instruction to detect that. 17
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