8051 Instruction Set

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1 8051 Instruction Set 23-ug-16 1 Programmers Model of FH 30H 2FH 20H 1FH 00H General Purpose Bit addressable Register Banks 1FH 18H 17H 10H 0FH 08H 07H 00H R7 R6 R5 R4 R3 R2 R1 R0 R7 R6 R5 R4 R3 R2 R1 R0 R7 R6 R5 R4 R3 R2 R1 R0 R7 R6 R5 R4 R3 R2 R1 R0 Bank 3 Bank 2 Bank 1 Bank 0 (default) RS1,RS0=00 1. (CC) 2. B 3. PSW 4. P0 (Port 0) 5. P1 (Port 1) 6. P2 (Port 2) 7. P3 (Port 3) 8. DPH & DPL 9. DPTR 10. SP 11. TH0 & TL0 12. TH1 & TL1 13. TMOD 14. TCON 15. SCON 16. SBUF 17. PCON 18. IE 19. IP 23-ug-16 ptkarule@rediffmail.com 2 1

2 ddressing Modes General Instruction Format is Mnemonics <Destination>, <Source> Operation Operands The method by which address of source of data or address of destination of result is given in the instruction is called as addressing mode The 8051 supports 5 types of addressing modes 1. Immediate addressing mode 2. Register addressing mode 3. Direct addressing mode 4. Indirect addressing mode 5. Index addressing mode 23-ug-16 ptkarule@rediffmail.com 3 ddressing Modes (cont..) 1. Immediate addressing mode If 8/16 bit data required for executing the instruction is given in the instruction itself then it is called immediate addressing mode If hash (#) is used along with the number then it indicates that the number is a data. e.g. MOV R7,#54H ; store data 54H into register R7 54H 54H R7 2. Register addressing mode If 8/16 bit data required for executing the instruction is present in 8/16 register then name of register is used in the instruction as a operand then it is called register addressing mode e.g. MOV R1, R1 89H 23-ug-16 ptkarule@rediffmail.com 4 2

3 ddressing Modes (cont..) 3. Direct addressing mode If 8 bit data required for executing the instruction is present in memory location and 8 bit address of that memory location (internal RM) is directly given in the instruction then it is called direct addressing mode Direct addressing mode is used to give 8 bit address of internal RM (00H to 7FH) and address of SFRs (80H to FFH) e.g. MOV, 65H ; Transfer data of M.L. 65H to cc 65H CC 23-ug-16 ptkarule@rediffmail.com 5 ddressing Modes (cont..) 4. Indirect addressing mode If 8 bit data required for executing the instruction is present in memory location and address of that memory location (internal RM) is present in 8/16 bit register then register acts as a pointer and it is called indirect addressing mode Registers R0 and R1 are used to store 8 bit address of internal RM (00H to 7FH) / external RM. DPTR is used to store 16 bit address of external RM. is placed before the name of register to indicate that the register contains address. 65H e.g. MOV R0, #65H ; store address 65H into register R0 ; Transfer data of M.L. to cc R0 CC 65H 23-ug-16 ptkarule@rediffmail.com 6 3

4 ddressing Modes (cont..) 5. Index addressing mode Only program memory can be accessed by this mode. This mode is intended for reading LOOK-UP table in the program memory. 16 bit base address (given by DPTR or PC) points to the base of the look up table and the accumulator carries the constant indicating table entry number. The address of the exact location of the table is formed by adding ccumulator data with the base pointer. e.g. +DPTR ; DPTR=0200H, =05H DPTR H 0201H DPTR H 0203H 0204H 0205H 0206H 0207H X0 X1 X2 X3 X4 X5 X6 X7 X5 23-ug-16 ptkarule@rediffmail.com 7 General name used for operands Rn : Register R7-R0 of the currently selected Register Bank. direct: 8-bit internal data location s address. This could be an Internal Data RM location (0-127) or a SFR [i.e., I/O port,control register, status register, etc. :8-bit internal data RM location (0-255) addressed indirectly through register R1 or R0. #data :8-bit constant included in the instruction. #data 16 :16-bit constant included in the instruction bit :Direct ddressed bit in Internal Data RM or Special Function Register. 23-ug-16 ptkarule@rediffmail.com 8 4

5 General Name for Branching Operands addr 16: 16-bit destination address. Used by LCLL and LJMP instructions. branch can be anywhere within the 64k-byte Program Memory address space. addr 11: 11-bit destination address. Used by CLL and JMP instructions. The branch will be within the same 2kbyte page of program memory as the first byte of the following instruction. rel : Signed (two s complement) 8-bit offset byte. Used by SJMP and all conditional jump instructions. Range is 128 to +127 bytes relative to first byte of the following instruction. 23-ug-16 ptkarule@rediffmail.com 9 Instruction set Classification based on type of operation performed by the instruction Data Transfer Internal External Look-up table Stack rithmetic Logical Rotation Branching Bit Manipulation 23-ug-16 ptkarule@rediffmail.com 10 5

Data Transfer Operation 8 bit data is transferred from source to destination fter the operation, old data of destination is lost and destination holds new data which is a copy of source data Source

6 Data Transfer Operation 8 bit data is transferred from source to destination fter the operation, old data of destination is lost and destination holds new data which is a copy of source data Source Data # <Constant> Rn Ri Destination Data Rn Ri DPTR 23-ug-16 ptkarule@rediffmail.com 11 Data Transfer Instructions MOV, # data 8 2/1, Rn 1/1, direct 1/1 - MOV, #45H ; store data 45H into ccumulator MOV, R3 MOV, 62H ; Transfer data from M.L. to MOV R1, #62H ; Transfer data from M.L. to 23-ug-16 ptkarule@rediffmail.com 12 6

Data Transfer Instructions MOV Rn, # data 8 2/1 Rn, 1/1 Rn, direct 2/2 - MOV R1, #62H MOV R7, MOV R2, 45H ; Transfer data from M.L. to R2 45H 30H R2 30H 23-ug-16 ptkarule@rediffmail.

7 Data Transfer Instructions MOV Rn, # data 8 2/1 Rn, 1/1 Rn, direct 2/2 - MOV R1, #62H MOV R7, MOV R2, 45H ; Transfer data from M.L. to R2 45H 30H R2 30H 23-ug-16 ptkarule@rediffmail.com 13 MOV direct, # data 8 3/2 direct, 2/1 direct, Rn 2/2 direct,direct 3/2 2/2 - MOV 65H, #21H ; Store data 21H into M.L. MOV 67H, ; MOV 45H, R2 ; Transfer data to M.L. from R2 MOV 45H, 65H ; Transfer data from M.L. to ML 23-ug-16 ptkarule@rediffmail.com 14 7

MOV @Ri, # data 8 2/1 @Ri, 1/1 @Ri, direct 2/2 DPTR, #data 16 3/2 - MOV R1, #75H ; Store address 75H into R1 MOV

com 15 MOVX, @Ri 1/2, @DPTR 1/2 @Ri, 1/2 @DPTR, 1/2 MOVX instruction is used for data transfer between external RM

8 # data 8 direct 2/2 DPTR, #data 16 3/2 - MOV R1, #75H ; Store address 75H into R1 # ; Store data into ML 75H ; Store CC into ML 75H 65H ; Transfer data from M.L. to ML MOV DPTR, #2150H 23-ug-16 ptkarule@rediffmail.com /2 MOVX instruction is used for data transfer between external RM and e.g. MOV DPTR, #2150H 23-ug-16 ptkarule@rediffmail.com 16 8

e.g. MOV DPTR, #2150H MOVX, @DPTR ; Transfer data from external RM location ; 2150H to ccumulator. DPTR M.L. 2150H 2150H data data 8051 External RM 23-ug-16 ptkarule@rediffmail.

9 e.g. MOV DPTR, #2150H ; Transfer data from external RM location ; 2150H to ccumulator. DPTR M.L. 2150H 2150H data data 8051 External RM 23-ug-16 ptkarule@rediffmail.com 17 1/2 MOVC instruction is used for data transfer from Program Memory to CC. e.g.transfer 6 th data from Lookup table to ccumulator Starting address of Lookup table is 0200H MOV DPTR, #0200H ; Base address of LT MOV, #05H ; Get 6 th entry from LT 23-ug-16 ptkarule@rediffmail.com 18 9

e.g. MOV DPTR, #0200H MOV, #05H MOVC, @+DPTR ; Transfer data from Lookup table location to ccumulator.

10 e.g. MOV DPTR, #0200H MOV, #05H ; Transfer data from Lookup table location to ccumulator. DPTR H X5 0201H 0202H 0203H 0204H 0205H 0206H 0207H X0 X1 X2 X3 X4 X5 X6 X7 Program Memory 23-ug-16 ptkarule@rediffmail.com 19 XCH, Rn 1/1, direct 1/2 e.g. XCH, R3 ; Exchange data of R3 ; with ccumulator e.g. XCH, 45H ; Exchange data of ML CC ; with ccumulator R3 23-ug-16 ptkarule@rediffmail.com 20 10

11 1/1 Exchange 4 LSB of internal RM with 4 LSB of cc. e.g. Exchange 4 LSB of M.L. 62H with 4 LSB of cc MOV R0, #62H Before H fter H 23-ug-16 ptkarule@rediffmail.com 21 Stack Pointer (SP) Stack Pointer (SP) SP is 8 bit register. It holds address of top of the stack. Only internal 128 bytes RM can be used as a stack memory for storing stack of data. In 8051 the data is pushed into stack memory from lower address towards higher address. (Opposite of 8085) t power ON RESET 07H is stored in SP. 7FH First data is Pushed here SP 07H 09H 08H 07H 00H 23-ug-16 ptkarule@rediffmail.com 22 11

12 PUSH direct 2/2 Push (store) 8 bit data of RM Location into stack memory e.g. PUSH 45H 7FH 45H SP(new) SP(old) 09H 08H 07H 23-ug-16 ptkarule@rediffmail.com 23 POP direct 2/2 POP (get) 8 bit data from stack top e.g. POP 45H 7FH 45H SP(old) SP(new) 09H 08H 07H 23-ug-16 ptkarule@rediffmail.com 24 12

rithmetic Instructions DD, # data 8 2/1 DDC, Rn 1/1 SUBB, direct 2/1, @Ri 1/1 e.g.

13 rithmetic Instructions DD, # data 8 2/1 DDC, Rn 1/1 SUBB, direct 1/1 e.g. DD, #39H ;add immediate data DD, R2 ;add 8 bit data of R2 DD, 39H ;add 8 bit data of ML DDC, #32H ;add with carry SUBB, R3 ;Subtract with borrow R3 CF = 23-ug-16 ptkarule@rediffmail.com 25 rithmetic Instructions INC 1/1 DEC Rn 1/1 direct 1/1 Increment cc/reg/ml by 1 INC ; = + 1 Decrement cc/reg/ml by 1 DEC R2 ; R2 = R ug-16 ptkarule@rediffmail.com 26 13

14 rithmetic Instructions (cont..) MUL B 1/4 DIV B 1/4 D 1/1 e.g. MUL B ; X B = B DIV B ; / B = Q B R D ; Convert Invalid BCD in cc to ; Valid BCD 23-ug-16 ptkarule@rediffmail.com 27 14

Microcontroller Intel [Instruction Set]

Microcontroller Intel [Instruction Set] Microcontroller Intel 8051 [Instruction Set] Structure of Assembly Language [ label: ] mnemonic [operands] [ ;comment ] Example: MOV R1, #25H ; load data 25H into R1 2 8051 Assembly Language Registers