AT-501 Cortex-A5 System On Module Product Brief

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1 AT-501 Cortex-A5 System On Module Product Brief 1. Scope The following document provides a brief description of the AT-501 System on Module (SOM) its features and ordering options. For more details please contact 2. Overview The AT-501 is an industrial embedded System-On-Module (SoM) based on Atmel s new SAMA5D3 Cortex-A5 system on chip. It offers the optimal balance of the most power efficient Cortex A processor available to date with a high performance CPU running at 536 MHz and a floating point unit. It is designed as a ready to use embedded control and processing module for applications such as medical and industrial devices and due to its low power consumption is especially suited for battery powered appliances. The AT-501 uses the well-known 200 pins SO-DIMM form factor standard in order to reduce the connectivity cost to the carrier board.

2 3. Detailed description The following tables describe the capabilities of the AT-501 SOM and the available ordering options Processor and memory The following table shows the processors options of the AT-501, the default configuration is using the SAMA5D34. Processor Processor Atmel SAMA5D3 series Type CPU clock Instruction Cache Data Cache Security - Encryption Engine, TRNG SAMA5D31 Low cost option(does not support GE) SAMA5D34 LCD and GE support SAMA5D35 Enhanced Communication, no LCD support SAMA5D36 Enhanced Communication, LCD support Cortex TM -A5 with floating point unit 536MHz 32Kbytes 32Kbytes AES: 256-bit, 192-bit, 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications TDES: Two-key or Three-key Algorithms, Compliant with FIPS PUB 46-3 Specifications SHA: Supports Secure Hash Algorithm (SHA1, SHA224, SHA256, SHA384, SHA512) True Random Number Generator The AT-501 includes a build in RAM and ROM, the following table describes the supported configurations. - For applications that require a large storage, an external SD card can be used for both OS and local storage. 2 AT-501 Product brief 1.3

3 Memory RAM Flash emmc 32bits 166Mhz, 256 MB DDR2 Default configuration A larger RAM of 512MB can be ordered. 256 MB NAND Flash A larger Flash of 512MB/1GB can be ordered An option for build in emmc device either 4GB or 8GB 3.2. Debug Unit The built-in Debug Unit provides a single entry point from the processor for access to all the debug capabilities of Atmel s ARM-based systems. It can be accessed either via a dedicated UART or though JTAG interface. Debug Dedicated UART(Tx,Rx) JTAG The processor supports a dedicated RS-232 port for debug. A JTAG interface for ICE connectivity 3.3. Communication channels The Atmel SAMA5D3 processor offers a large variety of communication interfaces for both internal and external connectivity. - Note that due to multiplexing of some of the I/Os not all configuration options will be available. Communication Ethernet USART UART USB The SAMA5D34/35/D36 support a 10/100/1000 Ethernet with IEEE1588 support with build in physical layer chip The SAMA5D35/36 support additional 10/100 Ethernet port (RMII interface) The SAMA5D31 support 10/100 Ethernet port only 4x ports (Tx, Rx, CTS, RTS) 2x ports (Tx, RX) Supported on SAMA5D31/35/36 only USB v2.0 High Speed Compliant, 480 Mbits Per Second 3 AT-501 Product brief 1.3

4 3x interfaces (2 x Host, 1 x Host/Device) HS SD Card/SDIO/MMC CAN The High Speed Multimedia Card Interface (HSMCI) supports the MultiMedia Card (MMC) Specification V4.3, the SD Memory Card Specification V2.0, the SDIO V2.0 specification and CE-ATA V1.1. Up to 3 interfaces Fully Compliant with CAN 2.0 Part A and 2.0 Part B, Bit Rates up to 1Mbit/s Up to 2 ports 3.4. Connectivity In order to simplify the design and to reduce chip count the SAMA5D3 processor offers a large variety of interfaces such as SPI, I2C and I/O for internal connectivity and control. The processor support 5 GPIO controllers, each supporting 32 I/O lines which can be configured as either input or output and can be also used as interrupt lines. The exact number of available I/Os depends on the configuration. Connectivity I2C SPI GPIO 3.3V Speed of up to 400 Kbits per second Up to 3 interfaces Four chip selects with external decoder support allow communication with up to 15 peripherals Master or slave serial peripheral bus interface 2 x SPI interface (4 x CS) Large number, the number can varied according to configuration Analog-to-Digital Converter - ADC The ADC is based on a 12-bit Analog-to-Digital Converter (ADC) managed by an ADC Controller. 12-bit, 1M samples/sec. The conversions extend from 0V to ADVREF. The ADC Controller includes a Resistive Touchscreen Controller. It supports 4-wire and 5-wire technologies. Up to 12 channels 4 AT-501 Product brief 1.3

5 3.5. Display and Media The LCD Controller (LCDC) consists of logic for transferring LCD image data from an external display buffer to an LCD module. The LCD is connected to the ARM Advanced High Performance Bus (AHB) as a master for reading pixel data. The LCD controller is programmable on a per overlay basis, and supports different LCD resolutions, window sizes, image formats and pixel depths. Display and Media LCD RGB Resistive touch ISI SSC Supports Single Scan Active TFT Display Supports 12-bit, 16-bit, 18-bit and 24-bit Output Mode through the Spatial Dithering Unit Asynchronous Output Mode Supported (at synthesis time) 1, 2, 4, 8 bits per pixel (palletized) 12, 16, 18, 19, 24, 25 and 32 bits per pixel (non palletized) Supported layers: - One Base Layer (background) - Two Overlay Layer Windows - One High End Overlay (HEO) Window - One Hardware Cursor, Fixed or Free Size - Display Size up to 1280x720 pixels 4/5 wire The Image Sensor Interface (ISI) connects a CMOS-type image sensor to the processor and provides image capture in various formats. It does data conversion, if necessary, before the storage in memory through DMA. For camera or Image Sensors support The Synchronous Serial Controller (SSC) provides a synchronous communication link with external devices. It supports many serial synchronous communication protocols generally used in audio and telecom applications such as I2S, Short Frame Sync, Long Frame Sync, etc. Used in Audio and Telecom Applications 5 AT-501 Product brief 1.3

6 3.6. Power In order to simplify the use of the SoM, it uses a single power input (3.3V) which is then distributed to all relevant components and relevant voltage levels. The SAMA5D3x excels in its low power consumption and various power modes. In addition to typical running mode The SAMA5D3x low-power modes include Backup Mode, Ultra Low-power Mode and Idle Mode. All power consumption values below relate to the SAMA5D3 SoC. Running mode: Typical power consumption of - 536Mhz, Backup Mode - The purpose of Backup Mode is to achieve the lowest power consumption possible in a system, which is performing periodic wake-ups to perform tasks but not requiring fast startup time. Total current consumption is μa typical, Wakeup time regular start-up time. Ultra Low-power Mode - The purpose of Ultra Low-power Mode is to reduce the power consumption of the device to the minimum without removing VDDCORE power supply. It is a combination of very low frequency operations and Idle Mode. Its compromise is the wakeup time in compare to Idle mode but offers better power consumption. Some typical Consumption/wake-up figures: o MHz 3.9uSec o khz 60uSec o khz 230uSec o khz 1.4mSec o Hz 89mSec Idle Mode - The purpose of Idle Mode is to optimize power consumption of the device versus response time. In this mode, only the core clock is stopped. The peripheral clocks, including the DDR Controller clock, can be enabled. The current consumption in this mode is application dependent. Power consumption 19 ma on 133 MHz, 5-8 ma for each PLL, Wakeup time MHz Environment The AT-501 is offered in two temperature ranges: Commercial temp. - 0 to 70 C Industrial temp to 85 C 3.8. Physical dimensions The AT-501 offers small size module 68 x 47mm (2.7 x 1.85 inch) with a 200 pin SO-DIMM Connector Operating system The AT-501 is provided with support the following OS : Linux - Linux Kernel ver Debian ver Linux by Timesys corporation 6 AT-501 Product brief 1.3

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