High-Performance Computing - and why Learn about it?

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1 High-Performance Computing - and why Learn about it? Tarek El-Ghazawi The George Washington University Washington D.C., USA

2 Outline What is High-Performance Computing? Why is High-Performance Computing Important? Advances in Performance and Architectures Heterogeneous Accelerated Computing Advances in Parallel Programming Making Progress: The HPCS Program, near-term Making Progress: Exascale and DOE Conclusions 2

3 What is Supercomputing and Parallel Architectures? Also called High-Performance Computing and Parallel Computing Research and innovation in architecture, programming and applications associated with computer systems that are orders of magnitude faster (10X- 1000X or more) than modern desktop and laptop computers Supercomputers achieve speed through massive parallelism- Parallel Architectures! E.g. many processors working together 3

4 Outline What is High-Performance Computing? Why is High-Performance Computing Important? Advances in Performance and Architectures Hardware Accelerators and Accelerated Computing Advances in Parallel Programming What is Next: The HPCS Program, near-term What is Next: Exascale and DARPA UHPC Conclusions 4

5 Why is HPC Important? Critical for economic competitiveness because of its wide applications (through simulations and intensive data analyses) Drives computer hardware and software innovations for future conventional computing Is becoming ubiquitous, i.e. all computing/information technology is turning into Parallel!! Is that why it is turning into an international HPC muscle flexing contest? 5

6 Why is HPC Important? Design Build Test Design Model Simulate Build 6

7 Why is HPC Important? National and Economic Competitiveness Molecular Dynamics Gene Sequence Alignment HIV-1 Protease Inhibitor Drug Simulation for 2ns: 2 weeks on a desktop 6 hours on a supercomputer HPC Application Examples Phylogenetic Analysis: 32 days on desktop 1.5 hrs supercomputer Car Crash Simulations Understanding Fundamental Structure of Matter 2 million elements simulation: 4 days on a desktop 25 minutes on a supercomputer Requires a billionbillion calculations per second 7

8 Why is HPC Important? National and Economic Competitiveness Industrial competitiveness Computational models that can run on HPC are only for the design of NASA space shuttles, but they can also help with Business Intelligence (e.g. IBM) and Watson Designing effective shapes and/or material for Potato Chips Clorox Bottles 8

9 HPC Technology of Today is Conventional Computing of Tomorrow: Multi/Many-cores in Desktops and Laptops Intel 80 Core Chip 1 Chip and 1 TeraFLOPs in 2007 The ASCI Red Supercomputer 9000 chips for 3 TeraFLOPs in 1997 Intel 72 Core Chip Xeon Phi KNL 1 Chip and 3 TeraFLOPs in

10 Why is HPC Important?HPC is Ubiquitous Sony PS3 iphone 7 4 Cores 2.34 GHz HPC is Ubiquitous! All Computing is becoming HPC, Can we become Uses the Cell Processors! bystanders? The Road Runner: Was Fastest Supercomputer in 08 Uses Cell Processors! Xeon Phi KNL: A 72 CPU Chip 10

11 Why this is happening? - The End of Moore s Law in Clocking The phenomenon of exponential improvements in processors was observed in 1979 by Intel co-founder Gordon Moore The speed of a microprocessor doubles every months, assuming the price of the processor stays the same Wrong, not anymore! The price of a microchip drops about 48% every months, assuming the same processor speed and on chip memory capacity Ok, for Now The number of transistors on a microchip doubles every months, assuming the price of the chip stays the same Ok, for Now 11

12 No faster clocking but more Cores? Source: Ed Davis, Intel 12

13 Cores and Power Efficiency Source: Ed Davis, Intel 13

14 Comparative View of Processors and Accelerators Fabrication Process nm Freq GHz # Cores Peak FP Performance SPFP GFlops DPFP GFlops Peak Power W DP Flops/W BW GB/s Memory Memory type PowerXCell 8i XDR NVidia Fermi Tesla M GDDR5 Nvidia Kepler K20X NVIDIA Kepler K80 Intel Xeon Phi 5110P (KNC) Intel Xeon Phi 7290 (KNL) Intel Xeon E AMD Opteron 6176 SE Xilinx V6 SX475T Altera Stratix V GSB GDDR x GDDR (2.8) 60 (240 threads) 72 (288 threads) GDDR5 - ~ DDR DDR DDR

15 Most Power Efficient Architectures: Green

16 Outline What is High-Performance Computing? Why is High-Performance Computing Important? Advances in Performance and Architectures Heterogeneous Accelerated Computing Advances in Parallel Programming What is Next: The HPCS Program, near-term What is Next: Exascale and DoE Conclusions 16

17 How the Supercomputing Race is Conducted? TOP500 Supercomputers and LINPACK Top500 in November and in June Rmax - Maximal LINPACK performance achieved Rpeak - Theoretical peak performance In the TOP500 List table, the computers are ordered first by their Rmax value In the case of equal performances (Rmax value) for different computers, order is by Rpeak For sites that have the same performance, the order is by memory size and then alphabetically Check for more information 17

18 Top 10 Supercomputers: November Rank Countr y Site Computer # Cores R max (PFlops) 1 National Supercomputing Center in Wuxi China Sunway TaihuLight - Sunway MPP, Sunway SW C 1.45GHz, Sunway NRCPC 10,649, National University of Defense Technology China 3 Oak Ridge National Laboratory Tianhe-2 (MilkyWay-2) - TH- IVB-FEP Cluster, Intel Xeon E C 2.200GHz, TH Express-2, Intel Xeon Phi 31S1P Titan Cray XK7, Opteron 16 Cores, 2.2GHz, Gemini, Nvidia K20X 3,120, , Lawrence Livermore National Laboratory Sequoia BlueGene/Q, Power BQC 16 Cores, Custom interconnection 1,572, DOE/SC/LBNL/NERSC United States Cori - Cray XC40, Intel Xeon Phi C 1.4GHz, Aries interconnect Cray Inc. 622,

19 Top 10 Supercomputers: November Rank Country Site Computer # Cores R max (PFlop s) 6 Joint Center for Advanced High Performance Computing Japan Oakforest-PACS - PRIMERGY CX1640 M1, Intel Xeon Phi C 1.4GHz, Intel Omni- Path, Fujitsu 556, RIKEN Advanced Institute for Computational Science K Computer SPARC64 VIIIfx 2.0 GHz, Tofu Interconnect 795, Swiss National Supercomputing Centre (CSCS) Switzerland Piz Daint - Cray XC30, Xeon E C 2.600GHz, Aries interconnect, NVIDIA K20x Cray Inc. 206, Argonne National Laboratory Mira BlueGene/Q, Power BQC 16 Cores, Custom interconnection 786, DOE/NNSA/LANL/SNL United States Trinity - Cray XC40, Xeon E5-2698v3 16C 2.3GHz, Aries interconnect Tarek El-Ghazawi, Cray GWU Inc. 301,

20 History Source: top500.org. Also see: 20

21 Supercomputers - History Computer Processor # Pr. Year R max (TFlops) Sunway TaihuLight - Sunway MPP, Sunway SW C 1.45GHz ,014 Tianhe-2 (MilkyWay-2) TH-IVB-FEP Cluster, Intel Xeon E C 2.200GHz, TH Express-2, Intel Xeon Phi 31S1P ,862 Titan Cray XK7, Opteron 16 Cores, 2.2GHz, Nvidia K20X ,600 K-Computer, Japan SPARC64 VIIIfx 2.0GHz, ,510 Tianhe-1A, China Intel EM64T Xeon X56xx (Westmere-EP) 2930 MHz (11.72 Gflops) + NVIDIA GPU, FT C ,566 Jaguar, Cray Cray XT5-HE Opteron Six Core 2.6 GHz ,759 Roadrunner, IBM PowerXCell 8i 3200 MHz (12.8 GFlops) ,026 BlueGene/L - eserver Blue Gene Solution, IBM BlueGene/L eserver Blue Gene Solution, IBM PowerPC MHz (2.8 GFlops) PowerPC MHz (2.8 GFlops) BlueGene/L beta-system IBM PowerPC MHz (2.8 GFlops) Earth-Simulator / NEC NEC 1000 MHz (8 GFlops) IBM ASCI White,SP POWER3 375 MHz (1.5 GFlops) IBM ASCI White,SP POWER3 375MHz (1.5 GFlops) Intel ASCI Red Intel IA-32 Pentium Pro 333 MHz (0.333 GFlops)

22 Historical Analysis PetaFLOPS TeraFLOPS Performance Vector Machines Massively Parallel Processors MPPs with Multicores and Heterogeneous Accelerators Tons of Lightweight Cores Discrete Integrated HPCC End of Moore s Law in Clocking! 2016 Time 22

23 DARPA High-Productivity Computing Systems Launched in 2002 Next Generation Supercomputers by 2010 Not only performance, but productivity, where Productivity = f(execution time, Development time) Typically, Productivity = utility/cost Addresses everything hardware and software 23

24 HPCS Structure Each Team is led by a company and includes university research groups Three Phases Phase I: Research Concepts SGI, HP, Cray, IBM, and Sun Phase II: R&D Cray, IBM, Sun Phase III: Deployment Cray, IBM GWU with SGI in Phase I and IBM in Phase II 24

25 IBM, Sun & Cray s effort on HPCS Vendor Project Hardware Arch. Language IBM PERCES Power PC X10 Sun Hero Rock, Multi-core Sparc Fortress Cray Cascade Chapel 25

26 HPCS on IBM, Sun & Cray IBM PERCS(Productive, Easy-to-use, Reliable Computing System) Power Architecture Sum Hero Multi-core Rock Sparc Cray Cascade 26

27 What is New in HPCS Architecture Lots of Parallelism on the Chip Intelligent and Transactional Memory Innovative Co-Processing: Streaming, PIM, Computations migrate to data, instead of data going to computations Programming PGAS programming Models Parallel Matlab and other simple interfaces Multiple types of parallelism and locality Transactions Reliability Self-Healing More proprietary stuff 27

28 What is Next: Exascale and DOE The DoE Exascale Computing Project Goals: Deliver 50x performance of today s systems (20 PF) Operate with MW power Be sufficiently resilient (MTTI < 1 week) Software stack supporting wide range of apps Growth of supercomputing capability Source: Figure modified from singularity.com Source: /09/f2/ SEAB- DOE-Exascale-Initiative.pdf 28

29 Technical Challenges on The Road to Exascale Bill Dally, Technical Challenges on the Road to Exascale 29

30 Technical Challenges on The Road to Exascale The High Cost of Data Movement Fetching operands costs more than computing on them 10000" 1000" Picojoules*Per*64bit*opera2on* 100" 10" 1" DP"FLOP" Register" 1mm"on3chip" 5mm"on3chip" 15mm"on3chip" Off3chip/DRAM" local"interconnect" 2008"(45nm)" 2018"(11nm)" Cross"system" Source: ExaScale Computing Study: Technology Challenges in Achieving Exascale Systems Courtesy: John Shalf, PGAS

31 Three pre-exascale Supercomputers as part of the CORAL intiative from DOE Summit Sierra Aurora Contract budget $325M combined $200M Location Oak Ridge Livermore Argonne Delivery Date Vendor IBM Cray Node Architecture Multiple IBM POWER9 CPUs, Multiple NVIDIA Volta GPUs Intel Knights Hill Many-core CPUs Node Performance 40+ TFLOPS - 3+ TFLOPS Interconnect Mellanox Dual Rail EDR InfiniBand Intel Omni-Path R peak 150 PFLOPS PFLOPS 180 PFLOPS Nodes ~3,400-50,000+ Power ~10 MW ~10 MW ~13 MW 31 31

32 Aurora Highlights Available Data: Cray Shasta compute platform Intel Knights Hill Manycore CPUs 3 rd Gen Manycore 10nm node 3+ TFLOPS per node 50,000+ nodes 180 PFLOPS 13 MW Intel Omni-Path (2 nd Gen) with Silicon Photonics 500+ TB/s Bisection Bandwidth 2.5+ PB/s Aggregate Node Link Bandwidth Prediction for Next Gen: 1 processor per node One 100-core CPU capable of 4.5TFLOPS peak, or 3+TFLOPS sustained Dual Omni400 Gb/s aggregate BW per node 50,000 nodes 4 nodes per blade 12,500 blades 16 blades per chassis 782 chassis 6 chassis per group 130 groups 32 32

33 GWU HPCL Facility 33

34 Historical Highlights of the Facility ~ 50 Tons of Cooling, 2000 sq of elevated floor,.25 MW of power Small experimental parallel systems that represent a wide spectrum of architectural ideas Systems with GPU Accelerators from Cray and ACI System with Intel Phi Accelerators from ACI Systems with FPGA Accelerators from SRC, SGI, Cray and Starbridge Homegrown clusters with Infinitband, Myrinet Many experimental boards and workstations from Xilinx, Intel, 34

35 35

36 36

37 37

38 GW CRAY XE6m/XK7m 1856 Processor Core Based on 12-core 64-bit AMD Opteron 6100 Series processors and 16-core AMD Bulldozer processors 32 Nvidia K20 GPUs 64 GB registered ECC DDR3 SDRAM per compute node 1 Gemini routing and communications ASIC per two compute nodes 38

39 39

40 Conclusions HPC is critical for economic competitiveness at all levels, and it is turning into an international race! Advances in HPC today are the same advances in conventional computing tomorrow HPC is ubiquitous as all computing turns into HPC Multicores and heterogeneous accelerator architecture are getting rising attention but lack software infrastructure and hardware support and will require new programming models and OS support, an opportunity for leadership in research 40

41 Light Reading s-homegrown-supercomputers,

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