WT-ARM9G25-S1 core board datasheet

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1 WT-ARM9G25-S1 core board datasheet WT-ARM9G25-S1 Overview WT-ARM9G25-S1 core module is an industrial embedded core board based on ATMEL AT91SAM9G25 ARM9 CPU, which adopts SMT package, 4cm x 4cm ultra small size and 108 pins. This product is mainly applied to industrial control, instrument, medical electronics, IOT gateway and so on, and is helpful for customers to rapidly develop high reliability products. Core board details Smallest system Atmel AT91SAM9G25 CPU, Frequency 400MHz 128MB/256MB DDR2 RAM

2 256MB Nand Flash Pin interface Onboard 10/100M Ethernet chip, able to directly expand Ethernet interface; Exports 7 ways of serial ports, 3 USB Hosts and 2 ways of SD card interfaces; Exports SPI / IIC / ADC / PWM multiple functions; Exports up to 80 GPIO interfaces. Electrical characteristics Dimension: 40 x 40mm, 6 layers PCB design; 108Pins export the full functionality of the processor; Core board 3.3V power supply, ultra-low power design, with only 0.5W operating power at system operating condition. System s software support: Supported Linux 3.x / 4.x system with a stable and reliable UBI file system. Supported Debian operating system and installation of a variety of applications under Debian. Core board s features and advantages 1. SMT type package saves height space of product board, avoids the bad contact with the connector and the shortcoming of bad electrical characteristics with high-speed signal, and simultaneously reduces cost; 2. 4cm X 4cm very small size, providing more flexibility of product design space; 3. Up to 108 pins, export all IO resources of CPU, and an on-board Ethernet physical chip. 4. As many as 7 ways of ADC input signals; 5. Equal length by groups from CPU pin to expansion pin of core board, and the final designer only needs to consider isometric on base board; 6. 6 layers PCB with gold immersion process, strict signal integrity and power integrity simulation and testing to ensure stable and reliable operation of the product;

3 7. WT-ARM9G25-S1 has carefully designed circuit EMC / EMI, the front of the core board can be welded with shielding cover, and no signal lines are on the back. Pins resources Schematic diagram for Core board pins

4 List of Core board pins PIN # Name IC Pin Default ALT Function GPI O ID Lin ux 2.6x GPIO ID linux 3.x Note 1 +3V3 3.3V Power supply to WT-ARM9G25-S1 core board,3.3v@0.5a 2 VBAT VBAT RTC Backup supply, connect to 3.0V Li-cell battery 3 PD14 PD14 GPIO PD15 PD15 GPIO PD16 PD16 GPIO PD17 PD17 GPIO PD18 PD18 GPIO PD19 PD19 GPIO PD20 PD20 GPIO PD21 PD21 GPIO GND GND 12 PB18 PB18 GPIO IRQ PB17 PB17 GPIO AD ADC input 6 14 PB16 PB16 GPIO AD ADC input 5 15 PB15 PB15 GPIO AD ADC input 4 16 PB14 PB14 GPIO AD ADC input 3 17 PB13 PB13 GPIO AD ADC input 2 18 PB12 PB12 GPIO AD ADC input 1 19 PB11 PB11 GPIO AD ADC input 0 20 ADVRE F ADVR EF ADVRE F A/D converter voltage reference in (max 3.3 volt) 21 ETH0_T ETH0_T ETH0_TX- X- X- 22 ETH0_T ETH0_T ETH0_TX+ X+ X+ 23 ETH0_R ETH0_R ETH0_RX- X- X- 24 ETH0_R ETH0_R ETH0_RX+ X+ X+ 25 ETH_AV ETH_AV Eth 3V3

5 DD DD 26 ETH_LE ETH_LE Eth Green led (link) D2 D2 27 ETH_LE ETH_LE Eth Yellow led (traffic) D1 D1 28 GND GND 29 PC0 PC0 GPIO ISI_D0 / Image Sensor Interface TWD1 Data0 / I2C1 SDA 30 PC1 PC1 GPIO ISI_D1 / Image Sensor Interface TWCK1 Data1 / I2C1 SCL 31 PC2 PC2 GPIO ISI_D2 / Image Sensor Interface TIOA3 Data2 / Timer Counter Line A IO 3 32 PC3 PC3 GPIO ISI_D3 / Image Sensor Interface TIOB3 Data3 / Timer Counter Line B IO 3 33 PC4 PC4 GPIO ISI_D4 / Image Sensor Interface TCLK3 Data4 / 34 PC5 PC5 GPIO ISI_D5 / Image Sensor Interface TIOA4 Data5 / Timer Counter Line A IO 4 35 PC6 PC6 GPIO ISI_D6 / Image Sensor Interface TIOB4 Data6 / Timer Counter Line B IO 4 36 PC7 PC7 GPIO ISI_D7 / Image Sensor Interface TCLK4 Data7 / 37 PC8 PC8 GPIO ISI_D8 / Image Sensor Interface UTXD0 Data8 / UART 0 TXD 38 PC9 PC9 GPIO ISI_D9 / Image Sensor Interface URXD0 Data9 / UART 0 RXD 39 PC10 PC10 GPIO ISI_D10 / PWM Image Sensor Interface Data10 / PWM0 40 PC11 PC11 GPIO ISI_D11 / PWM Image Sensor Interface Data11 / PWM1 41 PC12 PC12 GPIO ISI_PCK / TIOA Image Sensor Interface Pixel CLK 42 PC13 PC13 GPIO ISI_VSY Image Sensor Interface NC / VSYNC TIOB5 43 PC14 PC14 GPIO ISI_HSY Image Sensor Interface NC / HSYNC TCLK5 44 PC15 PC15 GPIO_C ISI_MCK Image Sensor Interface

6 LK / PCK0 Master CLK / Progammeable Clock output0 45 GND 46 PC16 PC16 GPIO UTXD PC17 PC17 GPIO URXD PC18 PC18 GPIO PWM PWM0 49 PC19 PC19 GPIO PWM PWM1 50 PC20 PC20 GPIO PWM PWM2 51 PC21 PC21 GPIO PWM PWM3 52 PC22 PC22 GPIO TXD /dev/ttys4 TXD 53 PC23 PC23 GPIO RXD /dev/ttys4 RXD 54 PC24 PC24 GPIO RTS /dev/ttys4 RTS 55 GND 56 PC25 PC25 GPIO CTS /dev/ttys4 CTS 57 PC26 PC26 GPIO SCK PC27 PC27 GPIO RTS /dev/ttys2 RTS 59 PC28 PC28 GPIO CTS /dev/ttys2 CTS 60 PC29 PC29 GPIO_C SCK USART0 SCK LK 61 PC30 PC30 GPIO PC31 PC31 GPIO FIQ / FIQ input / PCK1 Progammeable Clock output 63 GND 64 WKUP WKUP Wake up Input 65 SHDN SHDN Shutdwon Output 66 PA0 PA0 GPIO TXD0 / 32 0 /dev/ttys1 TXD SPI1_NP CS1 67 PA1 PA1 GPIO RXD0 / 33 1 /dev/ttys1 RXD SPI0_NP CS2 68 PA2 PA2 GPIO RTS0 / 34 2 /dev/ttys1 RTS / MCI1_D MMC_SD 1 DATA1 A1 69 PA3 PA3 GPIO CTS0 / 35 3 /dev/ttys1 CTS / MCI1_D MMC_SD 1 DATA2 A2 70 PA4 PA4 GPIO SCK0 / 36 4 USART0 SCK / MCI1_D MMC_SD 1 DATA3 A3 71 PA5 PA5 GPIO TXD /dev/ttys2 TXD

7 72 PA6 PA6 GPIO RXD /dev/ttys2 RXD 73 PA7 PA7 GPIO TXD2 / 39 7 /dev/ttys3 TXD / SPI0 SPI0_NP ncs1 CS1 74 PA8 PA8 GPIO RXD2 / 40 8 /dev/ttys3 RXD / SPI0 SPI1_NP ncs0 CS0 75 PA9 PA9 GPIO DRXD 41 9 /dev/ttys0 RXD 76 PA10 PA10 GPIO DTXD /dev/ttys0 TXD 77 GND 78 PA11 PA11 GPIO SPI0_MI SPI0_MISO / SO / MMC_SD 1 DATA0 MCI1_D A0 79 PA12 PA12 GPIO SPI0_MO SPI0_MOSI / SI / MMC_SD 1 CDA MCI1_C DA 80 PA13 PA13 GPIO_C SPI0_SP SPI0_SPCK / LK CK / MMC_SD 1 CLK MCI1_C K 81 PA14 PA14 GPIO SPI0_NP SPI0_NPCS0 CS0 82 PA15 PA15 GPIO MCI0_D MMC_SD 0 DATA0 A0 83 PA16 PA16 GPIO MCI0_C MMC_SD 0 CDA DA 84 PA17 PA17 GPIO_C MCI0_C MMC_SD 0 CLK LK K 85 PA18 PA18 GPIO MCI0_D MMC_SD 0 DATA1 A1 86 PA19 PA19 GPIO MCI0_D MMC_SD 0 DATA2 A2 87 PA20 PA20 GPIO MCI0_D MMC_SD 0 DATA3 A3 88 PA21 PA21 GPIO TIOA0 / Timer Counter Line A SPI1_MI IO 0 / SPI1_MISO SO 89 PA22 PA22 GPIO TIOA1 / Timer Counter Line A SPI1_MO IO 1 / SPI1_MOSI SI 90 PA23 PA23 GPIO_C TIOA2 / Timer Counter Line A LK SPI1_SP IO 2 / SPI1_SPCK

8 CK 91 PA24 PA24 GPIO TCLK0 / Timer Counter External TK Clock Input 0 / SSC Transmitter Clock 92 PA25 PA25 GPIO TCLK1 / Timer Counter External TF Clock Input 1 / SSC Transmitter Frame Synchro 93 PA26 PA26 GPIO TCLK2 / Timer Counter External TD Clock Input 2 / SSC Transmitter Data 94 PA27 PA27 GPIO TIOB0 / Timer Counter Line B RD IO 0 / SSC Receiver Data 95 PA28 PA28 GPIO TIOB1 / Timer Counter Line B RK IO 1 /SSC Receiver Clock 96 PA29 PA29 GPIO TIOB2 / Timer Counter Line B RF IO 2 /SSC Receiver Frame Synchro 97 PA30 PA30 GPIO TWD0 / I2C0 SDA / SPI1_NP SPI1_NPCS3 CS3 98 PA31 PA31 GPIO TWCK0 / I2C0 CLK / SPI1_NP SPI1_NPCS2 CS2 99 GND 100 DIBN DIBN DIBN DIBN Soft Modem Device 101 DIBP DIBP DIBP DIBP Interface 102 HHSDM HHSD HHSDM HHSDM USB A port, USB A MA A A device 103 HHSDP A HHSDP A HHSDP A HHSDPA 104 HHSDP HHSD HHSDP HHSDPB USB B port, USB Host B PB B 105 HHSDM B HHSD MB HHSDM B HHSDM B 106 HHSDM HHSD HHSDM HHSDM USB C port, USB Host C MC C C 107 HHSDP HHSD HHSDP HHSDPC C PC C 108 NRST NRST NRST NRST Bi-direction reset pin

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