E3940 Microprocessor Systems Laboratory. Introduction to the Z80

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1 E3940 Microprocessor Systems Laboratory Introduction to the Z80 Andrew T. Campbell comet.columbia.edu/~campbell E3940 Microprocessor Systems Laboratory Page 1 Z80 Laboratory Assignment Programming Assignment Part I - Getting Started Objective: To learn the basic operating characteristics of the Micro-Trainer Computer Preparation: Before beginning this experiment be sure that you have read chapters 1-2 (through page 2-18) of The Micro-Trainer Manual. No instruction Assignment need to be completed before you begin this experiment. E3940 Microprocessor Systems Laboratory Page 2

2 Z80 Laboratory Assignment Programming Assignment Part II - Subroutines and Timing Loops Objective: To show how program loops can be used to introduce delay in the flow of a computer program. Preparation: 1. Before working on a solution to this experiment be sure that you have read the entire experiment and have completed Instruction Assignment A (page A- 2) in the Laboratory Experiments for the Micro-Trainer. The commands given in Instruction Assignment A are sufficient to solve this programming problem. 2. You will also need to know the basics on Timing Loops so read over pages 2-1 to 2-3 in the Laboratory Experiments for the Micro-Trainer. E3940 Microprocessor Systems Laboratory Page 3 Code for Part II: Main Routine Address Code Label Instruction Comment E 80 START: LD A, 80H ; Value to initialize PORTS 1802 D3 C3 OUT (03CH), A ; Initializes ports for output E 00 LD A, 01H ; Uses accumulator for counter 1806 CD MAIN: CALL PAUSE ; Calls subroutine at 1900H 1809 CD CALL SHOW ; Calls subroutine at 1950H 180C D3 C0 OUT (0C0H), A ; Show counter on PORT A 180E C JP 1806H ; Restarts Main Loop 1900 C9 PAUSE: RET ; Return to calling program 1950 C9 SHOW: RET ; Return to calling program E3940 Microprocessor Systems Laboratory Page 4

3 Code for Pause Subroutine PAUSE: LD C, 00H ; Reset C register (7 T-States) INNER: DEC C ; First decrement makes C=255 (4 T-States) JP NZ, INNER ; Loop back to "DEC" instruction 256 times (10 T-States) This code segment requires approximately 2 msecs to execute, as shown: 7 T-States loops * (4+10 T-States/loop) = 3591 T-States 3591 * 0.56 usecs = msecs E3940 Microprocessor Systems Laboratory Page 5 Code for Show Subroutine Address Code Label Instruction Comment 1900 C5 PAUSE: PUSH BC ; Preserve value in BC ?? C1 POP BC ; Restore value in BC 19??+1 C9 RET ; Return to calling program Write a subroutine "SHOW" at address 1950H, which produces the following cycle display on the LEDs of PORT A: E3940 Microprocessor Systems Laboratory Page

4 Microprocessor Overview What is a microprocessor? A programmable device that reads binary instructions from memory, handles binary data as input and processes data according to instructions, and provides results as output What is main components of a up Central Processing Unit (CPU) Memory Input and Output (I/O) Constitutes both hardware (h/w) and software (s/w) MICRO- PROCESSOR MEMORY I/O E3940 Microprocessor Systems Laboratory Page 7 A Computers memory contains Binary Information Only ADDRESS Memory Cells Memory Chip E3940 Microprocessor Systems Laboratory Page 8

5 Simple Operations => Fetch => Decode => Execute => Input => Output E3940 Microprocessor Systems Laboratory Page 9 Building Blocks Arithmetic/Logic Unit (ALU), Control Unit (CU) The CPU contains: registers to store data, the ALU to perform arithmetic operations, instruction decoders, counters and control lines ALU performs operations on data, e.g., addition, subtraction, logic operations, AND, OR and EOR => result stored in register or memory Register array as temporary store during execution of programs Control Unit provides timing and control signals to all operations in the system => it controls the flow of data between the up and peripherals e.g., memory, I/O devices e.g., decoder, Network Interface Controller (NIC), etc. E3940 Microprocessor Systems Laboratory Page 10

6 Schematic Microprocessor Input Output ALU Register Array SYSTEM BUS Control ROM RWM E3940 Microprocessor Systems Laboratory Page 11 Instructions, ALU, CU and register Array Add operation includes microprograms (made up of microcode), registers, logic gates and clock: the clock initiates the add operation, the bit pattern of the add instruction initiate a sequence of clock signals, activates appropriate logic in ALU and performs the add operation => this add algorithm is called microprogram, which is done at the design stage of the up. The bit pattern which drives these canned microprograms are made available to the programmer in the form of the up instruction set Programmer designs programs (pseudo code, flow diagram) to implement an algorithm, Codes the instruction (from the set) to do the job, enter each instruction sequentially through an input device, CPU reads the bit pattern (instructions) on at a time, decode them, initiates the appropriate microprograms through the control unit, and performs the specific instruction. (ADD, LDDR?) E3940 Microprocessor Systems Laboratory Page 12

7 Typical Microprocessor Architecture ADDRESS DATA PROGRAM COUNTER MAR R A M INTERNAL BUS MDR ACCUMULATOR LATCH ACCUMULATOR ALU LATCH INSTRUCTION REGISTER ALU PSW INSTRUCTION DECODER & SEQUENCER E3940 Microprocessor Systems Laboratory Page 13 Sample Z80 Instructions Binary Code Mnemonic Function LD A,B A B LD C, H C H LD D, 5AH D 5AH ADD A, E A A + E JP 1900H PC 1900H OUT (13H), A Port 13H A HALT PC DISABLED E3940 Microprocessor Systems Laboratory Page 14

8 Z80 Programming register oriented Model Accumulator A register A reg (which forms part of the ALU) is used to perform ALU operations the results of which is stored in the A register flags F register - important in programming for decision making 6 flag bits are used and 2 unused in the 8-bit flags register results on an ALU operations is reflected by 6 possible flags c - carry flag (D0) z - zero flag (D6) s - sign flag (D7) p/v - parity overflow flag (D2) h - half-carry flag (D4) n - add substract flag (D3) c, z, s, p/v have two jump/call instructions based on set/reset which can be used in the code-stream SCF instruction? E3940 Microprocessor Systems Laboratory Page 15 Z80 Programming Model Alternate Registers Accumulator A Flags F Accumulator A' Flags F' B C B' C' D E D' E' H L H' L' Index Register IX Index Register IY Stack Pointer SP Program Counter PC Interupt Vector I Memory Refresh R D7 D6 D5 D4 D3 D2 D1 D0 S Z H P/V N C S = Sign; Z = Zero; H = Half Carry P/V = Parity/Overflow; N = Add/Substract E3940 Microprocessor Systems Laboratory Page 16

9 Register Set Alternative register set for A F B C D H L A.. L not visible to the programmer but can access via EXX (register pairs), EX (A and F)? What are these and what is this instruction useful for? memory pointers 4 16-bit registers used to hold memory address (pointers) index registers (IX) and (IY) are 16-bit memory pointers 16 bit stack pointer - used for temporary storage in programs LD SP, 1F00H; initialize stack pointer LD DE, 0000H; load register DE with 0 CALL DELAY; wait a while PUSH DE; place DE on the stack POP AF; clear accumulator and flags E3940 Microprocessor Systems Laboratory Page 17 PC and special purpose registers Program counter (PC) µp used to sequence executions of instructions, points to the next opcode to be fetched from ROM when the µp places an address on the address bus to fetch the byte from memory, it then increments the program counter by one to the next location Special purpose registers Interrupt vector register I register memory refresh register R register E3940 Microprocessor Systems Laboratory Page 18

10 The Flags Word The flag word describes the result of the last ALU operation ( result positive, negative, zero etc. ) The flag word is used primarily in conditional branch instructions to resolve the condition The flag word is labeled the f register in the Z80 The flag word is sometimes referred to as the psw (processor status word), or the condition code register in other microprocessors E3940 Microprocessor Systems Laboratory Page 19 Flags Word Contents and Organization ALU LATCH ACCUMULATOR ALU FLAGS S Z - H - PV N CY BRANCH CONDITIONS C - CARRY NC - NO CARRY Z - ZERO NZ - NOT ZERO P - PLUS M - MINUS PE - PARITY EVEN PD - PARITY ODD SIGN ZERO HALF- CARRY PARITY/ OVERFLOW ADD/ SUBTRACT CARRY E3940 Microprocessor Systems Laboratory Page 20

11 Addressing Mode Example #1 REGISTERS MEMORY IMMEDIATE MODE LD A, 3CH A 3CH (BEFORE EXECUTION) A F B D H PC 1900H SP C E L F E 1 8 F F E 3C 76 LD A, 3CH HALT (AFTER EXECUTION) A 3C F B D H PC 1902H SP C E L E3940 Microprocessor Systems Laboratory Page 21 Addressing Mode Example #2 REGISTERS MEMORY IMMEDIATE MODE LD A, (1905H) A (1905H) (BEFORE EXECUTION) A F B D H PC 1900H SP C E L (AFTER EXECUTION) 1 8 F E 1 8 F F A C LD A, (1905H) HALT A 3C F B D H PC 1903H SP C E L E3940 Microprocessor Systems Laboratory Page 22

12 Z80 Subroutines (Bye bye Wheeler!) Mnemonics Hex Code Memory Address LD SP, 1895H CALL 1850H CD Subroutine Next Instruction RET HALT SP 1895 XX Stack Locations E3940 Microprocessor Systems Laboratory Page 23 Putting it all Together Power GND Clock INSTRUCTION DECODER Address Bus REGISTERS ALU Data Bus External Requests Memory Pointer Registers Request Acknowledge FLAGS Control Signals E3940 Microprocessor Systems Laboratory Page 24

13 IO System A15 A8 A0 High Order Address Bus Low Order Address Bus Input Z80 EPROM RWM Input Output Output D0 - D7 SYSTEM BUS MEMRD_L MEM_WR_L IORD_L IOWR_L E3940 Microprocessor Systems Laboratory Page 25 E3940 Microprocessor Systems Laboratory Page 26

14 Z80 Kits E3940 Microprocessor Systems Laboratory Page 27 Z80 Memory Map and Port Map MICRO TRAINER MEMORY MAP MICRO TRAINER PORT MAP MXTZ Monitor ROM 0000 UNINSTALLED USER RAM SYSTEM RAM MTXZ Monitor ROM 2000 Analog Board Socket, U7 Analog Board Socket U8 Analog Board Socket U9 UNINSTALLED FFF FF EFF 1F00-1FFF FFF (ZAD Only) FFF FFF EPROM FF RAM FFF EPROM FF RAM FFFF 8255 PPI Keypad, Display Speaker, ZAD Unavailable Z80 CTC chip Unavailable Z80 PIO chip Unavailable Intf Board LEDs Analog Boards UNINSTALLED F F BF C0 - C3 C4 - CC CD - FF C4 - D/A C5 - D/A C6 - A/D C7 - (U/A) C8- R1 C9 - R2 CA - R3 CB - R4 CC - R5 E3940 Microprocessor Systems Laboratory Page 28

15 Opcode Fetch FIGURE 3.3 Z80 Memory Read Operation E3940 Microprocessor Systems Laboratory Page 29 Opcode Fetch: Bus Timings (M1 Cycle) E3940 Microprocessor Systems Laboratory Page 30

16 Instruction cycles, machine cycles and T-states Instruction cycle is the time taken to complete the execution of an instruction 1-6 machine/operation cycles Machine cycle is defined as the time required to complete one operation of accessing memory, accessing IO, etc. T-state = 1/f Z80 trainer? E.g. LD A, 9H 2 bytes instruction, 2 machine cycles (read opcode and operand) 4T + 3T = 7T execution time = 7x1/f (1.75 us for 4MHz) E3940 Microprocessor Systems Laboratory Page 31 M1 Refresh Cycle and Wait Signal Takes 4T to 6Ts Z80 includes built in circuitry for refreshing dynamic memory this simplifies the external interfacing hardware dynamic memory consists of MOS transistors, which store information as capacitive charges; each cell needs to be periodically refreshed Z80 refresh cycle is shown in Figure 3.4 during T3 and T4 (when Z80 is performing internal ops), the low order address is used to supply a 7-bit address for refresh (RFSH) wait signal the Z80 samples the wait signal during T2 if low then Z80 adds wait states to extend the machine cycle - used to interface memories with slow response time E3940 Microprocessor Systems Laboratory Page 32

17 Z80 Laboratory Assignment Programming Assignment Part I - Getting Started Objective: To learn the basic operating characteristics of the Micro-Trainer Computer Preparation: Before beginning this experiment be sure that you have read chapters 1-2 (through page 2-18) of The Micro-Trainer Manual. No instruction Assignment need to be completed before you begin this experiment. E3940 Microprocessor Systems Laboratory Page 33 Z80 Laboratory Assignment Programming Assignment Part II - Subroutines and Timing Loops Objective: To show how program loops can be used to introduce delay in the flow of a computer program. Preparation: 1. Before working on a solution to this experiment be sure that you have read the entire experiment and have completed Instruction Assignment A (page A- 2) in the Laboratory Experiments for the Micro-Trainer. The commands given in Instruction Assignment A are sufficient to solve this programming problem. 2. You will also need to know the basics on Timing Loops so read over pages 2-1 to 2-3 in the Laboratory Experiments for the Micro-Trainer. E3940 Microprocessor Systems Laboratory Page 34

18 Code for Part II: Main Routine Address Code Label Instruction Comment E 80 START: LD A, 80H ; Value to initialize PORTS 1802 D3 C3 OUT (03CH), A ; Initializes ports for output E 00 LD A, 01H ; Uses accumulator for counter 1806 CD MAIN: CALL PAUSE ; Calls subroutine at 1900H 1809 CD CALL SHOW ; Calls subroutine at 1950H 180C D3 C0 OUT (0C0H), A ; Show counter on PORT A 180E C JP 1806H ; Restarts Main Loop 1900 C9 PAUSE: RET ; Return to calling program 1950 C9 SHOW: RET ; Return to calling program E3940 Microprocessor Systems Laboratory Page 35 Code for Pause Subroutine PAUSE: LD C, 00H ; Reset C register (7 T-States) INNER: DEC C ; First decrement makes C=255 (4 T-States) JP NZ, INNER ; Loop back to "DEC" instruction 256 times (10 T-States) This code segment requires approximately 2 msecs to execute, as shown: 7 T-States loops * (4+10 T-States/loop) = 3591 T-States 3591 * 0.56 usecs = msecs E3940 Microprocessor Systems Laboratory Page 36

19 Code for Show Subroutine Address Code Label Instruction Comment 1900 C5 PAUSE: PUSH BC ; Preserve value in BC ?? C1 POP BC ; Restore value in BC 19??+1 C9 RET ; Return to calling program Write a subroutine "SHOW" at address 1950H, which produces the following cycle display on the LEDs of PORT A: E3940 Microprocessor Systems Laboratory Page Mandatory Reading for the Lab. 1. Read the assignment closely and the reading below. It will be on the web today 2. The Micro Trainer Manual Chapters 1 and 2 You will do most of Chapter 2 as part of the lab 3. Laboratory Experiments for the Micro-Trainer Instruction assignment A page A-2 Timing Loops 2-1 to The Z80 Microprocessor Book (Gaonkar) Chapters 1, 2 and 6 Chapters 1-2 are intro material Chapter 6 is about the programming language *Don t worry* about fully understanding the language focus on the instructions introduced to you in Instruction assignment A page A-2 mentioned in bullet 2 above E3940 Microprocessor Systems Laboratory Page 38

20 Handout and Homework Assignment Read the Digital Electronics Tutorial This homework is revision on what I assume you already know its all basic numbers and logic stuff. See TA if you need refresher or assistance. Assignment to be handed into the TAs by next Tuesday Assignment from pages of Digital Electronics Tutorial Questions: P1, P2, P4, P7, P8, P14 For extra grade P22 and P24 E3940 Microprocessor Systems Laboratory Page 39

Chapter 3. Z80 Instructions & Assembly Language. Von Neumann Architecture. Memory. instructions. program. data

Chapter 3. Z80 Instructions & Assembly Language. Von Neumann Architecture. Memory. instructions. program. data Von Neumann Architecture The von Neumann architecture is a computer design model that uses a processing unit and a separate storage to hold both instructions and data To run a machine, program and data