DPDK s Best Kept Secret: Micro-benchmarks. M Jay DPDK Summit - San Jose 2017

Transcription

1 DPDK s Best Kept Secret: Micro-benchmarks M Jay Mthrajan.Jayakmar@intel.com DPDK Smmit - San Jose 2017

2 Legal Information Optimization Notice: Intel s compilers may or may not optimize to the same degree for non-intel microprocessors for optimizations that are not niqe to Intel microprocessors. These optimizations inclde SSE2, SSE3, and SSSE3 instrction sets and other optimizations. Intel does not garantee the availability, fnctionality, or effectiveness of any optimization on microprocessors not manfactred by Intel. Microprocessor-dependent optimizations in this prodct are intended for se with Intel microprocessors. Certain optimizations not specifc to Intel microarchitectre are reserved for Intel microprocessors. Please refer to the applicable prodct User and Reference Gides for more information regarding the specifc instrction sets covered by this notice. Cost redction scenarios described are intended as examples of how a given Intel- based prodct, in the specifed circmstances and confgrations, may affect ftre costs and provide cost savings. Circmstances will vary. Intel does not garantee any costs or cost redction. Intel technologies featres and benefts depend on system confgration and may reqire enabled hardware, software or servic activation. Performance varies depending on system confgration. No compter system can be absoltely secre. Check with yor system manfactrer or retailer or learn more at No license (express or implied, by estoppel or otherwise) to any intellectal property rights is granted by this docment. Intel disclaims all express and implied warranties, inclding withot limitation, the implied warranties of merchantability, fitness for a particlar prpose, and noninfringement, as well as any warranty arising from corse of performance, corse of dealing, or sage in trade. This docment contains information on prodcts, services and/or processes in development. All information provided here is sbject to change withot notice. Contact yor Intel representative to obtain the latest forecast, schedle, specifications and roadmaps. The prodcts and services described may contain defects or errors known as errata which may case deviations from pblished specifications. Crrent characterized errata are available on reqest. Copies of docments which have an order nmber and are referenced in this docment may be obtained by calling or by visiting Intel Corporation. Intel, the Intel logo, and Xeon are trademarks of Intel Corporation or its sbsidiaries in the U.S. and/or other contries. *Other names and brands may be claimed as the property of others. 2

3 Agenda Why shold I care abot DPDK Micro-benchmarks? What do they benchmark? How do I rn them?

4 Not all slots are made eqal Ensre that yo have plgged in yor NIC card in most optimal slot Not all slots are made eqal!

5 How many lcores, yo think, are there in this 2 socket server? 64 lcores? 96 lcores? More than 100 lcores?

6 Qestion: What can be Improved here? CPU 0 CPU 1 6

7 Improvements -n 4 CPU 0 CPU 1 I/O Plgged in CPU1 s Slot How mch memory do yo see in CPU1 node? ZERO! CPU 0 has only One Channel memory poplated. 7

8 In Which Socket lcore # 50 resides? Socket 0 or Socket 1? More than 100 lcores Qestion: In which socket yo think lcore# 50 resides? socket 0? Or socket 1? Socket 0? Socket 1? Assme NIC is Plgged in socket 0 Will the performance be best or sb-optimal?

9 Why Shold I Care Abot DPDK Micro-benchmarks? We thoght lcore # 50 resides in socket 0. Bt actally, yo can see it is in socket 1. So, NIC in socket 0 is actally sb-optimal. How to qantitatively ensre that system is set for optimal performance?

10 QUIZ: Cores Within A Socket All In Same Loop?

11 Demo

12 Cores Within A Socket Not eqal proximity

13 Prior to application level benchmarking.. Withot tightening these, if yo start developing yor application And on top of that, if yo start measring application level performance Root case analysis is made nnecessarily complex Instead what if.. What if yo can do basic benchmarking of key performant elements / ops Yo will bild strong fondation first Will help yo develop Applications confidently towards overall higher performance

14 What Objects, What Operations to benchmark? In other words, what are the key high performant objects and operations? Objects: Ring Mem pool Mbf Operations: Mem copy Hash Operations Flow Classification

15 Test_hash_mltiwriter_main( ) Hash Mlti-writer Transactional Memory

16 Tests: Ring, PMD, Table

17 Roter, Memcpy, Hash

18 Tests: Crypto, Event, Flow Classify

19 Mempool

20 SPSC MPMC Time Taken

21 Call To Action: Where To Find Them & How It Measres?

22 Optimization Notice Optimization Notice Intel s compilers may or may not optimize to the same degree for non-intel microprocessors for optimizations that are not niqe to Intel microprocessors. These optimizations inclde SSE2, SSE3, and SSSE3 instrction sets and other optimizations. Intel does not garantee the availability, fnctionality, or effectiveness of any optimization on microprocessors not manfactred by Intel. Microprocessor-dependent optimizations in this prodct are intended for se with Intel microprocessors. Certain optimizations not specific to Intel microarchitectre are reserved for Intel microprocessors. Please refer to the applicable prodct User and Reference Gides for more information regarding the specific instrction sets covered by this notice. Notice revision #

23 Qestions? M Jay Mthrajan.Jayakmar@intel.com