8051 Microcontroller

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1 8051 Microcontroller The 8051, Motorola and PIC families are the 3 leading sellers in the microcontroller market. The 8051 microcontroller was originally developed by Intel in the late 1970 s. Today many other companies manufacture the 8051 and it s derivatives e.g. Philips, Atmel, Dallas, Infineon, Analog Devices These derivatives support the standard 8051 architecture along with some additional features e.g. Faster instruction execution times More data and program memory Additional timers On-chip EEPROM memory On-chip ADC and DAC On-chip real time clock Support of I2C and SPI serial interfaces 3V power supply for lower power consumption Computer Engineering Architecture

2 8051 Features 8 bit CPU All data is stored as 8 bits, data is moved 8 bits at a time 4Kbytes of on chip program memory This is where the application code and constants are stored 128 bytes of on chip data memory Variables and stack are stored here 32 input output pins arranged as 4 8-bit ports P0 to P3 Used to interface to external devices 2 16-bit timers/counters Serial data communication - Full duplex UART 5 source interrupt structure 16 bytes of bit addressable RAM 64K bytes external program memory space 64K bytes external data memory space On chip oscillator Boolean processor Computer Engineering Architecture

3 8051 Architecture Source : Philips 80C51 Family Architecture Computer Engineering Architecture

4 8051 Pin-out 8051 is a 40 pin device Apply 5V to VCC Crystal connects to XTAL1, XTAL2 Need external reset circuit EA tied high for internal program memory, low for external memory ALE and PSEN only used for external memory P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 VCC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 XTAL1 XTAL2 RESET GND EA ALE PSEN Computer Engineering Architecture

5 8051 Clock The 8051 requires an external clock source Usually a crystal oscillator is used Connected to the XTAL1 and XTAL2 pins A 33pF capacitor must also be tied from each pin to ground All operations performed by the 8051 take 1 or more machine cycles to execute. A machine cycle is 12 clock periods All 8051 instructions take 1, 2 or 4 machine cycles to execute If the 8051 is operating off a 12MHz crystal, What is the maximum number of instructions that can execute in 1 second? Computer Engineering Architecture

6 8051 Reset On power-up a reset signal must be applied to the 8051 reset pin The 8051 reset input is active high Resetting the 8051 will load the Program Counter register (PC) with 0 and force the 8051 to start program execution from address 0 in program memory The reset pin must be brought low before program execution can begin. An external circuit must be used to apply the reset pulse. 5V 10uF 10K Reset 8051 Computer Engineering Architecture

7 Minimum 8051 Circuit 5V power supply Crystal defines code execution speed connects to X1, X2 pins RC circuit supplies a positive reset pulse on power-up EA pin tied high to use internal program memory for code execution Computer Engineering Architecture

8 8051 I/O Ports 32 of the 8051 s pins are dedicated as I/O lines The 8051 has 4 I/O ports labelled P0, P1, P2, P3 Each port is 8 bits wide A port s pins are labelled 0 to 7 P0.0 is pin 0 of port 0, P0.7 is pin 7 All port pins may be used as inputs or outputs Note: -If using Port 0 as an output pull-up resistors must be used Some port pins have alternate uses (see next slide) The 8051 is a CMOS device i.e. it cannot interface directly to large current loads IOL max. per pin is 10mA IOL max. for Port 0 is 26mA IOL max. for the other 3 ports is 15mA IOL max. for device is 71mA e.g. an LED circuit sinks 7mA into an 8051 pin Can only connect 2 LED circuits to Port 1 Computer Engineering Architecture

9 8051 LED Circuit The circuit below shows how to connect an LED to an 8051 I/O pin The resistor value must be chosen to ensure that the maximum sink current into pin P1.0 is 10mA. Do we need to output a logic 0 or 1 to turn on the LED? V P R Computer Engineering Architecture

10 The 8051 is an 8-bit device 8051 Features The internal and external 8051 data buses are 8-bits wide i.e. all data transfers can move a maximum of 1 byte of information All registers with 2 exceptions are 8-bits wide While the 8051 can operate quickly with 8-bit variables (chars), operation with larger variables (e.g. ints) can be quite slow as the variables need to be broken into 8-bit sub-units Computer Engineering Architecture

11 8051 has 3 types of memory Program (Code) Memory On-chip memory External data memory (RAM) 8051 Memory Organisation 8051 µcontroller Internal RAM SFRs Code Memory External Data Memory External Program Memory Computer Engineering Architecture

12 8051 Program Memory Used to store application code and constants Limited to 64KBytes maximum 8051 has 4KBytes of program memory on-chip On-chip program memory may be ROM, EPROM or Flash Code may be programmed onto the 8051 using a PROM programmer Some 8051 derivatives are In-System Programmable (ISP) i.e. they may be programmed in-circuit using the serial port Program memory may be expanded by adding external memory chips Computer Engineering Architecture

13 8051 External Data Memory 8051 has only 128 Bytes of internal data memory This may not be sufficient to hold the variables used in some applications An external RAM chip may be connected to the 8051 to increase data memory capacity 8051 can support up to 64KBytes of external data memory Computer Engineering Architecture

14 8051 Internal Memory The 8051 microcontroller contains 128 Bytes of data memory (RAM) This memory may be used for variable storage or for the stack Address range is 00H to 7FH The 8051 also contains 128 Bytes of memory area assigned to SFRs (Special Function Registers) Address range 80H to FFH FFH 80H Special Function Registers Used for 8051 peripheral configuration and status info 7FH 30H 2FH 20H 1FH 18H 17H 10H 0FH 08H 07H 00H User RAM & Stack Bit-Addressable Memory Register Bank 3 Register Bank 2 Register Bank 1 Register Bank 0 Used for storing Bit variables 4 banks of 8 registers Labelled R0 to R7 Computer Engineering Architecture

15 8051 Register Banks The lower 32 bytes of internal data memory is divided into 4 register banks Each register bank contains 8 registers labelled R0 to R7 These registers are used by many of the 8051 instructions On power-up the 8051 defaults to using register bank 0 Bank switching may be used to improve the efficiency of applications that use interrupts. Bank switching will not be covered in this course. Register banks 1,2 and 3 will be used for variable storage Computer Engineering Architecture

16 Bit Addressable Memory 16 bytes of internal data memory may be accessed at the bit level This is useful for applications that use flags to reflect the status of certain events This saves memory space as a flag can be declared as a single bit rather than using a full byte of memory A single memory location can be used to store 8 flags The bit addressable area of memory can also be used to store byte wide (or larger) variables Computer Engineering Architecture

17 The Stack The stack is an area of internal data memory that is used for:- Storage of return addresses for function calls Backup of memory locations that may be altered by an interrupt service routine (ISR) The stack pointer (SP) SFR points to the top of the stack. When a function is called in a C program, the microcontroller needs to remember the return address from the function i.e. what is the next instruction to be executed when the function is complete As the PC register contains the address of the next instruction to be executed, the contents of the PC register (2 Bytes) is pushed onto the stack When the function is complete the return address is popped off the stack and the microcontroller will execute the next instruction after the function call Computer Engineering Architecture

18 Special Function Registers (SFRs) The SFRs are registers in internal data memory that allow control of the 8051 µcontroller functionality SFRs P0 to P3 allow access to the 8051 s I/O pins e.g. P1 = 0xFF //write all 1 s to the 8 Port 1 pins The SFRs shown in blue are used to configure the 8051 timers, serial port and interrupts The remaining SFRs can be used for arithmetic/logic operations (ACC and B registers), control or status. All SFRs whose address is divisible by 8 are bit addressable. Computer Engineering Architecture

19 Special Function Registers (SFRs) 80H P0 SP DPL DPH PCON 88H TCON TMOD TL0 TL1 TH0 TH1 90H P1 98H SCON SBUF A0H P2 A8H IE B0H P3 B8H IP C0H C8H D0H PSW D8H E0H ACC E8H F0H B F8H Computer Engineering Architecture

20 8051 Memory Quiz How many register banks does the 8051 have? How much internal program memory does an 8051 contain? Where is the 8051 stack located? What is the function of the stack? How much external data memory may be connected to the 8051? Computer Engineering Architecture

21 8051 Timers The 8051 has 2 internal 16-bit timers named Timer 0 and Timer 1 The timers have 2 modes of operation Timer mode allows the timer to count internal clock pulses The timer register is updated every machine cycle (12 oscillator clocks) Applications include delays, real time clocks etc In counter mode the timer can be used to count external events The timer register is incremented every time an external timer pin goes high to low Applications include pulse width and frequency measurement Computer Engineering Architecture

22 8051 Serial Port The 8051 has an on-board UART that may be used to provide a serial interface to external devices Example serial devices are GPS receivers, GSM MODEMs 2 Port 3 pins (TXD and RXD) provide the external interface The Baud rate can be programmed using timer 1 Computer Engineering Architecture

23 The 8051 has 5 interrupt sources 2 external interrupt pins 8051 Interrupt Structure An interrupt is generated when the pin goes low These pins may be used to allow an external device to interrupt the 8051 e.g. keypad, analog to digital converter 2 timer interrupts 8051 is interrupted when a timer register overflows Serial port interrupt Interrupt occurs when a character has been transmitted or received over the serial port Interrupts may be individually enabled or disabled Interrupts may be prioritised Computer Engineering Architecture

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