Agilent N4880A Reference Clock Multiplier

Transcription

1 Agilent N4880A Reference Clock Multiplier Preliminary Version 0.91 Accurate and simplified receiver test for PCI Express, SD UHS-II host and MIPI M-PHY devices: Multiplies 19.2 to 100 MHz reference clocks to an external clock signal for J-BERT or ParBERT pattern generators Transparent to 33 khz SSC on the reference clock because N4880A uses a multiplying PLL with 2 or 5 MHz loop bandwidth Tolerates small input signals with an input sensitivity of 100 mvpp differential Stand-alone graphical user interface and remote control interface via rear panel USB 2.0 connection

2 Agilent N4880A Specifications Table 1: Specifications for N4880A Reference clock input 50 Ω differential, DC coupled, unused input has to be terminated with 50 Ω Clock input frequency range Clock input voltage range PCIe : 100 MHz, UHS-II: 26 to 52 MHz, MIPI M-PHY: 19.2 MHz, 26 MHz, 38.4 MHz, 52 MHz 100 mvpp to 2 Vpp differential Clock input transition times < 7.7 ns (20 %/80 %) Loop bandwidth PCIe: typ. 5 MHz, UHS-II: typ.2 MHz, MIPI M-PHY: typ.2 MHz (see also table 2) Clock input duty cycle 45 % to 55 % Max. input voltage level SSC Clock output -3.0 V to +3.0 V Reference clock input tolerates up to 3% SSC down-spread modulated with 33 khz for 26 MHz reference clocks 50 Ω single ended, DC coupled. Can drive J-BERT or ParBERT 7G/13 G pattern generator modules Clock multiplier factors See table 2 Clock output range Clock output voltage GHz to GHz Typical 300 to 600 mvpp, not adjustable Output jitter Typical 1.9 ps rms RJ additional intrinsic jitter@ ref clock 2 ns (20 %/80 %) transition time, 100 mvpp Typical 2.1 ps rms RJ additional intrinsic jitter@ ref clock 7.7 ns (20 %/80 %) transition time, 100 mvpp. Output transition time Output duty cycle Connectors front panel Connectors rear panel Typical < 25 ps (20% /80%), not adjustable Typical 50% ± 5%, not adjustable SMA 3.5 mm, female USB, IEC power connector

3 Agilent N4880A Specifications 1 Table 2: Multiplier factors for N4880A Digital Bus Standard Reference Clock Input Target Bit Rate N4880A Output Clock* PLL Loop Bandwidth N4880A Multiplier Recommended CLK IN Divider in Pattern Generator to achieve Target Bit Rate (1) PCI Express MHz 8 GHz 8 GHz 5 MHz 80 1 PCI Express MHz 5 GHz 10 GHz 5 MHz PCI Express MHz 2.5 GHz 10 GHz 5 MHz MIPI M-PHY 19.2 MHz GHz GHz 2 MHz MIPI M-PHY 19.2 MHz GHz GHz 2 MHz MIPI M-PHY 19.2 MHz GHz GHz 2 MHz MIPI M-PHY 19.2 MHz GHz GHz 2 MHz MIPI M-PHY 19.2 MHz GHz GHz 2 MHz MIPI M-PHY 19.2 MHz GHz GHz 2 MHz MIPI M-PHY 26 MHz GHz GHz 2 MHz MIPI M-PHY 26 MHz GHz GHz 2 MHz MIPI M-PHY 26 MHz GHz GHz 2 MHz MIPI M-PHY 26 MHz GHz GHz 2 MHz MIPI M-PHY 26 MHz GHz GHz 2 MHz MIPI M-PHY 26 MHz 5.824GHz GHz 2 MHz MIPI M-PHY 38.4 MHz GHz GHz 2 MHz MIPI M-PHY 38.4 MHz GHz GHz 2 MHz MIPI M-PHY 38.4 MHz GHz GHz 2 MHz MIPI M-PHY 38.4 MHz GHz GHz 2 MHz MIPI M-PHY 38.4 MHz GHz GHz 2 MHz MIPI M-PHY 38.4 MHz GHz GHz 2 MHz

4 Agilent N4880A Specifications Digital Bus Standard Reference Clock Input Target Bit Rate N4880A Output Clock* PLL Loop Bandwidth N4880A Multiplier Recommended CLK IN Divider in Pattern Generator to achieve Target Bit Rate (1) MIPI M-PHY 52 MHz GHz GHz 2 MHz MIPI M-PHY 52 MHz GHz GHz 2 MHz 24 8 MIPI M-PHY 52 MHz GHz GHz 2 MHz MIPI M-PHY 52 MHz GHz GHz 2 MHz MIPI M-PHY 52 MHz GHz GHz 2 MHz MIPI M-PHY 52 MHz GHz GHz 2 MHz SD UHS-II (2) 26 MHz to 52 MHz SD UHS-II (2) 26 MHz to 52 MHz GHz to GHz GHz to GHz 6.24 GHz to GHz 6.24 GHz to GHz 2 MHz MHz (1) 7G versions of J-BERT N4903B and ParBERT can be used, even if N4880A output clock rate is higher than 7 GHz. (2) In case of a reference clock between 26 MHz and < MHz and the need for sinusoidal jitter injection a N4916B-001 clock doubler has to be applied between the reference clock multiplier output and the J-BERT external clock input. In addition, the pattern generator bits need to be doubled (e.g. 01 -> 0011) to compensate for the clock doubling. Table 3. General characteristics for N4880A Power consumption Operating temperature Storage temperature -40 C to 70 C Operating humidity Storage humidity Physical dimensions (WxHxD) Rackmount without bumper Weight net Weight shipping Warranty period Regulatory standards: Safety IEC :2001, EN :2001, CAN/CSA-C22 No , UL :2004 EMC Quality management ISO 9004, ISO Remote control interface: Connectivity Programming language Stand-alone user interface System requirements V ~50/60 Hz, 80 VA max. 5 C to 40 C ( 23 F to 104 F) 95% relative humidity non-condensing 50% relative humidity Bench top with bumper and connectors: 228 x 59 x 240 mm (9.0 x 2.3 x 9.74 in) 1/2 x 19 width, 1U height 1.9 kg (4.2 lb) ~4.5 kg (10 lb) 1 year IEC :1997+A1:1998, EN :1997+A1:1998 USB 2.0, rear panel Command line programming interface, SCPI extension on J-BERT N4903B SW 7.2 or higher Graphical, color user interface OS: Microsoft Windows XP, SP3 (32 bit), or Vista SP2 (32 and 64 bit), or Windows 7 SP1 (32 and 64 bit); Microsoft.NET 2.0 SP2 For using the J-BERT SCPI remote extension N4903B SW 7.2 or higher is needed 3

5 Ordering Information Table 4: Ordering Instructions Reference clock multiplier Accessories included in N4880A Recommended accessories: Four SMA-SMA cables, unmatched (for clock in and out) N4880A 1 x 50 Ω termination 3.5 mm, USB cable, USB-stick with software and user documentation, functional test report, ROHS addendum 15442A SMP-to-SMA cable pair (for PCIe CEM test) N Rack-mount kit E5810A-100 Warranty and services: Warranty and calibration services Productivity assistance R1280 R1380-N49xx Figure 1: Choose settings for the N4880A with the stand-alone graphical user interface. The example shows a setting for a PCI Express 3.0 motherboard test at 8 Gb/s 4

6 Related Literature Title J-BERT N4903B high performance serial BERT PCI Express 3.0 calibration channels N4916B 4-tap de-emphasis signal converter Infiniium X-series oscilloscopes GHz true analogue bandwidth Infiniium DSO90000 series high-performance oscilloscopes N5990A Test automation software platform How to pass receiver test according to PCI Express 3.0 CEM specification Application Note Accurate calibration of PCIe 3.0 receiver stress signals (base spec) Application Note PCIe 2.0 receiver testing with J-BERT N4903B Application Note Publication Number EN EN EN EN EN EN EN EN EN For more information on Agilent Technologies products, applications or services, please contact your local Agilent office. The complete list is available at: Americas Canada Brazil Mexico United states Asia Pacific Australia China Hong Kong India Japan Korea Malaysia Singapore Taiwan Other AP countries (877) (11) (800) (421) (65) www-agilent.com/find/ updates Get the latest information on the products and applications you select. Quickly choose and use your test equipment solutions with confide PCI-SIG, PCI EXPRESS, and PCIe are US registered trademarks and/or service marks of PCI-SIG. Europe & Middle East Belgium Denmark Finland France Germany Ireland Israel Italy Netherlands Spain Sweden United kingdom 32 (0) (0) * *0.125 /minute 49 (0) / (0) (91) (0) For the most up-to-date version of this document, please visit our website at and go to the Key Library Information area or insert the publication number Product specifications and descriptions in this document subject to change without notice. Agilent Technologies, Inc EN Dec 2011