The Institution of Engineers - Sri Lanka

Transcription

1 / The Institution of Engineers - Sri Lanka PART III- EXAMINATION COMPUTER SYSTEMS ENGINEERING Time Allowed: 3 hours INSTRUCTIONS TO CANDIDATES 1. This paper contains 8 questions in 5 pages 2. Answer any 5 questions 3. All questions carry equal marks Question 1 (1). A computer system network uses Hamming codes for error detection and correction. The following bit stream was received after a data transmission. " " (a) Using the Hamming's algorithm check whether the bit stream is erroneous. If yes what is the error bit? (b) Write down the original message string which was transmitted. ~ (ii). The following memory units are specified by the number of words times the number of bits per word. How many address lines and input-output data lines are needed in each case? (a) 2Kx16 (b) 16Mx32 (iii). Draw the memory arrangement of a 2Kx32 memory indicating the number of address lines and data lines. o~~~o~=~ 1

2 Question 2 (i). Draw the architecture of a typical Von-Neumann machine indicating its data path. (5 marks) (ii). The following program written in the assembly instruction set of the 8051 microprocessor is stored in the computer memory. Memory address Opcode Operand Comment OxOOOl MOV A,OA OxOO02 MOV C,A OxOO03 ADD A,C OxOO04 DEC C OxOO05 JNZ OxOO03 Jump to memory location OxOO03 (a) Write down the comments for all the instructions. An example is done for you. (4 marks) (b) Indicate the values of the Program Counter (PC), Instruction Register (IR) and the Accumulator (A), at the instant the program completes its 4th iteration. (c) What is the ultimate result of this program after all the iterations, provided that this program deals only with positive integers? (d) Write a new assembly program which will get the addition of all positive even integers from lto 100. Question 3 (i). Compare the CISC and RISC computers in terms of instruction complexity, size of the instruction set and the speed of CPU. (ii). Briefly explain three design principles of a RISC machine. (iii). Explain the terms, instruction level parallelism and processor level parallelism. 2

3 L Question 4 (i). Explain the following terms associated with the cache memory. (a) Principle of locality (b) Hit ratio (c) Miss ratio (d) Cache lines (e) Unified cache (t) Split cache (ii). A two way set-associative cache memory uses blocks of four words. The cache can accommodate a total of 2048 words from main memory. The main memory size is 128Kx 32. (a) Formulate all pertinent information (b) What is the size of the cache memory? required to construct the cache memory Question 5 (i). Represent the hexadecimal ASE in (a) Decimal (b) Binary (c) Octal (ii). Represent the following numbers in eight bit sign and magnitude representation. (a) +93 (2m arks) (b) -97 (iii). Represent -111 in one's complement and two's complement. (4 marks) (iv). Convert decimal into binary floating point and represent it with IEEE floating point standard. 3

4 Question 6 (i). With the aid of block diagrams of the internal architecture compare and contrast the hard wired control unit and the micro programmed control unit in terms of their design complexity, modification flexibility and the speed of operation. (ii). The following are four methods of transferring data between the CPU and the peripheral devices. Indicate the message flow sequence (steps) associated with each method. You can use diagrams to support your answer. (a) Programmed input-output (polling method) (b) External interrupts (c) Direct memory access (d) Input output processor Question 7 (i). Briefly explain the functionality and the purpose of the following special purpose registers. (a) A (b) MDR (c) MAR (d) PC (e) IR (f) SP (ii). A CPU consists with an instruction decoder, IR, PC, MAR, MDR, input buffer register (Y), ALU, A and four general purpose registers. The CPU uses single bus architecture. Draw the internal CPU configuration of with the above information indicating the directions of the address lines and data lines. 4

5 Question 8 (i). Draw the format of a typical TCP header indicating all fields. (5 marks) (ii). Briefly explain the steps associated with a TCP connection establishment and termination. (iii). Two communication systems work in two different ways. System A sends one frame and wait for an acknowledgement before sending the next frame. System B continuously sends frames while receiving the acknowledgements. In both the systems frames 0, 1, 2 were correctly sent but frame 3 was lost. Again frames 4, 5,6,7,8 were correctly sent. The acknowledgement of frame 7 was lost due to a network error and all the other acknowledgements of the received packets were reached the transmitter. (a) Draw signal flow charts for the above two systems (10 marks) (b) If the time taken to send a frame and receive its acknowledgement is to in both the above systems, estimate the time consumed by each system to complete the transmission. 5