HCS12 Microcontroller and Embedded Systems: Using Assembly and C with CodeWarrior 1 st Edition
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1 Online Instructor s Manual to accompany HCS12 Microcontroller and Embedded Systems: Using Assembly and C with CodeWarrior 1 st Edition Muhammad Ali Mazidi Danny Causey Prentice Hall Boston Columbus Indianapolis New York San Francisco Upper Saddle River Amsterdam Cape Town Dubai London Madrid Milan Munich Paris Montreal Toronto Delhi Mexico City Sao Paulo Sydney Hong Kong Seoul Singapore Taipei Tokyo
2 Copyright 2009 Pearson Education, Inc., publishing as Prentice Hall, Upper Saddle River, New Jersey and Columbus, Ohio. All rights reserved. Manufactured in the United States of America. This publication is protected by Copyright, and permission should be obtained from the publisher prior to any prohibited reproduction, storage in a retrieval system, or transmission in any form or by any means, electronic, mechanical, photocopying, recording, or likewise. To obtain permission(s) to use material from this work, please submit a written request to Pearson Education, Inc., Permissions Department, One Lake Street, Upper Saddle River, New Jersey. Many of the designations by manufacturers and seller to distinguish their products are claimed as trademarks. Where those designations appear in this book, and the publisher was aware of a trademark claim, the designations have been printed in initial caps or all caps ISBN-13: ISBN-10:
3 CHAPTER 0: INTRODUCTION TO COMPUTING SECTION 0.1: NUMBERING AND CODING SYSTEMS (a) = (b) = (c) = (d) = (e) = (a) = (b) = (c) = (d) = (e) = (a) = (b) = (c) = 1D 16 (d) = 0A 16 (e) = (a) 2B9 16 = , (b) F44 16 = , (c) = , (d) 2B 16 = , (e) FFFF 16 = , (a) = 0C 16 (b) = 7B 16 (c) = 3F 16 (d) = (e) = 3E8 16 (a) = (b) = (c) = (d) = (a) 2C+3F = 6B (b) F34+5D6 = 150A (c) FF = 212FF (d) FFFF+2222 = (a) 24F-129 =
4 (b) FE9-5CC = A1D 16 (c) 2FFFF-FFFFF = (d) 9FF25-4DD99 = 5218C (a) Hex: 30, 31, 32, 33, 34, 35, 36, 37, 38, 39 (b) Binary: , , , , , , , , , ASCII (hex) Binary E 53 2E 41 2E F 75 "U.S.A. is a cou E D 0A E 20 4E 6F ntry".."in North D D 0A America".. SECTION 0.2: DIGITAL PRIMER 11. A B C A B C Y
5 13.. A B C A B C Y A B C A B C Y A B C Y
6 17. A B C Y LSB 19. LSB 20. CLK D Q No X NC Yes 0 0 Yes 1 1 SECTION 0.3: SEMICONDUCTOR MEMORY 21. (a) 4 (b) 4 (c) 4 (d) , 2 20 (e) 1024K (f) , 2 30 (g) K (h) 1024M (i) , 8192K
7 22. Disk storage capacity / size of a page = (2*2 30 ) / (25*80) = 1 million pages 23. (a) 9FFFFh 10000h = 8FFFFh = bytes (b) 576 kbytes = (a) FFh, 255 (b) FFFFh, (c) FFFF FFFFh, (d) FFFF FFFF FFFF FFFFh, (a) 2 16 = 64K (b) 2 24 = 16M (c) 2 32 = 4096 Mega, 4G (d) 2 48 = 256 Tera, Giga, Mega 27. Data bus is bidirectional, address bus is unidirectional (exit CPU). 28. The storage of the chip is measured in Megabits while the Computer memory is measured in Megabytes. 29. True, the more address lines the more memory locations. 30. True, the memory location size is fixed. 31. True, the more data lines the more memory locations 32. True 33. access time 34. True 35. electrically erasable 36. True 37. DRAM 38. SRAM 39. DRAM and SRAM 40. (c) 41. (c) 42. (a) 32Kx8, 256K (f) 8Kx1, 8K (b) 8Kx8, 64K (g) 4Kx8, 32K (c) 4Kx8, 32K (h) 2Kx8, 16K (d) 8Kx8, 64K (i) 256Kx4, 1M (e) 4Mx1, 4M (j) 64Kx8, 512K 43. (a) 128K 14 8 (f) 256K 8 4 (b) 256K 15 8 (g) 8M 20 8 (c) 512K 16 8 (h) 16M 11 4 (d) 2M 18 8 (i) 512K 16 8 (e) 512K h - 7FFFh 45. A0 A11 A12 A ~CS
8 h - 8FFFh, B000h - BFFFh, E000 - EFFFh 47. A0 A12 8kx8 A13 A14 A15 Vcc U? A B C G1 G2AN G2BN Y0N Y1N Y2N Y3N Y4N Y5N Y6N Y7N ~CS Each controls 8K bytes block h - 7FFFh, C000h - DFFFh, E000h - FFFFh 49. A0 A14 32kx8 A15 A16 A17 Vcc U? A B C G1 G2AN G2BN Y0N Y1N Y2N Y3N Y4N Y5N Y6N Y7N ~CS Each controls 32K bytes block h - 7FFFh, 8000h - BFFFh, C000h - FFFFh SECTION 0.4: CPU AND HARVARD ARCHITECTURE 51. PC ( Program Counter ) 52. ALU is responsible for all arithmetic and logic calculations in the CPU. 53. Address, control and data SECTION 0.5: RISC ARCHITECTURE 54. RISC stands for "Reduced Instruction Set Computer". CISC stands for "Complex (or Complete) Instruction Set Computer". 55. CISC
9 56. RISC 57. RISC 58. CISC Full file at
10 CHAPTER 1: THE HCS12 MICROCONTROLLERS: HISTORY AND FEATURES SECTION 1.1: MICROCONTROLLERS AND EMBEDDED PROCESSORS 1. False. 2. True. 3. True. 4. True. 5. CPU, RAM, ROM, EEPROM, I/O, Timer, Serial COM port, ADC. 6. RAM and ROM. 7. Keyboard, mouse, printer. 8. Computing power and compatibility with millions and millions of PCs. 9. PIC 16x Microchip Technology, Intel, AVR Atmel, Z8 Zilog, 68HC11 Freescale Semiconductor (Motorola) Power consumption. 12. The ROM area is where the executable code is stored. 13. Very, in case there is a shortage by one supplier. 14. Suppliers other than the manufacturer of the chip. 15. B is absolutely wrong, 16 bit software can not run on a 8 bit system due to special instructions and registers. But A can be true (in the case of software compatibility). SECTION 1.2: OVERVIEW OF THE CPU12 AND CPU Kbytes Kbytes Kbytes 19. 4K K1bytes Flash 22. Flash 23. (a) 14 Kbytes (b) 12 Kbytes (c) 2 Kbytes 24. OTP (see the letter 'C')
11 CHAPTER 2: HCS12 ARCHITECTURE & ASSEMBLY LANGUAGE PROGRAMMING SECTION 2.1: INSIDE THE HCS FFH 5. necessary 6. The result is 28H, stored in Accumulator A. 7. In (a) and (d) the operand exceeds allowed range. The syntax of (g) is wrong, since ADDA can have only one operand ( ADDA mybyte, or, ADDA #$50 ). 8. (a), (c) and (d) exceed the allowed range. 9. The result is 44H in accumulator A. 10. The result is FFH in accumulator A. 11. FFH 12. False. There is only one register A and one register B. SECTION 2.2: THE HCS12 MEMORY MAP KBytes 14. True 15. False. Registers are part of Register space. 16. True 17. False 18. False. There are also Register Space and unused space. 19. (a) 14 KBytes (b) 1 KBytes 20. Data RAM is used to store temporary data, and when power goes off its information is lost. But, we use EEPROM to store nonvolatile data that must remain intact even when the power is turned off. 21. Yes, some chips have no EEPROM, page No, the HCS12 needs RAM for volatile data. 23. Flash KBytes H 26. Registers 000-3FFF, RAM FFF, EEPROM FFF, Code ROM C000-FFFF SECTION 2.3: HCS12 ADDRESSING MODES H 28. LDAA #$30 STAA $805 LDAA #$97 STAA $806
12 29. LDAA #$55 STAA $300 STAA $301 STAA $302 STAA $303 STAA $304 STAA $305 STAA $306 STAA $307 STAA $ LDAA #5F STAA PORTB 31. (b) LDAA $30 is Extended mode addressing. 32. (a) Direct, (b) Immediate, (c) Extended, (d) Immediate, (e) Inherent, (f) Inherent 33. (a) 3 Byte, (b) 2 Byte, (c) 3 Byte, (d) 2 Byte, (e) 1 Byte, (f) 1 Byte H 35. Direct Addressing 36. Immediate Addressing 37. Direct Addressing 38. Extended Addressing 39. Invalid H 8FFH 41. Registers X and Y 42. True SECTION 2.4: CONDITION CODE REGISTER bit 44. C = bit 0, H = bit V = bit 1, N = bit The C flag = 1 when there is a carry out from the D7 bit after an 8-bit arithmetic operation. 47. The H flag = 1 when there is a carry from the D3 to D4 bit after an 8-bit arithmetic operation. 48. FFH + 1 = 100H, but since register A is only 8-bit the Z and C flags are both = (a) 118H, so C = 1 (b) FFH, so C = 0 (c) 104H, so C = LDAA #$55 ADDA #$55 ADDA #$55 STAA $1200
13 SECTION 2.5: HCS12 DATA FORMAT AND DIRECTIVES 51. MYDAT_1 = 37H MYDAT_2 = 62H MYDAT_3 = 47H MYDAT_4 = 50H MYDAT_5 = C8H MYDAT_6 = 41H MYDAT_7 = AAH MYDAT_8 = FFH MYDAT_9 = 90H MYDAT_10 = 7EH MYDAT_11 = 0AH MYDAT_12 = 0FH 52. DAT_1 = 16H DAT_2 = 56H DAT_3 = 99H DAT_4 = 20H DAT_5 = F6H DAT_6 = 7BH 53. R0 EQU $300 R1 EQU $301 R2 EQU $302 R3 EQU $303 R4 EQU $304 R5 EQU $305 (a) LDAA #$11 STAA R0 STAA R1 STAA R2 STAA R3 STAA R4 STAA R5 (b) CLRA ADDA R0 ADDA R1 ADDA R2 ADDA R3 ADDA R4 ADDA R5
14 SECTION 2.6: INTRODUCTION TO HCS12 ASSEMBLY PROGRAMMING AND SECTION 2.7: ASSEMBLING AND LINKING A HCS12 PROGRAM 54. low - high 55. Assembly. 56. Assembler 57. True. 58. List file, with extension.lst. 59. False. 60. False. END is optional for HCS12, but is good practice to make the code readable. 61. No. 62. Because they only tell the assembler what to do and do not generate any op-codes. 63. True. 64. False. 65. True. 66. The file with.s19 extension is downloaded. 67. Three file extensions include:.asm,.lst, and.s19. SECTION 2.8: STACK AND DATA TRANSFER INSTRUCTIONS 68. The stack pointer points to the last used location. 69. decremented, incremented, False, RAM is used for stack. 72. True
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