TI TMS320C6000 DSP Online Seminar

Transcription

1 TI TMS320C6000 DSP Online Seminar Agenda Introduce to C6000 DSP Family C6000 CPU Architecture Peripheral Overview Development Tools express DSP Q & A

2 Agenda Introduce to C6000 DSP Family C6000 CPU Architecture Peripheral Overview Development Tools express DSP Q & A Different Needs? Multiple Families C2000 (C20/24/28) C1 C2 Lowest Cost Control Systems Segway Motor Control Storage Digital Ctrl Systems C5000 (C54/55/OMAP) C5 Efficiency Best MIPS per Watt / Dollar / Size Wireless phones Internet audio players Digital still cameras Modems Telephony VoIP C6000 (C62/64/67) C3 C4 C8 Ma Performance with Best Ease-of-Use Multi Channel and Multi Function App's Wireless Base-stations DSL Imaging & Video Home Theater Performance Audio Multi-Media Servers Digital Radio

3 C6000 DSP TM ¾ World s highest-performance DSP C64TM DSP ¾Shipping at 1GHz 2001 Innovation of the Year EDN Magazine Best DSP of 2001 ¾ Heart of solutions for new, high-bandwidth communications and video equipment ¾Wireless base-stations and transcoders ¾DSL ¾Home theater audio ¾IBOC digital radio ¾Imaging and video servers & gateways InStat/MicroDesign Resources ¾ Millions shipped to hundreds of customers ¾ New generation C64 DSP products fully code compatible C6000 Roadmap Software Compatible C64TM Net C6416T C6415T C6418 C6414T C6416 C6201 C6204 C6202 C6205 C6203 C6415 C6414 t n C6413 i Po C6412 d e Fi C6410 C6712D C6211 C6712 C MHz C MHz C6711D 100 MHz in g Float t Poin 150 MHz 200 MHz C MHz C67TM Net

4 DM64 DSP for Image/Video Application Agenda Introduce to C6000 DSP Family C6000 CPU Architecture Peripheral Overview Development Tools express DSP Q & A

5 The C62/C67 CPU Instruction Fetch Instruction Dispatch Instruction Decode Control Registers Emulation Interrupt Control Registers (A0 - A15) Registers (B0 - B15) L1 S1 M1 X D1 D2 X M2 S2 L2 The C64 CPU Instruction Fetch Instruction Dispatch Advanced Instruction Packing Instruction Decode Control Registers Emulation Advanced Emulation Interrupt Control Registers (A0 - A15) Registers (A16 - A31) Registers (B0 - B15) Registers (B16 - B31) L1 S1 M1 X X D1 D2 X X M2 S2 L2

6 Agenda Introduce to C6000 DSP Family C6000 CPU Architecture Peripheral Overview Development Tools express DSP Q & A Eample C6000 System Switches Lamps Latches FPGA Etc. / 2 /2 / 0-16 Reset NMI Et Interrupts / 4 Timer / Counters GPIO HWI VCP C6000 CPU TCP PLL Utopia 2 McASP / 8 / 3 / 3 Clockin Clockout Clockout ATM Audio Codec PCI / 32 PCI EDMA McBSP / 3 / 3 Serial Codec Host µp / 16 or 32 HPI Boot Loader EMIF EMAC \ 16, 32, or 64-bits Ethernet (TCP/IP stack avail) EPROM SDRAM Sync SRAM

7 DM642 DSP Architecture Application Video Surveillance Programmable Digital Video Appliance Application Input/Output Decode/Encode: translate analog digital formats EMAC: outputs video to 10/100 Ethernet network VP: capture/store/output digital audio/video Memory SDRAM: used for system/algorithm code Internal Mem: used for critical algorithms and data Control Logic: interface to HDD for video storage Comple Video Algorithms MPEG4 decode (up to 4 channels at D1 (720480), 30 frames/sec) Simultaneous MPEG4 encode/decode possible Video encryption (for security) Video formatting & analysis Video In NTSC/PAL Decoder SDRAM Control Logic BT.656 E M IF VP0/1 EMAC Ethernet PHY Video Out NTSC/PAL Encoder DSP Core VP2 TMS320DM642

8 Agenda Introduce to C6000 DSP Family C6000 CPU Architecture Peripheral Overview Development Tools express DSP Q & A Development Environment Target Board JTAG Emulator Code Composer Studio (CCS) CCS

9 Target Board TMS320C6713DSK DSP, SDRAM, Flash, Audio Codec TMS320C6416DSK DSP, SDRAM, Flash, Audio Codec TMS320DM642EVM DSP, SDRAM, Flash, Audio Codec, Video decoder and encoder JTAG Emulator TI XDS560 PCI JTAG Emulator Spectrum Digital XDS510 PP PLUS JTAG Emulator SEED XDSusb2.0 JTAG Emulator SEED XDS510 PP JTAG Emulator

10 Code Composer Studio Compiler Asm Opto Standard Runtime Libraries SIM DSK Edit Asm Link.out Debug EVM DSP/BIOS Config Tool DSP/BIOS Libraries Third Party DSK s Code Composer Studio Includes: Integrated Edit / Debug GUI Simulator Code Generation Tools BIOS: Real-time kernel Real-time analysis XDS DSP Board What is a Project? Project (.PJT) file contain: References to files: Source Libraries Linker, etc Project settings: Compiler Options DSP/BIOS Linking, etc

11 Agenda Introduce to C6000 DSP Family C6000 CPU Architecture Peripheral Overview Development Tools express DSP Q & A What is express DSP? A premier, open DSP software strategy for TI s Leadership TMS320 DSP Family 3 rd Party Network CCS DSP/BIOS XDAIS Target Content

12 DSP/BIOS Consists Of: Real-time analysis tools Allows application to run uninterrupted while displaying debug data Real-time scheduler Preemptive thread mgmt kernel Real-time I/O (Drivers) Allows two-way communication between threads or between threads and hardware Real-Time Analysis Tools Gather data on target (3-10 CPU cycles) Send data during BIOS IDLE (100s of non-critical cycles) Format data on host (1000s of host PC cycles) Data gathering does NOT stop target CPU Eecution Graph Software logic analyzer Debug event timing and priority CPU Load Graph Analyze time NOT spent in IDLE

13 Real-Time Analysis Tools LOG_printf (&logtrace, addsine ENabled ); Statistics View Profile routines w/o Message LOG halting the CPU Capture & analyze data without stopping CPU Send debug msgs to host Doesn t halt the DSP Deterministic, low DSP cycle count More efficient than traditional printf() TI TMS320 DSP Algorithm Standard ALGORITHM PRODUCERS Algorithm Write once, deploy widely TEXAS INSTRUMENTS TMS320 DSP Algorithm Standard Specification ( XDAIS ) Rules & Guidelines Applied to Algorithm Software Modules Programming Rules Standard Interface Defined by TI Algorithm Packaging Algorithm Performance SYSTEM INTEGRATORS Application Off-the-shelf DSP content Ease of integration Purchase once, use widely

14 is your starting point dspvillage.ti.com Getting Started Discussion Groups DSP Knowledge Base Third Party Network expressdsp Guided Tour Sign up for Training 1 day or 4 day workshops 1 day DSK workshops C2000, C5000, C6000 DSP/BIOS expressdsp analog.ti.com Design Resources Technical Documents Solution/Selection Guides Install Code Composer Studio Free Evaluation Tools (FET) from the Essential Guide to DSP CD Check out the DSP Selection Guide, it s your consolidated resource for all pertinent information Applications Solutions Find complete solutions for your application including: DSP, Analog, Boards Target Software, Development tools, third party support

15 Agenda Introduce to C6000 DSP Family C6000 CPU Architecture Peripheral Overview Development Tools express DSP Q Q & A