操作系统概念 13. I/O Systems

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1 OPERATING SYSTEM CONCEPTS 操作系统概念 13. I/O Systems 东南大学计算机学院 Baili Zhang/ Southeast 1 Objectives 13. I/O Systems Explore the structure of an operating system s I/O subsystem Discuss the principles of I/O hardware and its complexity Provide details of the performance aspects of I/O hardware and software Baili Zhang/ Southeast 2 1

2 13.1 Overview 13. I/O Systems 13.3 Application I/O Interface 13.4 Kernel I/O Subsystem 13.5 Transforming I/O Requests to Hardware Operations 13.6 STREAMS 13.7 Performance Baili Zhang/ Southeast Overview Main jobs of a computer Processing (computing) I/O I/O operation I/O devices I/O System of OS I/O devices vary so widely in their function and speed Varied methods are needed to manage and control them These methods form the I/O subsystem of the kernel Baili Zhang/ Southeast 4 2

3 13.1 Overview Two conflicting trends of I/O device technology Increasing standardization of I/O hardware and software interface It s easy to incorporate improved device generations into existing systems Increasingly broad variety of I/O devices It s difficult to incorporate them into our computers and OS Baili Zhang/ Southeast Overview Solution:combination of hardware and software techniques Hardware Basic I/O hardware elements Ports, buses and device controllers Accommodate a wide variety of I/O devices Software The kernel of an OS is structured to use devicedriver modules Device drivers Encapsulate the details and oddities of different devices Present a uniform device-access interface to the I/O subsystem Baili Zhang/ Southeast 6 3

4 13.1Overview 13. I/O Systems 13.3 Application I/O Interface 13.4 Kernel I/O Subsystem 13.5 Transforming I/O Requests to Hardware Operations 13.6 STREAMS 13.7 Performance Baili Zhang/ Southeast 7 General categories of I/O devices Storage devices Disks, tapes Transmission devices Network card, modems Human-interface devices Screen, keyboard, mouse Specialized devices The steering of fighter, a space shuttle Baili Zhang/ Southeast 8 4

5 Connection for devices communicating with a computer system Port A serial port, a parallel port Bus (daisy chain or shared direct access) A set of wires and a rigidly defined protocol PCI, ISA, SCSI Controller Is a collection of electronics that can operate a port, a bus or a device Serial port controller, SCSI controller (host adapter), IDE controller, Baili Zhang/ Southeast 9 A typical PC bus structure Baili Zhang/ Southeast 10 5

6 How can the processor give commands and data to a controller to accomplish an I/O transfer The controller has one or more registers Typically I/O controller has 4 types of registers Status registers Control registers Data-in registers Data-out registers These device registers have addresses, that can be accessed by processor Baili Zhang/ Southeast 11 Device I/O Port Locations on PCs (partial) Baili Zhang/ Southeast 12 6

7 Three ways to accomplish an I/O transfer Direct I/O instructions Memory-mapped I/O Direct I/O + memory mapped I/O Direct I/O instructions There are some special I/O instructions that specify the transfer of a byte or a word to an I/O port address The I/O instruction triggers bus lines to select the proper device and to move bits into or out of a device register Baili Zhang/ Southeast 13 Memory-mapped I/O The device-control registers are mapped into the address space of the processor( memory space of process ) The CPU executes I/O requests using standard memory read and write A memory-mapped device registers is vulnerable to accident modification Baili Zhang/ Southeast 14 7

8 Three interaction models between I/O controllers and CPUs Polling Interrupt DMA Baili Zhang/ Southeast 15 Polling Handshaking to coordinate the producer-consumer relationship between the controller and the host (CPU) An example Two bits The busy bit in the status register indicates if the controller is busy or not. The command-ready bit in the control/command register indicates if the a command is available or not for the controller to execute. Baili Zhang/ Southeast 16 8

9 Handshaking mechanism works as follows: The host repeatedly reads the busy bit until that it becomes clear (busy waiting or polling) The host sets the write bit in the command register and writes a byte into the data-out register The host sets the command-ready bit When the controller notices that the command-ready bit is set, it sets the busy bit The controller reads the command register and sees the write command. It reads the data-out register to get the byte, and does the I/O to the device. The controller clears the command-ready bit, clears the error bit in the status register to indicate that the device I/O succeeded, and clears the busy bit to indicate that it is finished. Baili Zhang/ Southeast 17 Interrupts Disadvantage of polling Polling becomes inefficient when it rarely finds a device to be ready for service It may be more efficient for controller to notify the CPU when the device becomes ready for service interrupt Interrupt mechanism After executing every instruction, the CPU senses the interrupt-request line to find whether a control has asserted a signal on the line The CPU performs a state save and jumps to the interrupt-handler routine at a fixed address in memory Baili Zhang/ Southeast 18 9

10 Interrupt handler determines the cause of interrupt Performs the necessary processing Performs a state restore Executes a return from interrupt instruction to return the CPU to the execution state prior to the interrupt receives interrupts The basic interrupt mechanism enables the CPU to respond to an asynchronous event Baili Zhang/ Southeast 19 Interrupt-Driven I/O Cycle Baili Zhang/ Southeast 20 10

11 More complex interrupt features is needed in modern OS Be able to defer interrupt handling during critical processing Need an efficient way to dispatch to the proper interrupt handler for device without polling all the devices to see which one raised the interrupt Be able to distinguish between high-priority and lowpriority interrupts and respond with the appropriate degree of urgency these are provided by CPU and interrupt-controller hardware Baili Zhang/ Southeast 21 Two interrupt request lines Nonmaskable interrupt line For events such as unrecoverable memory errors Maskable interrupt line For device controllers It can be turned off by the CPU before the execution of critical instruction Interrupt vector Contains the memory addresses of specialized interrupt handlers Reduces the need for a interrupt handler to search all possible sources of interrupts Baili Zhang/ Southeast 22 11

12 Interrupt chaining:computers have more devices (interrupt handler) than address elements in the vector Each type of devices has an elements in vector Each element points to the head of a list of interrupt handlers When an interrupt is raised, the handlers one the list are called one by one, until one is found that can serve the request The chain structure is compromise between the overhead of a huge interrupt vector and inefficiency search for a interrupt handler Baili Zhang/ Southeast 23 Intel Pentium Processor Event-Vector Table Baili Zhang/ Southeast 24 12

13 Interrupt priority level Enable the CPU to defer the handling of low-priority interrupts without masking off all interrupt Enable the high-priority to preempt the execution of a low-priority interrupt A threaded kernel architecture is well suited to implement multiple interrupt priorities Baili Zhang/ Southeast 25 Interrupt mechanism also used for exceptions Dividing by zero, accessing a protected or nonexistent address, executing a privilege instruction for users Induce the CPU to execute an urgent, self-contained routine Page fault saves a small amount of processor state and then call a privileged routine in the kernel system calls Software interrupt, trap When a process executes the trap instruction Interrupt hardware saves the state of the user code, switcher to supervisor mode and then dispatches to the kernel routine Baili Zhang/ Southeast 26 13

14 The trap is given a relatively low interrupt priority compared with device interrupts executing a system call on behalf of an application Manage the flow of control within the kernel Sum: Interrupts are used throughout modern operating systems to handle asynchronous events and to trap to supervisor-mode routines in the kernel Baili Zhang/ Southeast 27 Direct Memory Access (DMA) PIO (programmed I/O) Use CPU to watch status bit and feed data into a controller register one byte at a time It seems wasteful to do large data transfer for an expensive general-purpose processor DMA controller Offloading some PIO to a special-purpose processor called a DMA controller To initiate a DMA, the CPU writes a command block into memory A pointer to the source, a pointer to the destination, and the number of bytes to be transferred The CPU writes the address of this command block to the DMA controller, and goes on with other work Baili Zhang/ Southeast 28 14

15 Six Step Process to Perform DMA Transfer Baili Zhang/ Southeast 29 Bypasses CPU to transfer data directly between I/O device and memory Cycle stealing ( 周期挪用 ) When DMA control seizes the memory bus, the CPU is prevented from accessing main memory It slow down the CPU computation, but improves the total system performance Baili Zhang/ Southeast 30 15

16 13.1Overview 13. I/O Systems 13.3 Application I/O Interface 13.4 Kernel I/O Subsystem 13.5 Transforming I/O Requests to Hardware Operations 13.6 STREAMS 13.7 Performance Baili Zhang/ Southeast Application I/O Interface Kernel I/O structure Devices vary in many dimensions Character-stream or block Sequential or random-access Sharable or dedicated Speed of operation read-write, read only, or write only Baili Zhang/ Southeast 32 16

17 13.3 Application I/O Interface Characteristics of I/O Devices Baili Zhang/ Southeast Application I/O Interface For the purpose of application access the devices are grouped into a few types/ classes I/O system calls encapsulate device behaviors in generic classes Device-driver layer hides differences among I/O controllers from kernel Baili Zhang/ Southeast 34 17

18 13.3 Application I/O Interface A Kernel I/O Structure Baili Zhang/ Southeast Application I/O Interface Each type is accessed through a standardized set of functions an interface Convention system call to access Block I/O Character-stream I/O Memory-mapped file access Network sockets Special system call to access Time-of-day clock Timer Graphical display Baili Zhang/ Southeast 36 18

19 13.3 Application I/O Interface* Block and Character Devices Block devices include disk drives and other blockoriented devices: Commands include read, write, seek Raw I/O or file-system access Memory-mapped file access possible Character devices include keyboards, mice, serial ports Commands include get(), put() Libraries layered on top allow line editing Baili Zhang/ Southeast Application I/O Interface Network Devices Varying enough from block and character to have own interface Unix and Windows NT/9x/2000 include socket interface Separates network protocol from network operation Includes select() functionality Approaches vary widely (pipes, FIFOs, streams, queues, mailboxes) Baili Zhang/ Southeast 38 19

20 13.3 Application I/O Interface Clocks and Timers Provide current time, elapsed time, timer Programmable interval timer used for timings, periodic interrupts ioctl() (on UNIX) covers odd aspects of I/O such as clocks and timers Baili Zhang/ Southeast Application I/O Interface Blocking and Nonblocking I/O Blocking - process suspended until I/O completed Easy to use and understand Insufficient for some needs Nonblocking - I/O call returns as much as available User interface, data copy (buffered I/O) Implemented via multi-threading Returns quickly with count of bytes read or written Asynchronous - process runs while I/O executes Difficult to use I/O subsystem signals process when I/O completed Baili Zhang/ Southeast 40 20

21 13.3 Application I/O Interface Two I/O Methods Baili Zhang/ Southeast Overview 13. I/O Systems 13.3 Application I/O Interface 13.4 Kernel I/O Subsystem 13.5 Transforming I/O Requests to Hardware Operations 13.6 STREAMS 13.7 Performance Baili Zhang/ Southeast 42 21

22 13.4 Kernel I/O Subsystem* Kernel provide several services to I/O I/O scheduling Buffering Caching Spooling and device reservation Error handling Kernel data structures Baili Zhang/ Southeast Kernel I/O Subsystem I/O Scheduling I/O request queue for a device Some OSs try fairness(disk I/O) Buffering store data in memory while transferring between devices To cope with device speed mismatch To cope with device transfer size mismatch To maintain copy semantics Baili Zhang/ Southeast 44 22

23 13.4 Kernel I/O Subsystem Device-status Table Baili Zhang/ Southeast Kernel I/O Subsystem Sun Enterprise 6000 Device-Transfer Rates Baili Zhang/ Southeast 46 23

24 13.4 Kernel I/O Subsystem Caching fast memory holding copy of data Always just a copy Key to performance Note: A buffer may hold the only existing copy of a data item, whereas a cache just holds a copy on a faster storage of an item that that resides elsewhere. Spooling hold output for a device If a device can serve only one request at a time i.e., Printing Baili Zhang/ Southeast Kernel I/O Subsystem Device reservation provides exclusive access to a device System calls for allocation and de-allocation Watch out for deadlock Error handling OS can recover from disk read, device unavailable, transient write failures Most return an error number or code when I/O request fails System error logs hold problem reports Baili Zhang/ Southeast 48 24

25 13.4 Kernel I/O Subsystem I/O Protection User process may accidentally or purposefully attempt to disrupt normal operation via illegal I/O instructions All I/O instructions defined to be privileged I/O must be performed via system calls Memory-mapped and I/O port memory locations must be protected too Baili Zhang/ Southeast Kernel I/O Subsystem Use of a System Call to Perform I/O Baili Zhang/ Southeast 50 25

26 13.4 Kernel I/O Subsystem Kernel data structures Kernel keeps state info for I/O components, including open file tables, network connections, character device state Many, many complex data structures to track buffers, memory allocation, dirty blocks Some use object-oriented methods and message passing to implement I/O Baili Zhang/ Southeast Kernel I/O Subsystem** UNIX I/O Kernel Structure Baili Zhang/ Southeast 52 26

27 13.1Overview 13. I/O Systems 13.3 Application I/O Interface 13.4 Kernel I/O Subsystem 13.5 Transforming I/O Requests to Hardware Operations 13.6 STREAMS 13.7 Performance Baili Zhang/ Southeast Transforming I/O Requests to Hardware Operations How the OS connects an application request to a hardware A example: reading a file from disk (1) Determine the device holding a file (2) Translate the name to the device representation C: represents the primary hard disk (3) Physically read data from disk into buffer (4) Make data available to the requesting process (5) Return control to the process Baili Zhang/ Southeast 54 27

28 13.5 Transforming I/O Requests to Hardware Operations Baili Zhang/ Southeast Transforming I/O Requests to Hardware Operations Details of (1) (2): How to map a filename to its disk controller For DOS, C:\junk.txt To find the partition To read the starting entry from FAT For Unix, /zapp/root/ To find the longest match from the mount table To get <major,minor> To read the inode To get the location of data blocks Baili Zhang/ Southeast 56 28

29 13.5 Transforming I/O Requests to Hardware Operations Details of (3):read Sys_read If in the cache, read from the cache Otherwise, read from the hard disk Issue a read request and add itself to the queue and block itself The device driver allocates the buffer to receive the data, and performs the data transfer The driver gets the data and interrupts the OS The process will be unblocked. Baili Zhang/ Southeast Overview 13. I/O Systems 13.3 Application I/O Interface 13.4 Kernel I/O Subsystem 13.5 Transforming I/O Requests to Hardware Operations 13.6 STREAMS 13.7 Performance Baili Zhang/ Southeast 58 29

30 13.6 STREAMS STREAM A full-duplex communication channel between a user-level process and a device An interesting mechanism of UNIX System V enables an application to assemble pipelines of driver code dynamically consists of: STREAM head interfaces with the user process driver end interfaces with the device zero or more STREAM modules between them. Each module contains a read queue and a write queue Message passing is used to communicate between queues Flow control is used to regulate the flow Baili Zhang/ Southeast STREAMS The STREAMS Structure Baili Zhang/ Southeast 60 30

31 13.1Overview 13. I/O Systems 13.3 Application I/O Interface 13.4 Kernel I/O Subsystem 13.5 Transforming I/O Requests to Hardware Operations 13.6 STREAMS 13.7 Performance Baili Zhang/ Southeast Performance I/O a major factor in system performance: Demands heavily CPU to execute device driver, kernel I/O code to schedule processes fairly and efficiently as they block and unblock The resulting context switches due to interrupts stress the CPU and its hardware caches Load down the memory bus during data copying between controllers and physical memory between kernel buffers and application data space Baili Zhang/ Southeast 62 31

32 13.7 Performance An example: network traffic especially stressful Baili Zhang/ Southeast Performance Improving Performance How to improve Reduce number of context switches Reduce the times of data copying between the device and the application Reduce interrupts by using large transfers, smart controllers, polling (if busy waiting can be minimized) Use DMA controllers or channels to offload simple data copying from the CPU Move processing primitives into hardware Balance CPU, memory, bus, and I/O performance for highest throughput Baili Zhang/ Southeast 64 32

33 13.7 Performance Where to implement To implement experimental I/O algorithms at the application level, because application code is flexible, and application bugs are unlikely to cause system crashes. Avoiding rebooting or reloading device driver To reimplement the code at the kernel (driver) Debugging is difficult, but code run fast. To reimplement the code at the controller or device (hardware) Fastest, Less flexible. Baili Zhang/ Southeast 65 33

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