APPLICATION NOTE. Using DoCD debugger with Keil uvision2/3/4/5 tool. v.4.06

Transcription

1 APPLICATION NOTE Using DCD debugger with Keil uvisin2/3/4/5 tl v.4.06

2 Cntents 1. Overview 3 2. Supplied files 3 3. Installatin 3 4. Preparing t wrk with uvisin2/3/4/5 interface 4 5. Debugging an example prject 8 6. Ntes n Breakpints FLASH prgramming References Ordering Infrmatin and Supprt 12 Cnfidential Data -2-

3 1. OVERVIEW The DCD debugger fully supprts Keil uvisin2/3/4/5 AGDI interface t hardware debuggers. It allws Keil sftware users t wrk within uvisin2/3/4/5 envirnments withut switching between Keil cmpiler and external DCD sftware. Everything - cmpilatin, simulatin, debugging - is under cntrl f a single applicatin. This dcument describes hw t install and use DCD debugger with prgrams written using Keil C/ASM tls. 2. SUPPLIED FILES The delivered package cntains a cmplete set f files, needed t run DCD debugger inside uvisin2/3/4/5 interface. The fllwing directries can be fund after successful installatin f package: - when Target drivers fr 8051/80390 was chsen during the installatin.\c51\bin\.\c51\flash\.\c51\inc\dcd\.\c51\lib\.\c51\examples\dcd\.\datashts\dcd\.\uv2\ - when Target drivers fr was chsen during the installatin.\c251\bin\.\c251\inc\dcd\.\c251\examples\dcd\.\c251\lib\ : Cntains DCD debugger DLL Target driver file : Cntains DCD debugger FLASH cnfiguratin files : Cntains DCD's 8051/80390 include files : Cntains startup files : Cntains example C/ASM 8051 applicatin : Cntains DCD's 8051/80390 related PDF files : Cntains DCD's 8051/80390 uvisin2/3/4/5 database : Cntains DCD debugger DLL Target driver file : Cntains DCD's include files : Cntains example C/ASM applicatin : Cntains startup files This package is delivered t all existing DCD's custmers. Yu may als rder the DCD FPGA evaluatin kit by ing us directly iinnf i f@ddccdd...ppl ll, and receive cmplete debug system t start wrking with ur 8051/80390/80251 IP Cres. 3. INSTALLATION Manual installatin f DCD target driver is n lnger required, because package is delivered as executable prgram, and all steps are perfrmed autmatically by setup prgram. The descriptin prvided belw is left fr infrmatinal purpses. In rder t check DCD target driver fllw the steps: Install uvisin2/3/4/5 and the C51 Cmpiler n yur machine. Yu may try t use evaluatin versin f 8051 Keil sftware at hh ttt tpp: ::////wwwwww...kkeei iil ll... ccm// dd eem// eevvaal ll// cc hht tm r use evaluatin versin f Keil sftware at hht ttpp: ::////wwwwww...kkeei iil ll...ccm//dd eem//eevvaal ll// cc hht tm Check if new files appeared inside <Keil install path>\c51\bin, <Keil install path>\c51\flash, <Keil install path>\c51\libs, <Keil install path>\c251\inc\dcd, <Keil install path>\uv2 and <Keil install path>\c51\examples\dcd directries. When Target driver fr ptin is checked, verify if new files appeared inside <Keil install path>\c251\bin, <Keil install path>\c251\libs, <Keil install path>\c251\inc\dcd, and <Keil install path>\c251\examples\dcd directries. Check if the fllwing lines are in TOOLS.INI file lcated inside <Keil install path>\ flder: sectin [C51]: TDRV0=BIN\ DCD_DCD_51.DLL ("DCD 8051 USB Target Driver") Nte: if TDRV0 are already in use, then use the next free number, fr example TDRV1 TDRV2 sectin [C251]: TDRV0=BIN\ DCD_DCD_251.DLL ("DCD USB Target Driver") Nte: if TDRV0, TDRV1 are already in use, then use the next free number, fr example TDRV1 TDRV2 sectin [UV2]: CDB0=UV2\DCD.CDB("Digital Cre Design") Nte: if CDB0 is already in use, then use the next free digit, fr example CDB1 Nte: the entry in [C251] will be added nly when Target Driver fr ptin is selected during the installatin Cnfidential Data -3-

4 4. PREPARING TO WORK WITH UVISION2/3/4/5 INTERFACE In rder t run yur applicatin inside hardware using DCD target driver fllw the steps: Run µvisin2/3/4. Select Prject Open Prject, the Select Prject dialg cmes up. Select the DCD.uv2 prject. It can be fund nrmally in the flder - <Keil install path>\c51\examples\dcd. Select Optins fr Target Devices'. Frm the 'Database' list-bx, select Digital Cre Design which is ur devices database. Select required micrcntrller type yu actually have. If everything is right, then the dialg shuld lk like this: Select Rebuild all target files t build the prject. Select Optins fr Target Debug. Frm the cmb-bx, select DCD 8051 USB Target Driver which is ur USB DCD driver. Make sure that the Use: radi buttn is checked. If everything is crrect, then the dialg shuld lk like this: Cnfidential Data -4-

5 There are three ptins t select JTAG, DTAG r TTAG. It depends n which versin f Debug IP cre yu have in yur system. Generally DTAG has 3 wires fr cmmunicatin, JTAG has 5 wires and TTAG has 2 wires. JTAG The DCD debug IP Cre v 4.00 and abve can be used as standalne device, as well as plugged int JTAG chain. It means that standard JTAG pins can be used, and ther JTAG devices can be cntrlled alng with DCD Debug IP. Such slutin saves ff-chip pins f ASIC/FPGA device. Pstfix Prefix tms Chip1 Debug IP Chip3 Chip4 HAD tdi tdi tms tck td tms tdi rtck tck td tdi tms tck td tdi tms tck td rtck tck td The example target shwn in figure abve cnsists f DCD Debug IP and three devices being fully JTAG cmpliant. The Chip1 has 5-bit lng IR (Instructin Register), Chip3 IR s has 3-bit lng, and Chip4 has 4-bit lng IR. A DR (Data Register) is always 1-bit lng fr each JTAG device. The fllwing values shuld be written int JTAG prt cnfiguratin windw: IR prefix (3+4), DR-prefix (1+1) IR pstfix (5), DR-pstfix (1) The 0 value shuld be written in an apprpriate IR and DR field, in case where there wuld be n any prefix r pstfix devices. DTAG Enter the actual clck frequency applied n-bard t glbal CLK pin f 8051 IP Cre. Allwed values are 1 MHz t 250 MHz. It means that DCD will be wrking prperly with CLK clck frequencies 2 times lwer and 2 times higher than entered value. TTAG Similarly as like in DTAG interface enter the actual clck frequency applied n-bard t glbal CLK pin f 8051 IP Cre. Allwed values are 1 MHz t 250 MHz. Cnfidential Data -5-

6 Memry ptin grup is used t prperly cnfigure DCD driver wrk with memries. The fllwing settings can be specified: Cache external data memry checking this bx allws driver t cache XDM memry cntent t imprve debugging perfrmance. Dwnlad cde frm memry checking this bx allws driver t read-back CODE memry cntent int Keil uvisin2/3/4 debugger. Uplad cde t memry checking this bx allws driver t write all CODE memry cntent int hardware. It is bvius that ROM memry r any ther memry withut write signal cnnected prperly cannt be written. Please nte when using FLASH memry yu need t cnfigure FLASH driver and use "Mre Settings" ptin t infrm debugger where FLASH area is lcated. Fllw t next sectin t btain FLASH prgramming details. Uplad int RAM chip select this ptin t prgramming RAM memry Uplad int FLASH chip select this ptin t use FLASH prgrammer t write prgram memry Uplad int OTP chip select this ptin t use OPT prgrammer t write One-Time prgramming ROM memry Cache cde memry checking this bx allws driver t cache CODE memry cntent inside Keil uvisin2/3/4 debugger. It significantly imprves debugging prcess. This checkbx can be mdified at any time during nrmal debugging prcess. It is recmmended t always have this bx checked. In case when yu have self-mdified cde then use Exclude cde space parameter. Exclude cde space checking this bx allws driver t update specified cde space directly frm hardware. Exclude cde space is limited t 2kB. This ptin is used when yu have self-mdifiable prgram. Ht Attach checking this bx allws driver t pass ver reset CPU while initializatin prcess Run CPU at the end when this ptin is enabled the CPU executes the prgram cde after the debug sessin has been finished Mre Settings is used fr managing a prgram spaces implemented in FLASH device. Up t three spaces are available. A fllwing dialg bx appears: Enabled enables a prgram memry spaces in FLASH device. Needs t be used when FLASH memry is used in system. Flash space 1,2,3 definitin f prgram memry spaces. The spaces shuld be separated and space with higher number must fllw space with lwer number (see example abve). At least ne space shuld be defined when this ptin is enabled. The remaining nt used spaces shuld have 0x0 values. Memry data width specifies width f prgram memry data bus Write executable segments nly when this ptin is set, the driver uplads nly the executable prgram cde, gaps between segments are nt filed in Max. prgram size specifies maximum prgram memry size, after which access will nt be allwed Cde Banking grup is used t prperly cnfigure DCD driver wrk with hardware banked memry. Usually this sectin is disabled. When Cde Banking Enable is checked then yu can specify fllwing settings: Banks chse number f supprted banks by yur prgram memry. It shuld be the same number as cnfigured in Keil C/ASM cmpiler. Bank Area it specifies bank start and end addresses Banks Switch Register defines address f register which switch memry banks (register can be lcated nly in SFR memry space) Bank Switch cnfigures a cmbinatin f bits which activates selected bank. The bits cmbinatin depends n yur actual hardware cnfiguratin. Repeat this step fr each bank selecting it by drp-dwn list. lcated at the left side. Cnfidential Data -6-

7 Advance buttn pens HAD device vltage settings windw 3,3; 2,5; 1,8; 1,5 V IO Vltage specifies I/O vltage n the HAD device Dn't ask again - always use selected value in this prject when this ptin is checked, DCD HAD drivers will nt ask fr vltage settings every time the debug sessin starts Clse the bth dialgs using 'OK' buttn. T discard all changes use 'Cancel' buttn. Cnfidential Data -7-

8 5. DEBUGGING AN EXAMPLE PROJECT This chapter describes hw t use DCD debugger with 8051 C/ASM applicatin basing n example DCD prject. It is assumed that the installatin and cnfiguratin steps had been perfrmed. Yu shuld als have DCD's 8051 cre with Debug IP running inside sme hardware prttype bard equipped with FPGA r ASIC chip. Please fllw the steps belw: Run µvisin2/3/4/5. Select Prject Open Prject, the Select Prject dialg cmes up. Select the DCD.uv2 prject. It can be fund nrmally in the flder - <Keil install path>\c51\examples\dcd. The dialg shuld lk like this: Select Rebuild all target files t build the prject. The build windw shwn abve shuld reprt n warnings and errrs. Start debugging by selecting 'Start/Stp Debug sessin' A warning dialg bx may pssibly be displayed after 5 secnds, if sme cmmunicatin prblems with hardware bard wuld be encuntered. In this case the cables shuld be checked fr prper cnnectin, and click Ok buttn. When hardware is prperly cnfigured, and prgram successfully upladed/dwnladed, then the debugger windw shuld lk similarly t picture belw: Cnfidential Data -8-

9 At this pint debugging prcess is similar as in uvisin2/3/4/5 simulatr. The prgram can be run, halted, run step by step, breakpints can be set/cleared. Variables can be watched, memry areas read/written/mdified. Cnfidential Data -9-

10 6. NOTES ON BREAKPOINTS The fllwing limitatins are applied t the uvisin2/3/4/5 debugger: 1. There are 4 independent cmplex hardware breakpints available. They can be set using cmmand line ptin r graphical bxes f uvisin2/3/4 tl while debugging sessin is active: - at CODE space (PC value). Example cmmand line: BS main - breakpint at main address Depending n the CPu cnfiguratin, 1-8 PC breakpints are always active regardless f CODE memry type (SRAM, FLASH). A red square displayed at the left side f C/ASM surce editr signalizes active CODE breakpint. Since Debug IP versin 3.50 and abve number f CODE breakpints is unlimited, and the can be set n RAM type f memry. CODE memry type is autmatically detected by driver, and assures true CODE breakpint activatin. - at DATA space (READ, WRITE nly). Example cmmand line: BS READ delay - break when delay variable is being read - at SFR space (READ, WRITE nly). Example cmmand line: BS WRITE DPH - break when DPH SFR register is being written - at XDATA space (READ, WRITE nly). Example cmmand line: BS WRITE x:0x34 - break when 0x34 address is being written Please refer t uvisin2/3/4/5 Debug Cmmands help file. Cnditinal breakpints are nt supprted. T manage breakpints select 'Debug Breakpints...' menu: Yu shuld see the Breakpints windw. The selected breakpint can be enabled, disabled, defined, r deleted. 2. Cde is autmatically upladed by uvisin2/3/4/5 while debugging sessin is being started, and is assumed that CODE memry is writtable as SRAM. If yu have FLASH chips then cnfiguratin f FLASH driver is needed. Refer t next chapter t d this. Please check DCD's 8051 IP Cres specificatin fr mre details abut Prgram Memry writes. 3. In case f read nly CODE memry (ROM, FLASH), user is respnsible fr prper image lading int physical chip hlding CODE. The CODE inside hardware memry must be identical with CODE used in uvisin2/3/4 sftware. In ther case debugging wn't wrk crrectly, and may crash with unexpected errrs. Cnfidential Data -10-

11 7. FLASH PROGRAMMING DCD debugger fully supprts prgramming f all FLASH memry devices. Such supprt is assured by cnfigurability f FLASH prgramming algrithm, and supprted devices database. New FLASH device can be easily added t existing base using build-in editr. DCD debugger allws user t simply perfrm in-system prgramming f its FLASH memry withut using any external equipment. In rder t use Flash Device Prgramming driver fllw the steps: Select Optins fr Target Utilities. Frm the cmb-bx, 'DCD 8051 USB Target Driver' which is DCD USB DCD driver. Make sure that the Use Target Driver fr Flash Prgramming: radi buttn is checked. If everything is crrect, then the dialg shuld lk like this: FLASH prgramming task is perfrmed directly within Debug sftware, and after uplading f cde, it is ready fr debugging. Prgramming time is very shrt, because f HAD2 supprt. This feature saves time, and makes usage f DCD's debugger very cmfrtable and flexible. Select 'Settings' buttn. The 'Flash Dwnlad Setup dialg' cmes up. This dialg allws yu t cnfigure DCD t wrk with yur FLASH device. There are tw way f cnfiguratin: Autdetect autmatically finds FLASH device when yu have cnnected DCD hardware bard (FPGA r ASIC) t yur wrkstatin. Cnfidential Data -11-

12 Manually - yu can chse device manually frm actual database list. Yu can specify FLASH ptins such as: Read FLASH ID by selecting this driver cmpares selected device ID with the real ID n yur hardware. If they dn't match then prgramming stps with errr message. Clear Lck-Bits - It clears sectr Lck-Bits set in FLASH memry. Must be selected t allw erase f chip befre uplading f new prgram. Nt all chips supprt this. Erase methd - If yu wrk n nn-blank device yu must select this ptin t erase. It almst always happens when yu develping cde and successfully uplading its newer versins.available ptins : Disable, Chip Erase, Sectr Erase Blank Check - selecting this the driver will check if the whle chip has been erased. Nt recmmended t use in case f large FLASH chips. Prgram FLASH - this allws yu t prgram FLASH chip in hardware with prgram cde. This ptin must be selected t enable prgramming. Verify FLASH - it verifies each prgrammed byte nly (des nt check ther spaces f FLASH). It is recmmended t enable this ptin alng with Prgram FLASH. Set Lck-Bits - this ptin disables accidental prgramming f chip. Nt all chips supprt this. External Flash - This ptin is used nly when custm FLASH prgrammer is chsen Yu can als specify FLASH device settings, in case when it is nt available in current database. All required data can be fund in FLASH datasheet: Device Name - setting new ID value and name adds a new device t prgram database. If file <Device Name>.INI exist then it will be verwritten. Address bus width - set r mdify an address bus width. Blck number - set r mdify number f blcks. Number f blcks - enter number f identical sectins. Blck size - enter size f identical sectins. Save buttn - allws save all made changes r add new device int database. Physically file is stred in C51\FLASH subdirectry as a text file, and yu can edit it in any text editr. Clse the bth dialgs using 'OK' buttn. T discard all changes use 'Cancel' buttn. Run 'Dwnlad t Flash Memry' cmmand frm the Tlbar. 8. REFERENCES The DCD uvisin2/3/4/5 debugger package is delivered by DCD free f charge upn custmer request. The custmer shuld have DCD's 8051 IP Cre equipped with DCD n chip debugger, and HAD cmmunicatin bard. DCD debug system is available at DCD web-site hht ttpp: ::////wwwwww...ddccdd...ppl ll. The Keil 8051 uvisin2/3/4/5 tl suite is als required. It can be btained frm Keil GmbH at hht ttpp: ::////wwwwww...kkeei iil ll...ccm. 9. ORDERING INFORMATION AND SUPPORT Headquarters: Wrclawska 94, Bytm, POLAND inf@dcd.pl tel.: fax: Distributrs: Please check Cnfidential Data -12-