ENGIN 112 Intro to Electrical and Computer Engineering


 Francis Thomas
 2 years ago
 Views:
Transcription
1 ENGIN 2 Intro to Electrical and Computer Engineering Lecture 8 Minimization with Karnaugh Maps
2 Overview Kmaps: an alternate approach to representing oolean functions Kmap representation can be used to minimize oolean functions Easy conversion from truth table to Kmap to minimized SOP representation. Simple rules (steps) used to perform minimization Leads to minimized SOP representation. Much faster and more more efficient than previous minimization techniques with oolean algebra.
3 Karnaugh maps lternate way of representing oolean function ll rows of truth table represented with a square Each square represents a minterm Easy to convert between truth table, Kmap, and SOP Unoptimized form: number of s in Kmap equals number of minterms (products) in SOP Optimized form: reduced number of minterms y y x x y x y y x x xy xy F = S(m,m ) = x y + x y x y F
4 Karnaugh Maps Karnaugh map is a graphical tool for assisting in the general simplification procedure. Two variable maps. Three variable maps. C F= + F= + + C F F= C + C +C +C + C + C
5 Rules for KMaps We can reduce functions by circling s in the Kmap Each circle represents minterm reduction Following circling, we can deduce minimized andor form. Rules to consider Every cell containing a must be included at least once. The largest possible power of 2 rectangle must be enclosed. The s must be enclosed in the smallest possible number of rectangles. Example
6 Karnaugh Maps Karnaugh map is a graphical tool for assisting in the general simplification procedure. Two variable maps. Three variable maps. C F= + F= + + F=+ F=+ C +C F= C + C +C +C + C + C
7 Karnaugh maps Numbering scheme based on Gray code e.g.,,,, Only a single bit changes in code for adjacent map cells This is necessary to observe the variable transitions C G(,,C) = C C C F(,,C) = Σm(,4,5,7) = C + C
8 More Karnaugh Map Examples Examples c a b f = a ab cout = ab + bc + ac b c a g = b' ab f = a. Circle the largest groups possible. 2. Group dimensions must be a power of Remember what circling means!
9 pplication of Karnaugh Maps: The Onebit dder dder Cout S S Cout How to use a Karnaugh Map instead of the lgebraic simplification? S = Cout = = = ( + ) + ( + ) + ( + ) = + + = + +
10 pplication of Karnaugh Maps: The Onebit dder dder Cout S S Cout Karnaugh Map for Cout Now we have to cover all the s in the Karnaugh Map using the largest rectangles and as few rectangles as we can.
11 pplication of Karnaugh Maps: The Onebit dder dder Cout S S Cout Now we have to cover all the s in the Karnaugh Map using the largest rectangles and as few rectangles as we can. Karnaugh Map for Cout Cout =
12 pplication of Karnaugh Maps: The Onebit dder dder Cout S S Cout Now we have to cover all the s in the Karnaugh Map using the largest rectangles and as few rectangles as we can. Karnaugh Map for Cout Cout = cin +
13 pplication of Karnaugh Maps: The Onebit dder dder Cout S S Cout Now we have to cover all the s in the Karnaugh Map using the largest rectangles and as few rectangles as we can. Karnaugh Map for Cout Cout = + +
14 pplication of Karnaugh Maps: The Onebit dder dder Cout S S Cout Karnaugh Map for S S =
15 pplication of Karnaugh Maps: The Onebit dder dder Cout S S Cout Karnaugh Map for S S = +
16 pplication of Karnaugh Maps: The Onebit dder dder Cout S S Cout Karnaugh Map for S S = + +
17 pplication of Karnaugh Maps: The Onebit dder Can you draw the circuit diagrams? dder Cout S S Cout Karnaugh Map for S S = No Possible Reduction!
18 Summary Karnaugh map allows us to represent functions with new notation Representation allows for logic reduction. Implement same function with less logic Each square represents one minterm Each circle leads to one product term Not all functions can be reduced Each circle represents an application of: Distributive rule  x(y + z) = xy + xz Complement rule x + x =
University of Technology
University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows
More informationCombinational Logic Circuits
Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical
More informationCombinational Circuits Digital Logic (Materials taken primarily from:
Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a
More informationPoints Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map
Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions SumofProducts (SOP),
More informationA graphical method of simplifying logic
45 Karnaugh Map Method A graphical method of simplifying logic equations or truth tables. Also called a K map. Theoretically can be used for any number of input variables, but practically limited to 5
More informationDigital Logic Lecture 7 Gate Level Minimization
Digital Logic Lecture 7 Gate Level Minimization By Ghada AlMashaqbeh The Hashemite University Computer Engineering Department Outline Introduction. Kmap principles. Simplification using Kmaps. Don tcare
More informationSimplification of Boolean Functions
COM111 Introduction to Computer Engineering (Fall 20062007) NOTES 5  page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean
More informationReview: Standard forms of expressions
Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can
More informationENGIN 112. Intro to Electrical and Computer Engineering
ENIN 2 Intro to Electrical and Computer Engineering Lecture 6 More Boolean Algebra ENIN2 L6: More Boolean Algebra September 5, 23 A B Overview Epressing Boolean functions Relationships between algebraic
More informationA B AB CD Objectives:
Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3
More informationSEE1223: Digital Electronics
SEE223: Digital Electronics 3 Combinational Logic Design Zulkifil Md Yusof Dept. of Microelectronics and Computer Engineering The aculty of Electrical Engineering Universiti Teknologi Malaysia Karnaugh
More informationDKT 122/3 DIGITAL SYSTEM 1
Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits
More informationDigital Logic Design (3)
Digital Logic Design (3) ENGG1015 1 st Semester, 2010 Dr. Kenneth Wong Dr. Hayden So Department of Electrical and Electronic Engineering Last lecture ll logic functions can be represented as (1) truth
More informationS1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017
S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 Karnaugh Map Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and
More informationChapter 3. GateLevel Minimization. Outlines
Chapter 3 GateLevel Minimization Introduction The Map Method FourVariable Map FiveVariable Map Outlines Product of Sums Simplification Don tcare Conditions NAND and NOR Implementation Other TwoLevel
More informationSpecifying logic functions
CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last
More informationExperiment 4 Boolean Functions Implementation
Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard
More informationModule 7. Karnaugh Maps
1 Module 7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or SumofMinterms (SOM) 2.4 Canonical product of sum or ProductofMaxterms(POM)
More informationSimplification of twolevel combinational logic
ombinational logic optimization! lternate representations of oolean functions " cubes " karnaugh maps! Simplification " twolevel simplification " exploiting don t cares " algorithm for simplification
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter
More informationChapter 6. Logic Design Optimization Chapter 6
Chapter 6 Logic Design Optimization Chapter 6 Optimization The second part of our design process. Optimization criteria: Performance Size Power Twolevel Optimization Manipulating a function until it is
More informationQUESTION BANK FOR TEST
CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice
More informationExperiment 3: Logic Simplification
Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed ElSaied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions
More informationGate Level Minimization Map Method
Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically
More informationStandard Forms of Expression. Minterms and Maxterms
Standard Forms of Expression Minterms and Maxterms Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains:
More informationChapter 2. Boolean Expressions:
Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean
More informationCprE 281: Digital Logic
CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative
More information9/10/2016. ECE 120: Introduction to Computing. The Domain of a Boolean Function is a Hypercube. List All Implicants for One Variable A
University of Illinois at UrbanaChampaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing To Simplify, Write Function as a Sum of Prime Implicants One way to simplify a
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter
More informationTo write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.
3.1 Objectives To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using. 3.2 Sum of Products & Product of Sums Any Boolean expression can be simplified
More informationPresented By : Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak
Presented By : Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak Content  Introduction 2 Feature 3 Feature of BJT 4 TTL 5 MOS 6 CMOS 7 K Map  Introduction Logic IC ASIC: Application Specific
More informationCombinational Logic Circuits Part III Theoretical Foundations
Combinational Logic Circuits Part III Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic
More informationDate Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 04. Boolean Expression Simplification and Implementation
Name: Instructor: Engr. Date Performed: Marks Obtained: /10 Group Members (ID):. Checked By: Date: Experiment # 04 Boolean Expression Simplification and Implementation OBJECTIVES: To understand the utilization
More informationEEE130 Digital Electronics I Lecture #4_1
EEE130 Digital Electronics I Lecture #4_1  Boolean Algebra and Logic Simplification  By Dr. Shahrel A. Suandi 46 Standard Forms of Boolean Expressions There are two standard forms: Sumofproducts form
More informationCHAPTER2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, KMap and QuineMcCluskey
CHAPTER2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, KMap and QuineMcCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input
More information4 KARNAUGH MAP MINIMIZATION
4 KARNAUGH MAP MINIMIZATION A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if properly used, will produce the simplest SOP or POS expression possible, known as the
More informationHomework. Update on website issue Reading: Chapter 7 Homework: All exercises at end of Chapter 7 Due 9/26
Homework Update on website issue Reading: hapter 7 Homework: All exercises at end of hapter 7 Due 9/26 opyright c 22 28 UMaine omputer Science Department / 2 OS 4: Foundations of omputer Science Karnaugh
More informationCSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map
CSCI 22: Computer Architecture I Instructor: Pranava K. Jha Simplification of Boolean Functions using a Karnaugh Map Q.. Plot the following Boolean function on a Karnaugh map: f(a, b, c, d) = m(, 2, 4,
More informationLSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology
LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a
More informationKarnaugh Map (KMap) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using Kmap
Karnaugh Map (KMap) Ch. 2.4 Ch. 2.5 Simplification using Kmap A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or
More informationUnitIV Boolean Algebra
UnitIV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of
More informationBOOLEAN ALGEBRA. Logic circuit: 1. From logic circuit to Boolean expression. Derive the Boolean expression for the following circuits.
COURSE / CODE DIGITAL SYSTEMS FUNDAMENTAL (ECE 421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE 422) BOOLEAN ALGEBRA Boolean Logic Boolean logic is a complete system for logical operations. It is used in countless
More informationSimplification of Boolean Functions
Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.
More informationGate Level Minimization
Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 =
More informationSWITCHING THEORY AND LOGIC CIRCUITS
SWITCHING THEORY AND LOGIC CIRCUITS COURSE OBJECTIVES. To understand the concepts and techniques associated with the number systems and codes 2. To understand the simplification methods (Boolean algebra
More informationChapter 2 Combinational
Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic
More informationChapter 3 Simplification of Boolean functions
3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean
More informationECE380 Digital Logic
ECE38 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum ProductofSums Forms, Incompletely Specified Functions Dr. D. J. Jackson Lecture 8 Terminology For
More informationGateLevel Minimization. BME208 Logic Circuits Yalçın İŞLER
GateLevel Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to
More informationSlide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary
Slide Set 5 for ENEL 353 Fall 207 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 207 SN s ENEL 353 Fall 207 Slide Set 5 slide
More informationDigital Circuits ECS 371
Digital Circuits ECS 37 Dr. Prapun Suksompong prapun@siit.tu.ac.th Lecture 7 Office Hours: KD 367 Monday 9::3, :33:3 Tuesday :3:3 Announcement HW2 posted on the course web site Chapter 4: Write down
More informationMaking a Venn diagram look like a Karnaugh map
Making a Venn diagram look like a Karnaugh map Starting with circle A in a rectangular A' universe in figure (a) below, we morph a Venn diagram into almost a Karnaugh map. We expand circle A at (b) and
More informationGateLevel Minimization
MEC520 디지털공학 GateLevel Minimization JeeHwan Ryu School of Mechanical Engineering GateLevel MinimizationThe Map Method Truth table is unique Many different algebraic expression Boolean expressions may
More informationAssignment (36) Boolean Algebra and Logic Simplification  General Questions
Assignment (36) Boolean Algebra and Logic Simplification  General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make
More informationIT 201 Digital System Design Module II Notes
IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.
More informationMenu. Algebraic Simplification  Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification
Menu Minterms & Maxterms SOP & POS MSOP & MPOS Simplification using the theorems/laws/axioms Look into my... 1 Definitions (Review) Algebraic Simplification  Boolean Algebra Minterms (written as m i ):
More informationUNIT II. Circuit minimization
UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.
More informationGraduate Institute of Electronics Engineering, NTU. CH5 Karnaugh Maps. Lecturer: 吳安宇教授 Date:2006/10/20 ACCESS IC LAB
CH5 Karnaugh Maps Lecturer: 吳安宇教授 Date:2006/0/20 CCESS IC L Problems in lgebraic Simplification The procedures are difficult to apply in a systematic way. It is difficult to tell when you have arrived
More informationX Y Z F=X+Y+Z
This circuit is used to obtain the compliment of a value. If X = 0, then X = 1. The truth table for NOT gate is : X X 0 1 1 0 2. OR gate : The OR gate has two or more input signals but only one output
More informationMidTerm Exam Solutions
CS/EE 26 Digital Computers: Organization and Logical Design MidTerm Eam Solutions Jon Turner 3/3/3. (6 points) List all the minterms for the epression (B + A)C + AC + BC. Epanding the epression gives
More informationGet Free notes at ModuleI One s Complement: Complement all the bits.i.e. makes all 1s as 0s and all 0s as 1s Two s Complement: One s complement+1 SIGNED BINARY NUMBERS Positive integers (including zero)
More informationCh. 5 : Boolean Algebra &
Ch. 5 : Boolean Algebra & Reduction elektronik@fisika.ui.ac.id Objectives Should able to: Write Boolean equations for combinational logic applications. Utilize Boolean algebra laws and rules for simplifying
More informationGateLevel Minimization
GateLevel Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2011 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationSummary. Boolean Addition
Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse
More informationFinal Examination (Open Katz, asynchronous & test notes only, Calculators OK, 3 hours)
Your Name: UNIVERSITY OF CALIFORNIA AT BERKELEY BERKELEY DAVIS IRVINE LOS ANGELES RIVERSIDE SAN DIEGO SAN FRANCISCO Department of Electrical Engineering and Computer Sciences SANTA BARBARA SANTA CRUZ CS
More informationUNIT4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.
UNIT4 BOOLEAN LOGIC Boolean algebra is an algebra that deals with Boolean values((true and FALSE). Everyday we have to make logic decisions: Should I carry the book or not?, Should I watch TV or not?
More informationCMPE223/CMSE222 Digital Logic
CMPE223/CMSE222 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum ProductofSums Forms, Incompletely Specified Functions Terminology For a given term, each
More informationIncompletely Specified Functions with Don t Cares 2Level Transformation Review Boolean Cube KarnaughMap Representation and Methods Examples
Lecture B: Logic Minimization Incompletely Specified Functions with Don t Cares 2Level Transformation Review Boolean Cube KarnaughMap Representation and Methods Examples Incompletely specified functions
More information5. Minimizing Circuits
5. MINIMIZING CIRCUITS 46 5. Minimizing Circuits 5.. Minimizing Circuits. A circuit is minimized if it is a sumofproducts that uses the least number of products of literals and each product contains
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of
More information2/8/2017. SOP Form Gives Good Performance. ECE 120: Introduction to Computing. KMaps Can Identify SingleGate Functions
University of Illinois at UrbanaChampaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing TwoLevel Logic SOP Form Gives Good Performance s you know, one can use a Kmap
More informationSwitching Circuits & Logic Design
Switching Circuits & Logic Design JieHong Roland Jiang 江介宏 Department of Electrical Engineering National Taiwan University Fall 23 5 Karnaugh Maps Kmap Walks and Gray Codes http://asicdigitaldesign.wordpress.com/28/9/26/kmapswalksandgraycodes/
More informationCombinational Logic & Circuits
WeekI Combinational Logic & Circuits Spring' 232  Logic Design Page Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other
More informationSpring 2010 CPE231 Digital Logic Section 1 Quiz 1A. Convert the following numbers from the given base to the other three bases listed in the table:
Section 1 Quiz 1A Convert the following numbers from the given base to the other three bases listed in the table: Decimal Binary Hexadecimal 1377.140625 10101100001.001001 561.24 454.3125 111000110.0101
More informationLiteral Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10
Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm
More informationDigital Logic Design (CEN120) (3+1)
Digital Logic Design (CEN120) (3+1) ASSISTANT PROFESSOR Engr. Syed Rizwan Ali, MS(CAAD)UK, PDG(CS)UK, PGD(PM)IR, BS(CE)PK HEC Certified Master Trainer (MTFPDP) PEC Certified Professional Engineer (COM/2531)
More informationGateLevel Minimization
GateLevel Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationLecture 4: Implementation AND, OR, NOT Gates and Complement
EE210: Switching Systems Lecture 4: Implementation AND, OR, NOT Gates and Complement Prof. YingLi Tian Feb. 13, 2018 Department of Electrical Engineering The City College of New York The City University
More informationComputer Organization
Computer Organization (Logic circuits design and minimization) KR Chowdhary Professor & Head Email: kr.chowdhary@gmail.com webpage: krchowdhary.com Department of Computer Science and Engineering MBM Engineering
More informationKarnaugh Maps. Kiril Solovey. TelAviv University, Israel. April 8, Kiril Solovey (TAU) Karnaugh Maps April 8, / 22
Karnaugh Maps Kiril Solovey TelAviv University, Israel April 8, 2013 Kiril Solovey (TAU) Karnaugh Maps April 8, 2013 1 / 22 Reminder: Canonical Representation Sum of Products Function described for the
More informationBasic circuit analysis and design. Circuit analysis. Write algebraic expressions or make a truth table
Basic circuit analysis and design Circuit analysis Circuit analysis involves figuring out what some circuit does. Every circuit computes some function, which can be described with Boolean expressions or
More informationLecture 7 Logic Simplification
Lecture 7 Logic Simplification Simplification Using oolean lgebra simplified oolean expression uses the fewest gates possible to implement a given expression. +(+)+(+) Simplification Using oolean lgebra
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show
More informationPhiladelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh.
Philadelphia University Faculty of Information Technology Department of Computer Science Computer Logic Design By Dareen Hamoudeh Dareen Hamoudeh 1 Canonical Forms (Standard Forms of Expression) Minterms
More informationBoolean Function Simplification
Universit of Wisconsin  Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Charles R. Kime Section Fall 200 Chapter 2 Combinational Logic Circuits Part 5 Charles Kime & Thomas Kaminski Boolean Function
More informationSlides for Lecture 15
Slides for Lecture 5 ENEL 353: Digital Circuits Fall 203 Term Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary October, 203 ENEL 353 F3 Section
More informationLast Name Student Number. Last Name Student Number
University of Toronto Faculty of Applied Science and Engineering Department of Electrical and Computer Engineering Midterm Examination ECE 241F  Digital Systems Wednesday October 13, 2004, 6:00pm [5]
More informationBoolean Analysis of Logic Circuits
Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: IInd Year, Sem  IIIrd Subject: Computer Science Paper No.: IX Paper Title: Computer System Architecture Lecture No.: 7 Lecture Title:
More informationObjectives: 1. Design procedure. 2. Fundamental circuits. 1. Design procedure
Objectives: 1. Design procedure. 2. undamental circuits. 1. Design procedure Design procedure has five steps: o Specification. o ormulation. o Optimization. o Technology mapping. o Verification. Specification:
More informationCS470: Computer Architecture. AMD Quad Core
CS470: Computer Architecture Yashwant K. Malaiya, Professor malaiya@cs.colostate.edu AMD Quad Core 1 Architecture Layers Building blocks Gates, flipflops Functional bocks: Combinational, Sequential Instruction
More informationCS8803: Advanced Digital Design for Embedded Hardware
CS883: Advanced Digital Design for Embedded Hardware Lecture 2: Boolean Algebra, Gate Network, and Combinational Blocks Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883
More information60265: Winter ANSWERS Exercise 4 Combinational Circuit Design
60265: Winter 2010 Computer Architecture I: Digital Design ANSWERS Exercise 4 Combinational Circuit Design Question 1. Onebit Comparator [ 1 mark ] Consider two 1bit inputs, A and B. If we assume that
More informationContents. Chapter 3 Combinational Circuits Page 1 of 34
Chapter 3 Combinational Circuits Page of 34 Contents Contents... 3 Combinational Circuits... 2 3. Analysis of Combinational Circuits... 2 3.. Using a Truth Table... 2 3..2 Using a Boolean unction... 4
More informationPOWR IP PZ1/17
Silesian University of Technology as Centre of Modern Education Based on Research and Innovations POWR.03.05.00IP.0800PZ1/17 Project cofinanced by the European Union under the European Social Fund
More informationDIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (KMAPS)
DIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (KMAPS) 1 Learning Objectives 1. Given a function (completely or incompletely specified) of three to five variables, plot it on a Karnaugh map. The function
More information2.6 BOOLEAN FUNCTIONS
2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses
More informationOutcomes. Unit 9. Logic Function Synthesis KARNAUGH MAPS. Implementing Combinational Functions with Karnaugh Maps
.. Outcomes Unit I can use Karnaugh maps to synthesize combinational functions with several outputs I can determine the appropriate size and contents of a memory to implement any logic function (i.e. truth
More informationCode No: 07A3EC03 Set No. 1
Code No: 07A3EC03 Set No. 1 II B.Tech I Semester Regular Examinations, November 2008 SWITCHING THEORY AND LOGIC DESIGN ( Common to Electrical & Electronic Engineering, Electronics & Instrumentation Engineering,
More information2008 The McGrawHill Companies, Inc. All rights reserved.
28 The McGrawHill Companies, Inc. All rights reserved. 28 The McGrawHill Companies, Inc. All rights reserved. All or Nothing Gate Boolean Expression: A B = Y Truth Table (ee next slide) or AB = Y 28
More information