USBFC (USB Function Controller)

Size: px
Start display at page:

Download "USBFC (USB Function Controller)"

Transcription

1 USBFC () EIFUFAL501 User s Manual Doc #: E01 Revision: 2.0 Dae: 03/24/98

2 (USBFC) 1. Highlighs Feaures Overview USBFC Block Diagram USBFC Typical Sysem Block Diagram Signal Descripion Symbol Diagram for USBFC Signal Descripion Funcional Descripion USB Inerface Local Bus CPU Conrolled USB o Local Bus Transfers CPU Conrolled Local Bus o USB Transfers DMA Conrolled USB o Local Bus Transfers DMA Conrolled Local Bus o USB Transfers Terminaing DMA Transfers USB Endpoin 1 Receive Mailboxes USB Endpoin 2 Transmi Mailboxes Suspend Mode The Suspend Sequence Device-Remoe Wake-Up Hos-Iniiaed Wake-Up USBFC Power Configuraion Local Regisers Regiser Descripion Regiser Summary (Address 00h; DCTL) DMA Conrol Regiser (Address 01h; IRQENB1) Inerrup Enable Regiser (Address 02h; IRQSTAT1) Inerrup Saus Regiser (Address 03h; IRQENB2) Inerrup Enable Regiser (Address 04h; IRQSTAT2) Inerrup Saus Regiser (Address 08h; EP1IDX) Endpoin 1 Index Regiser (Address 09h; EP1DATA) Endpoin 1 Receive Mailbox Daa (Address 0Ch; EP2IDX) Endpoin 2 Index Regiser (Address 0Dh; EP2DATA) Endpoin 2 Transmi Mailbox Daa (Address 0Eh; EP2POLL) Endpoin 2 Inerrup Polling Inerval Regiser (Address 10h; EP3DATA) Endpoin 3 Receive FIFO Daa Regiser (Address 11h; EP3COUNT) Endpoin 3 Receive FIFO Coun Regiser (Address 12h; EP3STAT) Endpoin 3 Receive FIFO Saus Regiser (Address 13h; EP3PKSZ) Endpoin 3 Maximum Packe Size Regiser (Address 14h; EP4DATA) Endpoin 4 Transmi FIFO Daa Regiser (Address 15h; EP4COUNT) Endpoin 4 Transmi FIFO Coun Regiser (Address 16h; EP4STAT) Endpoin 4 Transmi FIFO Saus Regiser (Address 17h; EP4PKSZ) Endpoin 4 Maximum Packe Size Regiser (Address 18h; REVISION) Revision Regiser (Address 19h; USBSTAT) USB Saus Regiser (Address 1Ah; FRAMEMSB) Frame Couner MSB Regiser (Address 1Bh; FRAMELSB) Frame Couner LSB Regiser (Address 1Ch; EXTIDX) Exended Regiser Index (Address 1Dh; EXTDATA) Exended Regiser Daa EPSON 2

3 (Address 1Dh, Index 00h; VIDMSB) Vendor ID MSB (Address 1Dh, Index 01h; VIDLSB) Vendor ID LSB (Address 1Dh, Index 02h; PIDMSB) Produc ID MSB (Address 1Dh, Index 03h; PIDLSB) Produc ID LSB (Address 1Dh, Index 04h; RELMSB) Release Number MSB (Address 1Dh, Index 05h; RELLSB) Release Number LSB (Address 1Dh, Index 06h; RCVAFTH) Receive FIFO Almos Full Threshold (Address 1Dh, Index 07h; XMTAETH) Transmi FIFO Almos Empy Threshold (Address 1Dh, Index 08h; USBCTL) USB Conrol (Address 1Dh, Index 09h; MAXPWR) Maximum Power Consumpion (Address 1Dh, Index 0Ah; PKTCTL) Packe Conrol (Address 1Dh, Index 0Bh; LOCALCTL) Local-Side Conrol (Address 1Dh, Index 0Ch; FIFOCTL) FIFO Conrol Sandard Device Requess Conrol IN Transacions Ge Device Saus Ge Inerface Saus Ge Endpoin 0,1,2,3,4 Saus Ge Device Descripor (18 Byes) Ge Configuraion Descripor (46 byes) Ge Sring Descripor Ge Sring Descripor Ge Sring Descripor Ge Configuraion Ge Inerface Conrol OUT Transacions Se Address Se Configuraion Se Inerface Device Clear Feaure Device Se Feaure Endpoin 0,1,2,3,4 Clear Feaure Endpoin 0,1,2,3,4 Se Feaure Endpoin 1 OUT Transacions (Receive Mailboxes) Endpoin 2 IN Transacions (Transmi Mailboxes) Endpoin 3 OUT Transacions (Receive FIFO) Endpoin 4 IN Transacions (Transmi FIFO) Vendor Device Requess Device Clear Feaure Device Se Feaure Timing Local Bus Wrie o Regiser Local Bus Read from Regiser DMA Wrie o FIFO DMA Read from FIFO Tes Circui EPSON 3

4 1. Highlighs 1.1 Feaures USB Specificaion Version 1.0 Complian Bridges beween a Processor-Independen local bus and a USB bus USB device bandwidh of up o 12Mb/sec USB Bulk, Isochronous, Inerrup, and Conrol ransfers. Independen 64 bye ransmi and receive FIFOs o maximize hroughpu. Suppors local CPU or DMA daa ransfers. 3.3V operaing volage 1.2 Overview The (USBFC) allows bulk or isochronous daa ransfers beween a generic local bus and a Universal Serial Bus (USB). The USBFC suppors he connecion beween a hos compuer and an inelligen peripheral such as a digial camera or scanner. The hree main componens of he USBFC are he USB Bus Inerface, he dual 64 bye FIFOs, and a Local Bus Inerface. The USB Inerface is responsible for he following funcions: Hos o device Communicaion Bulk or isochronous endpoins o access FIFOs Inerrup endpoin o access Local o USB Mailboxes Bulk endpoin o access USB o Local Mailboxes The Local Bus Inerface is responsible for he following funcions: FIFO Conrol Local CPU inerface Local DMA conroller inerface Inerrups EPSON 4

5 1.3 USBFC Block Diagram D[7:0] A[4:0] Configuraion, Conrol, and Saus Endpoin_0 CS_ IOR_ 8-Bye Mailbox Bulk Endpoin_1 IOW_ DRQ Local Bus Conroller 8-Bye Mailbox Inerrup Endpoin_2 USB Serial Inerface Engine and Conroller D+ USB PORT D- DACK_ EOT_ 64 Bye Rcv FIFO Bulk & Isochronous Endpoin_3 IRQ RESET_ 64 Bye Xm FIFO Bulk & Isochronous Endpoin_4 1.4 USBFC Typical Sysem Block Diagram Scanner/Camera Conroller Shared Memory Microprocessor Daa Bus DMA Conroller (Opional) USB Funcion Conroller USB PORT EPSON 5

6 2. Signal Descripion 2.1 Symbol Diagram for USBFC CLK48_EARLY ROOT_DATAIN_P ROOT_DATAIN_M SIE_XRXD LDIN7 LDIN6 LDIN5 ROOT_DATAOUT_P ROOT_DATAOUT_M ROOT_DATA_OE_ INT_ DRQ LDIN4 LDIN3 LDIN2 LDIN1 LDIN0 LA4 LA3 LA2 USBFC LDOUT7 LDOUT6 LDOUT5 LDOUT4 LDOUT3 LDOUT2 LDOUT1 LDOUT0 LA1 LA0 RESET_ CS_ IOR_ IOW_ LDOUT_OE_ DEVCFG_ SUSP_ LRESET_ OSC_RUN LCLK_OUT DACK_ EOT_ ISO_ WAKEUP_ BUSPWR_ PWRGOOD_ TEST EPSON 6

7 2.2 Signal Descripion NOTE: Inpu signal mus be driven exernally when he USBFC is in he suspended sae. The signal which has underscore (_) a he end of is name is acive low. Signal Name Type Descripion CLK48_EARLY Inpu 48 MHz Oscillaor inpu. RESET_ Inpu Rese. Exernal rese. Connec o local or power-on rese. To rese when oscillaor is sopped (iniial power-up or in suspend sae), asser for a leas one ms. When oscillaor is running, asser for a leas five 48-MHz clock periods. ROOT_DATAIN_P, ROOT_DATAIN_M Inpu USB Daa Inpu. Two differenial inpu signals (DP & DM) of he USB por. SIE_XRXD Inpu USB Daa Differenial Receiver. Amplified inpu signal exraced from he wo incoming differenial inpu signals of he USB daa por. DP > DM : 1, DP < DM : 0 ROOT_DATAOUT_P, ROOT_DATAOUT_M Oupu USB Daa Oupu. Two differenial oupu signals (DP & DM) of he USB por. ROOT_DATA_OE_ Oupu USB Por Oupu Enable. This acive low oupu is rue when USBFC is driving he USB por daa oupu lines (ROOT_DATAOUT_P & ROOT_DATAOUT_M). LDIN[7:0] Inpu Daa Inpu. LDIN7 is he mos-significan bi. LDOUT[7:0] Oupu Daa Oupu. LDOUT7 is he mos-significan bi. LDOUT_OE_ Oupu Daa Oupu Enable. This acive low oupu is rue when he USBFC is driving he Daa Oupu Bus (LDOUT). LA[4:0] Inpu Address Bus. The local address bus is used by devices on he local bus o selec regisers wihin he USBFC. CS_ Inpu Chip Selec. The chip selec is used by devices on he local bus o enable access o regisers wihin he USBFC. This signal is ignored if DACK_ is assered. IOR_ Inpu I/O Read. The I/O read srobe is assered along wih CS_ and LA[4:0] when a device on he local bus reads from an inernal regiser or he FIFO. I also allows he FIFO o be read during DMA ransfers when DACK_ is assered. IOW_ Inpu I/O Wrie. The I/O wrie srobe is assered along wih CS_ and LA[4:0] when a device on he local bus wries o an inernal regiser or he FIFO. I also allows he FIFO o be wrien during DMA ransfers when DACK_ is assered. DRQ Oupu DMA Reques. This signal indicaes o an exernal DMA conroller ha a bye should be ransferred o/from he FIFO. During a ransfer, DRQ remains assered unil he DACK_ inpu goes acive. DACK_ Inpu DMA Acknowledge. This signal from he exernal DMA conroller is used o ransfer daa o/from he FIFO in response o EPSON 7

8 DRQ. IOR_ and IOW_ deermine he direcion of he DMA ransfer. EOT_ Inpu DMA End of Transfer. This signal from he exernal DMA conroller is used o erminae a DMA ransfer. If i is assered during a DMA cycle, he curren bye will be ransferred, bu no addiional byes will be requesed. EOT_ can be programmed o cause a USB inerrup. INT_ Oupu Inerrup Reques Oupu. The inerrup reques oupu is used o inerrup a processor on he local bus. There are several sources of his inerrup which are described in he Regiser Descripion Secion. DEVCFG_ Oupu Device Configured. This acive low oupu is rue when he USBFC has been configured by he USB hos. SUSP_ Oupu Device Suspended. This acive low oupu is rue when he USBFC has been suspended by he USB hos. OSC_RUN Oupu Oscillaor Run. Clock inpu o CLK48_EARLY shoud be enabled depend on OSC_RUN. LCLK_OUT Oupu Local Clock. This is a buffered oupu from he inernal 48 MHz oscillaor. This signal is no driven while he device is suspended. LRESET_ Oupu Local Rese. This acive low oupu is assered when eiher he RESET_ pin is assered, or a USB por rese is deeced. ISO_ Inpu Isochronous Mode Selec. This acive low inpu selecs isochronous mode for USB ransfers o and from he FIFOs. WAKEUP_ Inpu Wakeup. This acive low inpu causes he USBFC o perform a USB remoe wakeup. BUSPWR_ Inpu Bus Powered. This acive low inpu indicaes ha he logic exernal o he USBFC is powered by he USB bus. If his inpu is high, hen he exernal logic is self-powered. PWRGOOD_ Inpu Power Good. This acive low inpu indicaes ha an exernal power supply used for self-powered mode is operaional. TEST Inpu Tes. For normal operaion, connec his pin o ground. EPSON 8

9 3. Funcional Descripion 3.1 USB Inerface The USBFC is a USB funcion device, and as a resul is always a slave o he USB hos. All USB daa ransfers o and from he USBFC USB por are iniiaed by he USB hos. There are five USB endpoins associaed wih he USBFC: Endpoin 0. This conrol endpoin is used o iniialize he device, and provides access o USB configuraion, conrol and saus regisers. Endpoin 1. This endpoin suppors bulk ransfers from he USB hos o he USBFC receive mailboxes. Endpoin 2. This endpoin suppors inerrup ransfers from he USBFC ransmi mailboxes o he USB hos. Endpoin 3. This endpoin suppors bulk or isochronous daa ransfers from he USB hos o he USBFC Receive FIFO. Endpoin 4. This endpoin suppors bulk or isochronous daa ransfers from he USBFC Transmi FIFO o he USB hos. 3.2 Local Bus Bulk or isochronous daa passes beween he local bus and he USB bus hrough a pair of 64 bye FIFOs. A CPU on he local bus can provide daa o or accep daa from he USB bus via he FIFOs in he USBFC. A pair of 8-bye mailbox regisers provide a means for he local and hos CPUs o exchange messages. The receive mailbox is implemened as a Bulk Daa endpoin, and he ransmi mailbox as an Inerrup endpoin CPU Conrolled USB o Local Bus Transfers For hos o device ransfers, he local and hos CPUs firs arrange o ransfer a block of daa from hos memory o local shared memory. The USB hos performs a bulk or isochronous daa ransfer over he USB bus o he receive FIFO in he USBFC. If he FIFO fills up during a bulk ransfer, he USBFC will reurn a USB NAK acknowledge o he hos, signaling ha he daa could no be acceped. Packe daa which is in he FIFO or has already been read by he CPU should be discarded. If he local CPU has salled his endpoin, he USBFC will no sore any daa ino he FIFO, and will respond wih a STALL acknowledge. The local CPU can eiher sar polling for valid FIFO daa immediaely afer seing up he ransfer wih he USB hos, or can wai for a packe complee inerrup. As he FIFO is filling up from he USB side, he local CPU can poll he FIFO saus regiser o deermine when a bye is available. Oherwise i can wai unil he packe complee inerrup and read he enire packe a once. Once an end of packe occurs, an inerrup can be generaed o he local CPU. The local CPU can read a saus por o deec wheher he packe was acknowledged wih an ACK, NAK, or STALL. If none of hese acknowledge bis are se, hen a imeou has occurred. For NAK or imeou condiions a he compleion of bulk ransfers, he USB hos will send anoher OUT oken, and he USBFC should receive he same packe again CPU Conrolled Local Bus o USB Transfers For device o hos ransfers, he local CPU firs wries he daa block from local memory ino he ransmi FIFO. While wriing daa ino he USBFC, he local CPU mus keep rack of wheher here is space available in he FIFO by monioring he Transmi FIFO Coun regiser. EPSON 9

10 Afer he block has been loaded ino he ransmi FIFO, he local and hos CPUs arrange o ransfer he block of daa from he ransmi FIFO o hos memory. The USB hos sends an IN oken o he USBFC and sars a USB bulk or isochronous read from he ransmi FIFO. The CPU wries and USB read operaions could occur concurrenly if he local CPU can provide daa a a fas enough rae o keep up wih he USB bus. When he ransmi FIFO becomes empy, he USBFC will erminae he packe wih an EOP (end of packe), signaling ha here is no more daa available. Once an end of packe occurs, an inerrup can be generaed o he local CPU. The local CPU can read a saus por o deec wheher he packe was acknowledged wih an ACK from he hos, or wheher he USBFC responded o he IN oken wih a NAK or STALL. If none of hese acknowledge bis are se, hen a imeou has occurred. For NAK or imeou condiions a he compleion of bulk ransfers, he USB hos will send anoher IN oken, and he USBFC should re-ransmi he same packe DMA Conrolled USB o Local Bus Transfers A Direc Memory Access (DMA) conroller may be used on he local bus o ransfer daa o and from he USBFC. For hos o device ransfers, he local and hos CPUs firs arrange o ransfer a block of daa from hos memory o local shared memory. The local CPU hen programs he DMA conroller for fly-by demand mode ransfers. In his mode, ransfers occur only when he USBFC requess hem, and he daa is read from he USBFC receive FIFO and wrien ino local memory during he same bus ransacion. The DMA address couner is programmed o poin o he desinaion memory block in local shared memory, and he bye coun o he number of byes in he block o be ransferred. Afer he DMA conroller has been programmed, he DMA reques enable bi is se in he USBFC. The USB hos performs USB bulk or isochronous daa ransfers over he USB bus o he receive FIFO in he USBFC. If he FIFO fills up during a bulk ransfer, he USBFC will reurn a USB NAK acknowledge o he hos, signaling ha he daa could no be acceped. Packe daa which is in he FIFO or has already been ransferred by he DMA should be discarded. If he local CPU has salled his endpoin, he USBFC will no sore any daa ino he FIFO, and will respond wih a STALL acknowledge. As long as here is daa available in he FIFO, he USBFC will reques local DMA ransfers by assering DRQ. The DMA conroller hen requess he local bus from he local CPU. Afer he DMA conroller has been graned he bus, i drives a valid memory address and assers DACK_, IOR_, and MEMW_, hus ransferring a bye from he USBFC receive FIFO o memory. This process coninues unil he DMA bye coun reaches zero. A local bus inerrup may be programmed o occur when he DMA has finished. Once an end of packe occurs, an inerrup can be generaed o he local CPU. The local CPU can read a saus por o deec wheher he packe was acknowledged wih an ACK, NAK, or STALL. If none of hese acknowledge bis are se, hen a imeou has occurred. For NAK or imeou condiions a he compleion of bulk ransfers, he USB hos will send anoher OUT oken, and he USBFC should receive he same packe again. An early end-of-packe (EOP) can be deeced by he local CPU if he DMA coun is non-zero. The local and hos CPUs should hen decide how o proceed DMA Conrolled Local Bus o USB Transfers For device o hos ransfers, he local and hos CPUs firs arrange o ransfer a block of daa from local memory o hos memory. The local CPU hen programs he DMA conroller for fly-by demand mode ransfers. In his mode, ransfers occur only when he USBFC requess hem, and he daa is read from local memory and wrien ino he USBFC FIFO during he same bus ransacion. The DMA address couner is programmed o poin o he source memory block in local memory, and he bye coun o he number of byes in he block o be ransferred. Afer he DMA conroller has been programmed, he DMA reques enable bi is se in he USBFC. As long as here is space available in he FIFO and he bye coun is non-zero, he USBFC will reques DMA ransfers by assering DRQ. The DMA conroller hen EPSON 10

11 requess he local bus from he local CPU. Afer he DMA conroller has been graned he bus, i drives a valid memory address and assers DACK_, MEMR_, and IOW_, hus ransferring a bye from memory o he USBFC Transmi FIFO. Afer he DMA has been sared, he local CPU can signal he USB hos o sar a bulk read using endpoin 2. Isochronous packes occur a pre-arranged inervals, so no signaling is required. The USB hos sends an IN oken o he USBFC and sars a USB bulk or isochronous daa ransfer from he ransmi FIFO. The DMA ransfers coninue unil he DMA bye coun reaches zero. An inerrup can be generaed o he local CPU when he DMA has finished. When he ransmi FIFO becomes empy, he USBFC will erminae he packe wih an EOP (end of packe), signaling ha here is no more daa available. Once an end of packe occurs, an inerrup can be generaed o he local CPU. The local CPU can read a saus por o deec wheher he packe was acknowledged wih an ACK from he hos, or wheher he USBFC responded o he IN oken wih a NAK or STALL. If none of hese acknowledge bis are se, hen a imeou has occurred. For NAK or imeou condiions a he compleion of bulk ransfers, he USB hos will send anoher IN oken, and he USBFC should re-ransmi he same packe Terminaing DMA Transfers The EOT_ signal is used o hal a DMA ransfer, and is ypically provided by an exernal DMA conroller. I should be assered while DACK_ and IOR_ or IOW_ are simulaneously acive o indicae ha DMA aciviy has sopped. Alhough an EOT_ signal indicaes ha DMA has erminaed, he USB ransfer is no complee unil he las bye has been ransferred from he FIFO o he USB bus. The EOT_ reses he USBFC DMA reques enable bi. If no EOT_ signal is provided by he DMA conroller, he DMA ransfer can be haled a any ime by reseing he USBFC DMA reques enable bi. If he USBFC DMA reques enable bi is cleared during he middle of a DMA cycle, he curren cycle will complee before DMA requess are erminaed USB Endpoin 1 Receive Mailboxes Endpoin 1 is used for bulk ransfers from he USB hos o a se of 8 receive mailbox regisers which are read by he local CPU. The forma of he daa wrien o he mailbox is user defined. To ransfer an 8 bye packe, he hos firs performs a USB 8-bye bulk ransfer o he endpoin 1 receive mailbox regisers. A receive mailbox valid bi (bi 1 of regiser IRQSTAT1) is hen se which can cause a local bus inerrup. If he USB hos ries o wrie o hese regisers when he valid bi is se, a NAK acknowledge will be reurned. When he local CPU receives he inerrup, i reads he 8 byes and clears he valid bi.. The USB hos can hen send anoher 8-bye packe o his endpoin. An index poiner is used o access he receive mailboxes. I mus be iniialized by he local CPU, and is auomaically incremened afer he local CPU reads he receive mailbox daa regiser USB Endpoin 2 Transmi Mailboxes Endpoin 2 is used for inerrup ransfers o he USB hos from a se of 8 ransmi mailbox regisers which are wrien by he local CPU. To ransfer an 8 bye packe, he local CPU wries daa ino he 8 regisers and ses he ransmi mailbox valid bi. The hos performs a USB 8-bye inerrup ransfer from he endpoin 2 ransmi mailbox regisers. Afer he USB inerrup ransfer has compleed, he ransmi mailbox valid bi is cleared. The CPU should only wrie o he ransmi mailbox regisers when he valid bi is no se. This guaranees ha a previous inerrup ransfer has compleed before he regiser values are changed. If he USB hos ries o read endpoin 2 when he valid bi is no se, a NAK acknowledge is reurned. An index poiner is used o access he ransmi mailboxes. I mus be iniialized by he local CPU, and is auomaically incremened afer he local CPU reads or wries he ransmi mailbox daa regiser EPSON 11

12 3.3 Suspend Mode When here is a hree millisecond period of inaciviy on he USB, he USB specificaion requires a device o ener ino a low-power suspended sae. The device may no draw more han 500 μa of curren while in his sae. To faciliae his, he USBFC provides a suspend - reques inerrup and a suspend bi in he USB saus regiser. Addiionally, he USBFC allows he local CPU o send a device remoe wake-up reques -- a reques from he local CPU o wake-up he USB The Suspend Sequence The ypical sequence of operaion is as follows: during device configuraion, he local CPU will configure he USBFC o inerrup on a suspend reques (using he IRQENB1 regiser). When he USB is idle for hree milliseconds, he USBFC will generae a suspend - reques inerrup. The local CPU acceps his inerrup by clearing he corresponding bi in he IRQSTAT1 regiser, and performs he asks required o ensure ha no more han 500 μa of curren is drawn from he USB power bus. Then i wries a 1 o bi 7 of he USB saus regiser (USBSTAT) o iniiae he suspend. In suspend mode, OSC_RUN oupu pin goes low, and herefore he clock inpu ino CLK48_EARLY shoud be sopped. The SUSP_ oupu pin will be low while he device is in he suspended sae. Noe ha inpu pins on he USBFC should no be allowed o floa during suspend mode. The USBFC will leave suspend mode by deecing raffic on he USB bus or by a device remoe wake-up from he local CPU Device-Remoe Wake-Up The local CPU signals a device remoe wake-up by driving he WAKEUP_ inpu pin low. The USBFC will send a 10-ms wake-up signal o he USB hos, and drive OSC_RUN high and resar he clock inpu ino CLK48_EARLY. Two milliseconds afer he WAKEUP_ pin is assered, he SUSP_ line is driven high o indicae ha he USBFC has compleed is wake-up Hos-Iniiaed Wake-Up The hos may wake-up he USBFC by any non-idle sae on he USB. The USBFC will deec he hos s wake-up reques, and drive OSC_RUN high and resar he clock inpu ino CLK48_EARLY. Two milliseconds laer, he SUSP_ oupu signal is driven high o indicae ha he USBFC has compleed is wake-up. 3.4 USBFC Power Configuraion The USB specificaion defines boh bus-powered and self-powered devices. A bus-powered device is a peripheral which derives all of is power from he upsream USB connecor, while a self-powered device has an exernal power supply. The USBFC is well-suied for boh ypes of applicaions. The mos significan consideraion when deciding wheher o build a bus-powered or a self-powered device is power consumpion. The USB specificaion lays ou he following requiremens for maximum curren draw: A peripheral no configured by he hos (signified on he USBFC by he DEVCFG_ oupu pin) can draw only 100 ma from he USB power pins. A device may no draw more han 500 ma from he USB connecor s power pins. In suspend mode, he peripheral may no draw more han 500 μa from he USB connecor s power pins If hese power consideraions can be me wihou he use of an exernal power supply, he peripheral can be bus-powered; oherwise a self-powered design should be implemened. In case of self-powered and also power-sensiive applicaions, he USBFC can be forced o ener low-power suspend mode when disconneced from he USB. Seing bi 7 of he USBSTAT regiser when USB power has been removed forces he USBFC o ener low-power suspend mode. The USBFC will EPSON 12

13 auomaically wake-up when he peripheral is re-conneced o he USB. Do no force suspend mode unless he peripheral is disconneced from he USB. EPSON 13

14 4. Local Regisers 4.1 Regiser Descripion The USBFC occupies a 32 bye local regiser space which can be accessed by a CPU on he local bus. The Endpoin 1 Receive Mailbox Regisers are wrien by he USB hos, and he Endpoin 2 Transmi Mailbox Regisers are read by he USB hos. Afer he USBFC is powered-up or rese, he regisers are se o heir defaul values. Wries o unused regisers are ignored, and reads from unused regisers reurn a value of 0. For compaibiliy wih fuure revisions, unused bis wihin a regiser should always be wrien wih a zero. NOTE: The USB device and configuraion descripors canno be read by he USB hos unil he USBENB bi in he DMA conrol regiser is se. Unil hen, he device enumeraion process canno complee, so he device will no be recognized on he USB. 4.2 Regiser Summary Address Regiser Name Regiser Descripion USB Endpoin 0 DCTL DMA Conrol 1 IRQENB1 Inerrup Enable 1 2 IRQSTAT1 Inerrup Saus 1 3 IRQENB2 Inerrup Enable 2 4 IRQSTAT2 Inerrup Saus Reserved 8 EP1IDX Endpoin 1 Index Regiser 9 EP1DATA Endpoin 1 Receive Mailbox Daa Por 1 (USB o Local) A-B Reserved C EP2IDX Endpoin 2 Transmi Mailbox Index Regiser D EP2DATA Endpoin 2 Transmi Mailbox Daa Por 2 (Local o USB) E EP2POLL Endpoin 2 Inerrup Polling Inerval F Reserved 10 EP3DATA Endpoin 3 Receive FIFO Daa 3 11 EP3COUNT Endpoin 3 Receive FIFO Coun 12 EP3STAT Endpoin 3 Receive FIFO Saus 13 EP3PKSZ Endpoin 3 Maximum Packe Size 14 EP4DATA Endpoin 4 Transmi FIFO Daa 4 15 EP4COUNT Endpoin 4 Transmi FIFO Coun 16 EP4STAT Endpoin 4 Transmi FIFO Saus 17 EP4PKSZ Endpoin 4 Maximum Packe Size 18 REVISION USBFC Revision 19 USBSTAT USB Saus 1A FRAMEMSB Frame Couner MSB 1B FRAMELSB Frame Couner LSB 1C EXTIDX Exended Regiser Index 1D EXTDATA Exended Regiser Daa 1E-1F Reserved EPSON 14

15 4.3 (Address 00h; DCTL) DMA Conrol Regiser 7 Reserved. Yes No 0 6 Sofware EOT. This bi deermines he response o an IN reques from Endpoin 4 Yes Yes 0 when he ransmi FIFO is empy. If eiher his bi or he DMA EOT inpu pin are assered, he USBFC responds o an In reques from Endpoin 4 wih an ACK and a zero lengh packe if he FIFO is empy. If neiher his bi nor he DMA EOT inpu are assered, he USBFC responds o an In reques from Endpoin 4 wih an NACK if he FIFO is empy, indicaing ha i expecs o ransmi more daa. This bi can be cleared by an I/O wrie wih a daa value of 0. I is auomaically cleared when he USBFC responds o he hos wih a zero lengh packe when he FIFO is empy. 5 USB Enable. Any device or configuraion descripor reads from he hos will be Yes Yes 0 acknowledged wih a NAK unil his bi is se. This allows ime for he local CPU o se up he inerrup polling regiser, maximum packe size regisers, and oher configuraion regisers (e.g. Produc ID and Vendor ID) before he hos reads he descripors. 4 Endpoin 4 Sall. If his bi is se, hos bulk reads from he ransmi FIFO will resul Yes Yes 0 in a STALL acknowledge by he USBFC. No daa will be reurned o he USB hos. 3 Endpoin 3 Sall. If his bi is se, hos bulk wries o he receive FIFO will resul in Yes Yes 0 a STALL acknowledge by he USBFC. Receive daa will be discarded. 2 DMA Reques. This saus bi reflecs he sae of he DRQ oupu pin, and allows a Yes No 0 CPU on he local bus o monior DMA ransfers. 1 DMA Reques Enable. Wriing a 1 o his bi causes he USBFC o sar requesing DMA cycles from a DMA conroller on he local bus. If he EOT_ inpu is assered, his bi is auomaically rese. A CPU on he local bus may also explicily rese his bi o erminae a DMA ransfer. This bi can be read o deermine wheher a DMA ransfer is sill in progress. Yes Yes 0 0 DMA Direcion. This bi deermines he direcion of daa flow during a DMA Yes Yes 0 ransfer. 1 = Local bus o USB; 0 = USB o Local bus 4.4 (Address 01h; IRQENB1) Inerrup Enable Regiser 1 7 Suspend Reques Inerrup Enable. When se, his bi enables a local inerrup o Yes Yes 0 be se when he USB hos is requesing he USBFC o ener suspend mode. 6 SOF Inerrup Enable. When se, his bi enables a local inerrup o be se when a Yes Yes 0 sar-of-frame packe is received by he USBFC. 5 EOT Inerrup Enable. When se, his bi enables he local inerrup o be assered Yes Yes 0 when EOT_ signal is received from he DMA conroller. 4 Endpoin 4 Inerrup Enable. When se, his bi enables a local inerrup o be se Yes Yes 0 when a USB Endpoin 4 Daa Packe has been sen by he USBFC. 3 Endpoin 3 Inerrup Enable. When se, his bi enables a local inerrup o be se Yes Yes 0 when a USB Endpoin 3 Daa Packe has been received by he USBFC. 2 Endpoin 2 Inerrup Enable. When se, his bi enables a local inerrup o be se Yes Yes 0 when he USB Endpoin 2 Receive Mailbox regisers have been read by he USB hos. 1 Endpoin 1 Inerrup Enable. When se, his bi enables a local inerrup o be se Yes Yes 0 when he USB Endpoin 1 Transmi Mailbox regisers have been wrien o by he USB hos. 0 Reserved. Yes No 0 EPSON 15

16 4.5 (Address 02h; IRQSTAT1) Inerrup Saus Regiser 1 NOTE: These saus bis are se independenly of he corresponding inerrup enable bis. hese bis has no effec. Wriing a 0 o 7 Suspend Reques Inerrup Saus. This bi indicaes when a suspend-reques has Yes Yes/CLR 0 been received by he USBFC. This saus bi is cleared by wriing a 1. 6 SOF Inerrup Saus. This bi indicaes when a sar-of-frame packe has been Yes Yes/CLR 0 received by he USBFC. This saus bi is cleared by wriing a 1. 5 EOT Inerrup Saus. This bi indicaes when he EOT_ inpu has been assered Yes Yes/CLR 0 simulaneously wih DACK_ and eiher IOR_ or IOW_, indicaing he compleion of a DMA ransfer. This saus bi is cleared by wriing a 1. 4 Endpoin 4 Inerrup Saus. This bi indicaes when a USB Endpoin 4 Daa Yes Yes/CLR 0 packe has been sen by he USBFC. This saus bi is cleared by wriing a 1. 3 Endpoin 3 Inerrup Saus (Receive FIFO Valid). This bi indicaes when a Yes Yes/CLR 0 USB Endpoin 3 Daa packe has been received by he USBFC. This saus bi is cleared by wriing a 1. 2 Endpoin 2 Inerrup Saus. This bi indicaes when he USB Endpoin 2 Yes Yes/CLR 0 Mailbox regisers have been read by he USB hos. This saus bi is cleared by wriing a 1. 1 Endpoin 1 Inerrup Saus (Receive Mailbox Valid). This bi indicaes when Yes Yes/CLR 0 he USB Endpoin 1 Mailbox regisers have been wrien o by he USB hos. This saus bi is cleared by wriing a 1. 0 Upper Inerrup Acive. A leas one inerrup saus bi is se in he IRQSTAT2 regiser. Yes No (Address 03h; IRQENB2) Inerrup Enable Regiser 2 7:2 Reserved. Yes No 0 1 Transmi FIFO Almos Empy Inerrup Enable. When se, his bi enables a Yes Yes 0 local inerrup o be generaed when he Transmi FIFO Almos Empy saus bi is se. 0 Receive FIFO Almos Full Inerrup Enable. When se, his bi enables a local inerrup o be generaed when he Receive FIFO Almos Full saus bi is se. Yes Yes (Address 04h; IRQSTAT2) Inerrup Saus Regiser 2 NOTE: These saus bis are se independenly of he corresponding inerrup enable bis. hese bis has no effec. Wriing a 0 o 7:2 Reserved. Yes No 0 1 Transmi FIFO Almos Empy Saus. This bi is se when he number of byes Yes Yes/Clr 0 in he Transmi FIFO is equal o he Transmi FIFO Almos Empy Threshold, and anoher bye is sen o he USB bus from he FIFO. This saus bi is cleared by wriing a 1. 0 Receive FIFO Almos Full Saus. This bi is se when he number of byes in he Receive FIFO is equal o he Receive FIFO Almos Full Threshold, and anoher bye is received from he USB bus ino he FIFO. This saus bi is cleared by wriing a 1. Yes Yes/Clr 0 EPSON 16

17 4.8 (Address 08h; EP1IDX) Endpoin 1 Index Regiser 7:3 Reserved. Yes No 0 2:0 Endpoin 1 Index Regiser. This regiser deermines which Endpoin 1 Receive Mailbox is accessed when he Endpoin 1 Receive Mailbox Daa por is read. This regiser is auomaically incremened afer he Endpoin 1 Receive Mailbox Daa por is read. This index regiser wraps around o zero when i reaches he maximum coun. Yes Yes (Address 09h; EP1DATA) Endpoin 1 Receive Mailbox Daa 7:0 Endpoin 1 Receive Mailbox Daa. This por is used o read daa from one of he receive mailbox regisers. Daa is reurned from he regiser seleced by he Endpoin 1 Index Regiser. The eigh receive mailbox regisers are wrien by a USB bulk ransfer o endpoin 1, and can be used o pass messages from he USB hos o he local CPU. The forma and conen of he messages are user defined. If enabled, USB wries o his regiser can generae a local inerrup. Yes USB (Address 0Ch; EP2IDX) Endpoin 2 Index Regiser 7:3 Reserved. Yes No 0 2:0 Endpoin 2 Index Regiser. This regiser deermines which Endpoin 2 Transmi Mailbox is accessed when he Endpoin 2 Transmi Mailbox Daa Por is read or wrien. This regiser is auomaically incremened afer he Endpoin 2 Transmi Mailbox Daa por is read or wrien. This index regiser wraps around o zero when i reaches he maximum coun. Yes Yes (Address 0Dh; EP2DATA) Endpoin 2 Transmi Mailbox Daa 7:0 Endpoin 2 Transmi Mailbox Daa. This por is used o read or wrie one of he ransmi mailbox regisers. The regiser being accessed is seleced by he Endpoin 2 Index Regiser. The eigh Transmi Mailbox Regisers are wrien by he local CPU and are read by a USB inerrup ransfer from endpoin 2. They can be used o pass messages from he local CPU o he USB hos. The forma and conen of he messages are user defined. If enabled, USB reads from his regiser can generae a local inerrup. Yes Yes (Address 0Eh; EP2POLL) Endpoin 2 Inerrup Polling Inerval Regiser 7:0 Inerrup Polling Inerval Regiser. This regiser specifies he Endpoin 2 inerrup polling inerval in milliseconds. I can read by he hos hrough he endpoin 2 descripor. Yes Yes 0xFF EPSON 17

18 4.13 (Address 10h; EP3DATA) Endpoin 3 Receive FIFO Daa Regiser 7:0 Endpoin 3 Receive FIFO Daa Regiser. This regiser is used by he local CPU o read daa from he USB receive FIFO. The FIFO is wrien by he USB hos using bulk or isochronous ransfers o endpoin 3. Yes No (Address 11h; EP3COUNT) Endpoin 3 Receive FIFO Coun Regiser 7:0 Receive FIFO Coun. This regiser reurns he number of receive FIFO enries conaining valid enries. s range from 0 (empy) o 64 (full). Yes No (Address 12h; EP3STAT) Endpoin 3 Receive FIFO Saus Regiser 7:5 Reserved. Yes No 0 4 Receive FIFO Flush. Wriing o his bi causes he receive FIFO o be flushed. Yes Yes/Clr 0 Reading his bi always reurns a 0. 3 Receive FIFO Overflow. If se, his bi indicaes ha an aemp was made by he Yes Yes/Clr 0 USB hos o wrie o he receive FIFO when he receive FIFO was full. Wriing a 1 clears his bi. 2 Receive FIFO Underflow. If se, his bi indicaes ha an aemp was made o read Yes Yes/Clr 0 he receive FIFO when he receive FIFO was empy. Wriing a 1 clears his bi. 1 Receive FIFO Full. If se, his bi indicaes ha he receive FIFO is full. Yes No 0 0 Receive FIFO Empy. If se, his bi indicaes ha he receive FIFO is empy. Yes No (Address 13h; EP3PKSZ) Endpoin 3 Maximum Packe Size Regiser 7:0 Endpoin 3 Max Packe Size Regiser. This regiser specifies he maximum packe size for endpoin 3 in unis of 8 byes (defaul = 64 byes). I can be read by he hos hrough he endpoin 3 descripor. Yes Yes 0x (Address 14h; EP4DATA) Endpoin 4 Transmi FIFO Daa Regiser 7:0 Transmi FIFO Daa Regiser. This regiser is used by he local CPU o wrie daa o he ransmi FIFO. The FIFO is read by he USB hos using bulk or isochronous ransfers from endpoin 4. No Yes (Address 15h; EP4COUNT) Endpoin 4 Transmi FIFO Coun Regiser 7:0 Transmi FIFO Coun. This regiser reurns he number of ransmi FIFO enries conaining valid enries. s range from 0 (empy) o 64 (full). Yes No 0 EPSON 18

19 4.19 (Address 16h; EP4STAT) Endpoin 4 Transmi FIFO Saus Regiser 7:6 Reserved. Yes No 0 5 Transmi FIFO Valid. If se, his bi allows he daa in he FIFO o be read by he Yes Yes 0 nex read from he hos. This bi is auomaically cleared by a hos read. This bi is only used if bi 0 in regiser FIFOCTL is se. 4 Transmi FIFO Flush. Wriing o his bi causes he ransmi FIFO o be flushed. Yes Yes/Clr 0 Reading his bi always reurns a 0. 3 Transmi FIFO Overflow. If se, his bi indicaes ha an aemp was made by he Yes Yes/Clr 0 local CPU o wrie o he ransmi FIFO when he ransmi FIFO was full. Wriing a 1 clears his bi. 2 Transmi FIFO Underflow. If se, his bi indicaes ha an aemp was made by he Yes Yes/Clr 0 USB hos o read he ransmi FIFO when he ransmi FIFO was empy. Wriing a 1 clears his bi. 1 Transmi FIFO Full. If se, his bi indicaes ha he ransmi FIFO is full. Yes No 0 0 Transmi FIFO Empy. If se, his bi indicaes ha he ransmi FIFO is empy. Yes No (Address 17h; EP4PKSZ) Endpoin 4 Maximum Packe Size Regiser 7:0 Endpoin 4 Max Packe Size Regiser. This regiser specifies he maximum packe size for endpoin 4 in unis of 8 byes (defaul = 64 byes). I can be read by he hos hrough he endpoin 4 descripor. Yes Yes 0x (Address 18h; REVISION) Revision Regiser 7:0 USBFC Revision. This regiser reurns curren silicon revision number of he USBFC. Yes No Curren Revision EPSON 19

20 4.22 (Address 19h; USBSTAT) USB Saus Regiser 7 Suspend Conrol. If se, his bi indicaes ha here is a pending suspend reques Yes Yes/Clr 0 from he USB hos. Wriing a 1 clears his bi and causes he USBFC o ener suspended mode. 6 USB Endpoin 4 STALL. The las USB IN oken could no be serviced because Yes Yes/Clr 0 he endpoin was salled (DCTL regiser bi 4 se), and was acknowledged wih a STALL. Wriing a 1 clears his bi. 5 USB Endpoin 4 NAK. The las USB packe ransmied (IN packe) encounered Yes Yes/Clr 0 a FIFO underrun condiion, and was acknowledged wih a NAK. Wriing a 1 clears his bi. 4 USB Endpoin 4 ACK. The las USB packe ransmied (IN packe) was Yes Yes/Clr 0 successfully acknowledged wih an ACK from he USB hos. Wriing a 1 clears his bi. 3 USB Endpoin 3 STALL. The las USB packe received (OUT packe) could no Yes Yes/Clr 0 be acceped because he endpoin was salled (DCTL regiser bi 3 se), and was acknowledged wih a STALL. Wriing a 1 clears his bi. 2 USB Endpoin 3 NAK. The las USB packe received (OUT packe) could no be Yes Yes/Clr 0 acceped, and was acknowledged wih a NAK. The receive FIFO daa will be corruped and he local CPU should flush he FIFO. Wriing a 1 clears his bi. 1 USB Endpoin 3 ACK. The las USB packe received (OUT packe) was Yes Yes/Clr 0 successfully acknowledged wih an ACK. Wriing a 1 clears his bi. 0 Endpoin 2 Valid. When his bi is se, he 8-bye endpoin 2 mailbox regisers have been wrien by he local CPU, bu no ye read by he USB hos. The local CPU should no wrie ino hese regisers while his bi is se. Yes Yes (Address 1Ah; FRAMEMSB) Frame Couner MSB Regiser 7:3 Reserved. Yes No 0 2:0 Frame Couner MSB. This regiser conains he mos-significan bis of he frame couner from he mos recen sar-of-frame packe. Yes No (Address 1Bh; FRAMELSB) Frame Couner LSB Regiser 7:0 Frame Couner LSB. This regiser conains he leas-significan bis of he frame couner from he mos recen sar-of-frame packe. Yes No (Address 1Ch; EXTIDX) Exended Regiser Index 7:0 Exended Regiser Index. This regiser selecs which exended daa regiser is accessed when he EXTDATA por is read or wrien. Yes Yes 0 EPSON 20

21 4.26 (Address 1Dh; EXTDATA) Exended Regiser Daa 7:0 Exended Daa. This por provides access o one of he exended daa regisers. The index of he curren regiser is held in he EXTIDX regiser. See Below See Below See Below (Address 1Dh, Index 00h; VIDMSB) Vendor ID MSB 7:0 Vendor ID MSB. This regiser deermines he mos significan bye of he Vendor ID during a Ge Device Descripor reques. Yes Yes 0x (Address 1Dh, Index 01h; VIDLSB) Vendor ID LSB 7:0 Vendor ID LSB. This regiser deermines he leas significan bye of he Vendor ID during a Ge Device Descripor reques. Yes Yes 0xB (Address 1Dh, Index 02h; PIDMSB) Produc ID MSB 7:0 Produc ID MSB. This regiser deermines he mos significan bye of he Produc Yes Yes 0x88 ID during a Ge Device Descripor reques (Address 1Dh, Index 03h; PIDLSB) Produc ID LSB 7:0 Produc ID LSB. This regiser deermines he leas significan bye of he Produc ID during a Ge Device Descripor reques. Yes Yes 0x (Address 1Dh, Index 04h; RELMSB) Release Number MSB 7:0 Release Number MSB. This regiser deermines he mos significan bye of he device release number during a Ge Device Descripor reques. Yes Yes 0x (Address 1Dh, Index 05h; RELLSB) Release Number LSB 7:0 Release Number LSB. This regiser deermines he leas significan bye of he vendor-assigned revision code during a Ge Device Descripor reques. Yes Yes 0x00 EPSON 21

22 (Address 1Dh, Index 06h; RCVAFTH) Receive FIFO Almos Full Threshold 7:6 Reserved. Yes No 0x00 5:0 Receive FIFO Almos Full Threshold. This regiser deermines he hreshold a which he receive FIFO almos full saus bi is se. Yes Yes 0x3C (Address 1Dh, Index 07h; XMTAETH) Transmi FIFO Almos Empy Threshold 7:6 Reserved. Yes No 0x00 5:0 Transmi FIFO Almos Empy Threshold. This regiser deermines he hreshold a which he ransmi FIFO almos empy saus bi is se. Yes Yes 0x (Address 1Dh, Index 08h; USBCTL) USB Conrol 7:1 Reserved. Yes No 0x00 0 USB Sring Enable. When se, his bi allows he defaul Vendor and Produc ID Sring Descripors o be reurned o he hos. When his bi is cleared, he sring index values in he Device Descripor are se o zero, and sring descripor reads are acknowledged wih a sall. Yes Yes 0x (Address 1Dh, Index 09h; MAXPWR) Maximum Power Consumpion 7:0 Maximum Curren. The amoun of curren drawn by he peripheral from he USB por in incremens of 2 ma. The USBFC repors his value o he hos conroller in he configuraion descripor. The defaul is 500 ma (0xFA * 2 ma). Yes Yes 0xFA (Address 1Dh, Index 0Ah; PKTCTL) Packe Conrol 7 EP4 Daa Toggle Bi. Conains he value of he Daa Toggle bi o be sen in response o he nex IN oken o endpoin 4 from he USB hos. Yes Yes 0x0 / 0x1 (Toggle) 6 EP3 Daa Toggle Bi. Conains he value of he Daa Toggle bi expeced in he nex DATA packe o endpoin 3 from he USB hos. Yes Yes 0x0 / 0x1 (Toggle) 5 EP2 Daa Toggle Bi. Conains he value of he Daa Toggle bi o be sen in response o he nex IN oken o endpoin 2 from he USB hos. Yes Yes 0x0 / 0x1 (Toggle) 4 EP1 Daa Toggle Bi. Conains he value of he Daa Toggle bi expeced in he nex DATA packe o endpoin 1 from he USB hos. Yes Yes 0x0 / 0x1 (Toggle) 3 EP4 Daa Toggle Mode. When se, his bi reses he Daa Toggle bi o zero a he Yes Yes 0x0 end of a USB ransfer from EP4. When cleared, he Daa Toggle bi sricly oggles. 2 EP3 Daa Toggle Mode. When se, his bi reses he Daa Toggle bi o zero a he Yes Yes 0x0 end of a USB ransfer o EP3. When cleared, he Daa Toggle bi sricly oggles. 1 Reserved. Yes No 0x0 0 EP1 Daa Toggle Mode. When se, his bi reses he Daa Toggle bi o zero a he end of a USB ransfer o EP1. When cleared, he Daa Toggle bi sricly oggles. Yes Yes 0x0 EPSON 22

23 (Address 1Dh, Index 0Bh; LOCALCTL) Local-Side Conrol 7:1 Reserved. Yes No 0x00 0 Local Clock Oupu. This bi conrols he oupu of he LCLK pin. Yes Yes 0x0 0 = 48 MHz clock derived from CLKIN signal 1 = 12 MHz clock derived from USB bisream (for esing purposes) (Address 1Dh, Index 0Ch; FIFOCTL) FIFO Conrol 7:1 Reserved. Yes No 0x00 0 Transmi FIFO Valid Mode. When se, his bi causes a NAK response o a hos read reques from he ransmi FIFO (EP4) unless he FIFO Valid bi (in regiser EP4STAT) is se. When his bi is cleared, any daa waiing in he ransmi FIFO will be sen in response o a hos read reques, and he FIFO Valid bi is ignored. Yes Yes 0x0 EPSON 23

24 5. Sandard Device Requess 5.1 Conrol IN Transacions Ge Device Saus Byes Descripion 0 2 bis 15:2 = Reserved bi 1 = Device Remoe Wakeup enabled bi 0 = Device is operaing in Self-Powered mode. (depends on PWRGOOD_ inpu pin) 0x Ge Inerface Saus Byes Descripion 0 2 bis 15:0 = Reserved 0x Ge Endpoin 0,1,2,3,4 Saus Byes Descripion 0 2 bis 15:1 = Reserved bi 0 = Endpoin is salled Ge Device Descripor (18 Byes) Byes Descripion 0x Lengh 0x Type (device) 0x USB Specificaion Release Number 0x Class Code 0x Sub Class Code 0x Proocol 0x Maximum Endpoin 0 Packe Size 0x Vendor ID Deermined by Local Regiser VIDMSB, VIDLSB 10 2 Produc ID Deermined by Local Regiser PIDMSB, PIDLSB 12 2 Device Release Number Deermined by Local Regiser PIDMSB, PIDLSB 14 1 Index of sring descripor describing manufacurer 0x Index of sring descripor describing produc 0x Index of sring descripor describing serial number 0x configuraions 0x01 EPSON 24

25 5.1.5 Ge Configuraion Descripor (46 byes) Noe ha all inerface and endpoin descripors are reurned when his reques is issued Byes Descripion Configuraion Descripor 0 1 Lengh 0x Type (configuraion) 0x Toal lengh reurned for his configuraion 0x002E 4 1 Inerfaces 0x his configuraion 0x Index of sring descripor describing his configuraion 0x Aribues bi 7 = Bus Powered (depends on BUSPWR_ inpu pin) bi 6 = Self-Powered (depends on BUSPWR_ inpu pin) bi 5 = Remoe-Wakeup bis 4:0 = Reserved 8 1 Maximum USB power required (in 2 ma unis) (depends on BUSPWR_ inpu pin) 0x60 (if self powered) 0xA0 (if bus powered) 0x32 (if self powered) 0xFA (if bus powered) Inerface 0 Descripor 0 1 Size of his descripor in byes 0x Type (inerface) 0x his inerface 0x Alernae Inerface 0x endpoins used by his inerface (excluding endpoin 0x04 0) 5 1 Class Code 0x Sub Class Code 0x Device Proocol 0x Index of sring descripor describing his inerface 0x00 Endpoin 1 Descripor 0 1 Size of his descripor 0x Descripor Type (endpoin) 0x Endpoin Address 0x01 bi 7 = direcion (1 = IN, 0 = OUT) bis 6:4 = reserved bis 3:0 = endpoin number 3 1 Endpoin Aribues 0x02 bis 7:2 = reserved bis 1:0 00 = Conrol 01 = Isochronous 10 = Bulk 11 = Inerrup 4 2 Maximum packe size of his endpoin 0x Inerval for polling endpoin (no used) 0x00 EPSON 25

26 Ge Configuraion Descripor (coninued) Byes Descripion Endpoin 2 Descripor 0 1 Size of his descripor 0x Descripor Type (endpoin) 0x Endpoin Address 0x82 bi 7 = direcion (1 = IN, 0 = OUT) bis 6:4 = reserved bis 3:0 = endpoin number 3 1 Endpoin Aribues 0x03 bis 7:2 = reserved bis 1:0 00 = Conrol 01 = Isochronous 10 = Bulk 11 = Inerrup 4 2 Maximum packe size of his endpoin 0x Inerval for polling endpoin Deermined by Local Regiser EP2POLL Endpoin 3 Descripor 0 1 Size of his descripor 0x Descripor Type (endpoin) 0x Endpoin Address bi 7 = direcion (1 = IN, 0 = OUT) bis 6:4 = reserved bis 3:0 = endpoin number 0x Endpoin Aribues bis 7:2 = reserved bis 1:0 00 = Conrol 01 = Isochronous 10 = Bulk 11 = Inerrup 4 2 Maximum packe size of his endpoin for bulk mode Bus Time for isochronous mode 0x02 for bulk 0x01 for isochronous Deermined by Local Regiser EP3PKSZ 6 1 Inerval for polling endpoin 0x00 for bulk 0x01 for isochronous Endpoin 4 Descripor 0 1 Size of his descripor 0x Descripor Type (endpoin) 0x Endpoin Address bi 7 = direcion (1 = IN, 0 = OUT) bis 6:4 = reserved bis 3:0 = endpoin number 0x Endpoin Aribues bis 7:2 = reserved bis 1:0 00 = Conrol 01 = Isochronous 10 = Bulk 11 = Inerrup 4 2 Maximum packe size of his endpoin for bulk mode Bus Time for isochronous mode 0x02 for bulk 0x01 for isochronous Deermined by Local Regiser EP4PKSZ 6 1 Inerval for polling endpoin 0x00 for bulk 0x01 for isochronous EPSON 26

27 5.1.6 Ge Sring Descripor 0 Byes Descripion 0 2 Language ID (English = 09, U.S. = 04) 0x0403 0x Ge Sring Descripor 1 Byes Descripion 0 24 Manufacurer Descripor 0x1803 SEIKO EPSON Ge Sring Descripor 2 Byes Descripion 0 66 Produc Descripor 0x4203 USB Inerface Conroller TEST Ge Configuraion Byes Descripion 0 1 Reurns curren device configuraion 0x Ge Inerface Byes Descripion 0 1 Reurns curren alernae seing for he specified inerface 0x00 EPSON 27

28 5.2 Conrol OUT Transacions Se Address Byes Descripion -- 0 Ses USB address of device = device address, Index = Se Configuraion Byes Descripion -- 0 Ses he device configuraion = Configuraion value (0 or 1 suppored), Se Inerface Byes Descripion -- 0 Selecs alernae seing for specified inerface = Alernae seing, Index = specified inerface Device Clear Feaure Byes Descripion -- 0 Clear he seleced device feaure = feaure selecor FS = 1 --> Device Remoe Wakeup (disable) Device Se Feaure Byes Descripion -- 0 Se he seleced device feaure = feaure selecor FS = 1 --> Device Remoe Wakeup (enable) Endpoin 0,1,2,3,4 Clear Feaure Byes Descripion -- 0 Clear he seleced endpoin feaure = feaure selecor, Index = endpoin number FS = 0 --> Endpoin sall (clears sall bi) EPSON 28

29 5.2.7 Endpoin 0,1,2,3,4 Se Feaure Byes Descripion -- 0 Se he seleced endpoin feaure = feaure selecor, Index = endpoin number FS = 0 --> Endpoin sall (ses sall bi) -- EPSON 29

30 5.3 Endpoin 1 OUT Transacions (Receive Mailboxes) Byes Descripion -- 8 Hos wries 8 byes o he receive mailboxes using bulk OUT ransacions Endpoin 2 IN Transacions (Transmi Mailboxes) Byes Descripion -- 8 Hos reads 8 byes from he ransmi mailboxes using inerrup IN ransacions Endpoin 3 OUT Transacions (Receive FIFO) Byes Descripion -- up o 64 Hos wries daa ino he receive FIFO using bulk or isochronous OUT ransacions Endpoin 4 IN Transacions (Transmi FIFO) Byes Descripion -- up o 64 Hos reads daa from he ransmi FIFO using bulk or isochronous IN ransacions Vendor Device Requess 6.1 Device Clear Feaure Byes Descripion -- 0 Clear he seleced device feaure = feaure selecor FS = 0x80 --> Timing es mode (clears es bi) Device Se Feaure Byes Descripion -- 0 Se he seleced device feaure = feaure selecor FS = 0x80 --> Timing es mode (ses es bi) -- EPSON 30

31 7. Timing 7.1 Local Bus Wrie o Regiser NAME DESCRIPTION MIN MAX UNIT T1 Address seup o wrie enable* 10 ns T2 Address hold from end of wrie enable* 0 ns T3 Wrie enable widh* 25 ns T4 Chip selec hold from end of IOW_ 0 ns T5 Daa seup o end of wrie enable* 5 ns T6 Daa hold ime from end of IOW_ 5 ns T7 I/O Recovery Time 60 ns Wrie enable is he occurrence of boh IOW_ and CS_. A[4:0] T1 T2 CS# T3 T4 IOW# T7 T5 T6 D[7:0] EPSON 31

32 7.2 Local Bus Read from Regiser NAME DESCRIPTION MIN MAX UNIT T1 Address seup o read enable* 10 ns T2 Address hold from end of read enable* 0 ns T3 Chip selec hold from end of IOR_ 0 ns T4 Daa access ime from read enable* 8 ns T5 Daa ri-sae ime from end of IOR_ 9 ns T6 I/O Recovery Time 60 ns Read enable is he occurrence of boh IOR_ and CS_. A[4:0] T1 T2 CS# T3 IOR# T6 T4 T5 D[7:0] EPSON 32

Using CANopen Slave Driver

Using CANopen Slave Driver CAN Bus User Manual Using CANopen Slave Driver V1. Table of Conens 1. SDO Communicaion... 1 2. PDO Communicaion... 1 3. TPDO Reading and RPDO Wriing... 2 4. RPDO Reading... 3 5. CANopen Communicaion Parameer

More information

MIC2569. Features. General Description. Applications. Typical Application. CableCARD Power Switch

MIC2569. Features. General Description. Applications. Typical Application. CableCARD Power Switch CableCARD Power Swich General Descripion is designed o supply power o OpenCable sysems and CableCARD hoss. These CableCARDs are also known as Poin of Disribuion (POD) cards. suppors boh Single and Muliple

More information

PART 1 REFERENCE INFORMATION CONTROL DATA 6400 SYSTEMS CENTRAL PROCESSOR MONITOR

PART 1 REFERENCE INFORMATION CONTROL DATA 6400 SYSTEMS CENTRAL PROCESSOR MONITOR . ~ PART 1 c 0 \,).,,.,, REFERENCE NFORMATON CONTROL DATA 6400 SYSTEMS CENTRAL PROCESSOR MONTOR n CONTROL DATA 6400 Compuer Sysems, sysem funcions are normally handled by he Monior locaed in a Peripheral

More information

Voltair Version 2.5 Release Notes (January, 2018)

Voltair Version 2.5 Release Notes (January, 2018) Volair Version 2.5 Release Noes (January, 2018) Inroducion 25-Seven s new Firmware Updae 2.5 for he Volair processor is par of our coninuing effors o improve Volair wih new feaures and capabiliies. For

More information

1. Function 1. Push-button interface 4g.plus. Push-button interface 4-gang plus. 2. Installation. Table of Contents

1. Function 1. Push-button interface 4g.plus. Push-button interface 4-gang plus. 2. Installation. Table of Contents Chaper 4: Binary inpus 4.6 Push-buon inerfaces Push-buon inerface Ar. no. 6708xx Push-buon inerface 2-gang plus Push-buon inerfacechaper 4:Binary inpusar. no.6708xxversion 08/054.6Push-buon inerfaces.

More information

Assignment 2. Due Monday Feb. 12, 10:00pm.

Assignment 2. Due Monday Feb. 12, 10:00pm. Faculy of rs and Science Universiy of Torono CSC 358 - Inroducion o Compuer Neworks, Winer 218, LEC11 ssignmen 2 Due Monday Feb. 12, 1:pm. 1 Quesion 1 (2 Poins): Go-ack n RQ In his quesion, we review how

More information

Connections, displays and operating elements. Status LEDs (next to the keys)

Connections, displays and operating elements. Status LEDs (next to the keys) GB Connecions, displays and operaing elemens A Push-buon plus Sysem M Operaing insrucions 1 2 1 2 3 4 5 6 7 8 C B A 4 Inser he bus erminal ino he connecion of pushbuon A. 5 Inser he push-buon ino he frame.

More information

MUX 1. GENERAL DESCRIPTION

MUX 1. GENERAL DESCRIPTION 256Mb Async./Burs/Sync./A/D MUX 1. GENERAL DESCRIPTION Winbond x16 ADMUX producs are high-speed, CMOS pseudo-saic random access memory developed for lowpower, porable applicaions. The device has a DRAM

More information

COSC 3213: Computer Networks I Chapter 6 Handout # 7

COSC 3213: Computer Networks I Chapter 6 Handout # 7 COSC 3213: Compuer Neworks I Chaper 6 Handou # 7 Insrucor: Dr. Marvin Mandelbaum Deparmen of Compuer Science York Universiy F05 Secion A Medium Access Conrol (MAC) Topics: 1. Muliple Access Communicaions:

More information

Connections, displays and operating elements. 3 aux. 5 aux.

Connections, displays and operating elements. 3 aux. 5 aux. Taser PlusKapiel3:Taser3.1Taser Plus Meren2005V6280-561-0001/08 GB Connecions, displays and operaing elemens Taser Plus Arec/Anik/Trancen Operaing insrucions A 1 2 1 2 3 4 5 6 C B A B 3 aux. 7 8 9 aux.

More information

Location. Electrical. Loads. 2-wire mains-rated. 0.5 mm² to 1.5 mm² Max. length 300 m (with 1.5 mm² cable). Example: Belden 8471

Location. Electrical. Loads. 2-wire mains-rated. 0.5 mm² to 1.5 mm² Max. length 300 m (with 1.5 mm² cable). Example: Belden 8471 Produc Descripion Insallaion and User Guide Transiser Dimmer (454) The DIN rail mouned 454 is a 4channel ransisor dimmer. I can operae in one of wo modes; leading edge or railing edge. All 4 channels operae

More information

DATASHEET X80120, X Features. Applications. Pinout. Ordering Information

DATASHEET X80120, X Features. Applications. Pinout. Ordering Information DTSHEET X80120, X80121 Volage Supervisor/Sequencer Dual Programmable Time Delay wih Local/Remoe Volage Moniors FN8151 Rev 0.00 The X80120 is a volage supervisor/sequencer wih wo buil in volage moniors.

More information

Chapter 4 Sequential Instructions

Chapter 4 Sequential Instructions Chaper 4 Sequenial Insrucions The sequenial insrucions of FBs-PLC shown in his chaper are also lised in secion 3.. Please refer o Chaper, "PLC Ladder diagram and he Coding rules of Mnemonic insrucion",

More information

4 Error Control. 4.1 Issues with Reliable Protocols

4 Error Control. 4.1 Issues with Reliable Protocols 4 Error Conrol Jus abou all communicaion sysems aemp o ensure ha he daa ges o he oher end of he link wihou errors. Since i s impossible o build an error-free physical layer (alhough some shor links can

More information

Dimmer time switch AlphaLux³ D / 27

Dimmer time switch AlphaLux³ D / 27 Dimmer ime swich AlphaLux³ D2 426 26 / 27! Safey noes This produc should be insalled in line wih insallaion rules, preferably by a qualified elecrician. Incorrec insallaion and use can lead o risk of elecric

More information

Test - Accredited Configuration Engineer (ACE) Exam - PAN-OS 6.0 Version

Test - Accredited Configuration Engineer (ACE) Exam - PAN-OS 6.0 Version Tes - Accredied Configuraion Engineer (ACE) Exam - PAN-OS 6.0 Version ACE Exam Quesion 1 of 50. Which of he following saemens is NOT abou Palo Alo Neworks firewalls? Sysem defauls may be resored by performing

More information

CS 152 Computer Architecture and Engineering. Lecture 7 - Memory Hierarchy-II

CS 152 Computer Architecture and Engineering. Lecture 7 - Memory Hierarchy-II CS 152 Compuer Archiecure and Engineering Lecure 7 - Memory Hierarchy-II Krse Asanovic Elecrical Engineering and Compuer Sciences Universiy of California a Berkeley hp://www.eecs.berkeley.edu/~krse hp://ins.eecs.berkeley.edu/~cs152

More information

V103 TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO. General Description. Features. Block Diagram

V103 TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO. General Description. Features. Block Diagram General Descripion The V103 LVDS display inerface ransmier is primarily designed o suppor pixel daa ransmission beween a video processing engine and a digial video display. The daa rae suppors up o SXGA+

More information

Implementing Ray Casting in Tetrahedral Meshes with Programmable Graphics Hardware (Technical Report)

Implementing Ray Casting in Tetrahedral Meshes with Programmable Graphics Hardware (Technical Report) Implemening Ray Casing in Terahedral Meshes wih Programmable Graphics Hardware (Technical Repor) Marin Kraus, Thomas Erl March 28, 2002 1 Inroducion Alhough cell-projecion, e.g., [3, 2], and resampling,

More information

PROCESS AUTOMATION MANUAL TIMER RELAY KF**-DU-EX1.D ISO9001

PROCESS AUTOMATION MANUAL TIMER RELAY KF**-DU-EX1.D ISO9001 PROCESS AUTOMATION MANUAL TIMER RELAY KF**-DU-EX1.D ISO9001 Wih regard o he supply of producs, he curren issue of he following documen is applicable: The general erms of delivery for producs and services

More information

Timers CT Range. CT-D Range. Electronic timers. CT-D Range. Phone: Fax: Web: -

Timers CT Range. CT-D Range. Electronic timers. CT-D Range. Phone: Fax: Web:  - CT-D Range Timers CT-D Range Elecronic imers Characerisics Diversiy: mulifuncion imers 0 single-funcion imers Conrol supply volages: Wide range: -0 V AC/DC Muli range: -8 V DC, 7 ime ranges from 0.0s o

More information

Elite Acoustics Engineering A4-8 Live-Performance Studio Monitor with 4 Channels, Mixer, Effects, and Bluetooth Quick Start Guide

Elite Acoustics Engineering A4-8 Live-Performance Studio Monitor with 4 Channels, Mixer, Effects, and Bluetooth Quick Start Guide Elie Acousics Engineering A4-8 Live-Performance Sudio Monior wih 4 Channels, Mixer, Effecs, and Blueooh Quick Sar Guide WHAT IS IN THE BOX Your A4-8 package conains he following: (1) Speaker (1) 12V AC

More information

Simple Network Management Based on PHP and SNMP

Simple Network Management Based on PHP and SNMP Simple Nework Managemen Based on PHP and SNMP Krasimir Trichkov, Elisavea Trichkova bsrac: This paper aims o presen simple mehod for nework managemen based on SNMP - managemen of Cisco rouer. The paper

More information

User Manual. RINS Software Revision >V9.26

User Manual. RINS Software Revision >V9.26 User Manual INTERNAL SIREN WARNING The Enforcer 32-WE conrol panel conains a 100 dba siren, please be aware of his when in use. RINS1503-2 Sofware Revision >V9.26 Conens Page A: Inroducion 3 B: Keypads

More information

FIELD PROGRAMMABLE GATE ARRAY (FPGA) AS A NEW APPROACH TO IMPLEMENT THE CHAOTIC GENERATORS

FIELD PROGRAMMABLE GATE ARRAY (FPGA) AS A NEW APPROACH TO IMPLEMENT THE CHAOTIC GENERATORS FIELD PROGRAMMABLE GATE ARRAY (FPGA) AS A NEW APPROACH TO IMPLEMENT THE CHAOTIC GENERATORS Mohammed A. Aseeri and M. I. Sobhy Deparmen of Elecronics, The Universiy of Ken a Canerbury Canerbury, Ken, CT2

More information

Chapter 8 LOCATION SERVICES

Chapter 8 LOCATION SERVICES Disribued Compuing Group Chaper 8 LOCATION SERVICES Mobile Compuing Winer 2005 / 2006 Overview Mobile IP Moivaion Daa ransfer Encapsulaion Locaion Services & Rouing Classificaion of locaion services Home

More information

PCMCIA / JEIDA SRAM Card

PCMCIA / JEIDA SRAM Card Daashee PCMCIA / JEIDA SRAM Card Version 10 Preliminary Version 10 Page1 Documen Version Version Descripion Dae Edior Approved by 8 Updae 2, April, 2002 Greg Lin Greg Lin 9 Updae 10, Aug., 2010 Amos Chung

More information

Outline. EECS Components and Design Techniques for Digital Systems. Lec 06 Using FSMs Review: Typical Controller: state

Outline. EECS Components and Design Techniques for Digital Systems. Lec 06 Using FSMs Review: Typical Controller: state Ouline EECS 5 - Componens and Design Techniques for Digial Sysems Lec 6 Using FSMs 9-3-7 Review FSMs Mapping o FPGAs Typical uses of FSMs Synchronous Seq. Circuis safe composiion Timing FSMs in verilog

More information

MOBILE COMPUTING 3/18/18. Wi-Fi IEEE. CSE 40814/60814 Spring 2018

MOBILE COMPUTING 3/18/18. Wi-Fi IEEE. CSE 40814/60814 Spring 2018 MOBILE COMPUTING CSE 40814/60814 Spring 2018 Wi-Fi Wi-Fi: name is NOT an abbreviaion play on Hi-Fi (high fideliy) Wireless Local Area Nework (WLAN) echnology WLAN and Wi-Fi ofen used synonymous Typically

More information

MOBILE COMPUTING. Wi-Fi 9/20/15. CSE 40814/60814 Fall Wi-Fi:

MOBILE COMPUTING. Wi-Fi 9/20/15. CSE 40814/60814 Fall Wi-Fi: MOBILE COMPUTING CSE 40814/60814 Fall 2015 Wi-Fi Wi-Fi: name is NOT an abbreviaion play on Hi-Fi (high fideliy) Wireless Local Area Nework (WLAN) echnology WLAN and Wi-Fi ofen used synonymous Typically

More information

Scheduling. Scheduling. EDA421/DIT171 - Parallel and Distributed Real-Time Systems, Chalmers/GU, 2011/2012 Lecture #4 Updated March 16, 2012

Scheduling. Scheduling. EDA421/DIT171 - Parallel and Distributed Real-Time Systems, Chalmers/GU, 2011/2012 Lecture #4 Updated March 16, 2012 EDA421/DIT171 - Parallel and Disribued Real-Time Sysems, Chalmers/GU, 2011/2012 Lecure #4 Updaed March 16, 2012 Aemps o mee applicaion consrains should be done in a proacive way hrough scheduling. Schedule

More information

ENDA ETM742 DIGITAL TIMER

ENDA ETM742 DIGITAL TIMER Read his documen carefully before using his device. The guaranee will be expired by damaging of he device if you don' aend o he direcions in he user manual. Also we don' accep any compensaions for personal

More information

ENDA ETM442 DIGITAL TIMER

ENDA ETM442 DIGITAL TIMER Read his documen carefully before using his device. The guaranee will be expired by damaging of he device if you don' aend o he direcions in he user manual. Also we don' accep any compensaions for personal

More information

Ins Net2 plus control unit

Ins Net2 plus control unit S ns 0 Server Link 00 0/00 Eherne End of Line Terminaion RS485 Nework xi -4V. Ins-30080 Ne plus conrol uni C auion: For DC readers y Inruder Ne plus O u pus r Powe DC Only Relay C onac E Buo n P SU/ Page

More information

PCMCIA / JEIDA SRAM Card

PCMCIA / JEIDA SRAM Card Daashee PCMCIA / JEIDA SRAM Card Version 12 Preliminary Version 12 Page1 Documen Version Version Descripion Dae Edior Approved by 8 Updae 2,Apr. 2002 Greg Lin Greg Lin 9 Updae 10,Aug. 2010 Amos Chung Ken

More information

Overview of Board Revisions

Overview of Board Revisions s Sysem Overview MicroAuoBox Embedded PC MicroAuoBox II can be enhanced wih he MicroAuoBox Embedded PC. The MicroAuoBox EmbeddedPC is powered via he MicroAuoBox II power inpu connecor. Wih he common power

More information

Announcements. TCP Congestion Control. Goals of Today s Lecture. State Diagrams. TCP State Diagram

Announcements. TCP Congestion Control. Goals of Today s Lecture. State Diagrams. TCP State Diagram nnouncemens TCP Congesion Conrol Projec #3 should be ou onigh Can do individual or in a eam of 2 people Firs phase due November 16 - no slip days Exercise good (beer) ime managemen EE 122: Inro o Communicaion

More information

Sam knows that his MP3 player has 40% of its battery life left and that the battery charges by an additional 12 percentage points every 15 minutes.

Sam knows that his MP3 player has 40% of its battery life left and that the battery charges by an additional 12 percentage points every 15 minutes. 8.F Baery Charging Task Sam wans o ake his MP3 player and his video game player on a car rip. An hour before hey plan o leave, he realized ha he forgo o charge he baeries las nigh. A ha poin, he plugged

More information

Saturday from 09:00-13:00 (GMT) Documentation on all Paxton Access products can be found on our website -

Saturday from 09:00-13:00 (GMT) Documentation on all Paxton Access products can be found on our website - 9/3/9 Ins-38 Ne plus conrol uni Paxon Access Technical Suppor +44 ()173 81111 suppor@paxon.co.uk Technical help is available: Monday - Friday from 7: - 19: (GMT) Saurday from 9: - 13: (GMT) Documenaion

More information

Po,,ll. I Appll I APP2 I I App3 I. Illll Illlllll II Illlll Illll Illll Illll Illll Illll Illll Illll Illll Illll Illll Illlll Illl Illl Illl

Po,,ll. I Appll I APP2 I I App3 I. Illll Illlllll II Illlll Illll Illll Illll Illll Illll Illll Illll Illll Illll Illll Illlll Illl Illl Illl Illll Illlllll II Illlll Illll Illll Illll Illll Illll Illll Illll Illll Illll Illll Illlll Illl Illl Illl US 20110153728A1 (19) nied Saes (12) Paen Applicaion Publicaion (10) Pub. No.: S 2011/0153728

More information

Performance Evaluation of Implementing Calls Prioritization with Different Queuing Disciplines in Mobile Wireless Networks

Performance Evaluation of Implementing Calls Prioritization with Different Queuing Disciplines in Mobile Wireless Networks Journal of Compuer Science 2 (5): 466-472, 2006 ISSN 1549-3636 2006 Science Publicaions Performance Evaluaion of Implemening Calls Prioriizaion wih Differen Queuing Disciplines in Mobile Wireless Neworks

More information

COMP26120: Algorithms and Imperative Programming

COMP26120: Algorithms and Imperative Programming COMP26120 ecure C3 1/48 COMP26120: Algorihms and Imperaive Programming ecure C3: C - Recursive Daa Srucures Pee Jinks School of Compuer Science, Universiy of Mancheser Auumn 2011 COMP26120 ecure C3 2/48

More information

High Speed CAN Transceiver with Wake and Failure Detection

High Speed CAN Transceiver with Wake and Failure Detection 1 Overview Feaures HS CAN Transceiver wih daa ransmission rae up o 1 MBaud Complian o ISO 11898-5 Very low power consumpion in Sleep mode Bus Wake-Up and local Wake-Up Inhibi oupu o conrol exernal circuiry

More information

Network management and QoS provisioning - QoS in Frame Relay. . packet switching with virtual circuit service (virtual circuits are bidirectional);

Network management and QoS provisioning - QoS in Frame Relay. . packet switching with virtual circuit service (virtual circuits are bidirectional); QoS in Frame Relay Frame relay characerisics are:. packe swiching wih virual circui service (virual circuis are bidirecional);. labels are called DLCI (Daa Link Connecion Idenifier);. for connecion is

More information

Functional Differences Between the DSP56311 and DSP56321

Functional Differences Between the DSP56311 and DSP56321 Freescale Semiconducor Engineering Bullein EB365 Rev 5, 10/2005 Funcional Differences Beween he DSP56311 and DSP56321 The DSP56311 and DSP56321, wo members of he Freescale DSP56300 family of programmable

More information

Saturday from 09:00-13:00 (GMT) Documentation on all Paxton products can be found on our website -

Saturday from 09:00-13:00 (GMT) Documentation on all Paxton products can be found on our website - 4/05/0 Ins-30080 Ne plus conrol uni Paxon Technical Suppor 073 80 suppor@paxon.co.uk Technical help is available: Monday - Friday from 07:00-9:00 (GMT) Saurday from 09:00-3:00 (GMT) Documenaion on all

More information

A Matching Algorithm for Content-Based Image Retrieval

A Matching Algorithm for Content-Based Image Retrieval A Maching Algorihm for Conen-Based Image Rerieval Sue J. Cho Deparmen of Compuer Science Seoul Naional Universiy Seoul, Korea Absrac Conen-based image rerieval sysem rerieves an image from a daabase using

More information

LD7832A 4/17/2013. High Power Factor LED Controller with HV Start-up. General Description. Features. Applications. Typical Application REV: 00

LD7832A 4/17/2013. High Power Factor LED Controller with HV Start-up. General Description. Features. Applications. Typical Application REV: 00 4/17/2013 High Power Facor LED Conroller wih HV Sar-up REV: 00 General Descripion The is a buck soluion wih high PFC conrol for LED lighing. I feaures HV sar-up, easy o design wih minimum cos and PCB size.

More information

TLE6251-3G. Data Sheet. Automotive Power. High Speed CAN-Transceiver with Wake and Failure Detection. Rev. 1.1,

TLE6251-3G. Data Sheet. Automotive Power. High Speed CAN-Transceiver with Wake and Failure Detection. Rev. 1.1, High Speed CAN-Transceiver wih Wake and Failure Deecion Daa Shee Rev. 1.1, 2011-06-06 Auomoive Power Table of Conens 1 Overview....................................................................... 3

More information

Electric Ephemeris PCA Argus v 3.1 for Windows. Sales & CD development. Electric Ephemeris/PCA Argus Programming: Laurids Pedersen

Electric Ephemeris PCA Argus v 3.1 for Windows. Sales & CD development. Electric Ephemeris/PCA Argus Programming: Laurids Pedersen Elecric Ephemeris PCA Argus v 3.1 for Windows MSP Soluions: Sales & CD developmen Elecric Ephemeris/PCA Argus Programming: Laurids Pedersen CD Design: Web Design: Magic Space MSP Soluions Technical suppor

More information

Chapter 3 MEDIA ACCESS CONTROL

Chapter 3 MEDIA ACCESS CONTROL Chaper 3 MEDIA ACCESS CONTROL Overview Moivaion SDMA, FDMA, TDMA Aloha Adapive Aloha Backoff proocols Reservaion schemes Polling Disribued Compuing Group Mobile Compuing Summer 2003 Disribued Compuing

More information

Michiel Helder and Marielle C.T.A Geurts. Hoofdkantoor PTT Post / Dutch Postal Services Headquarters

Michiel Helder and Marielle C.T.A Geurts. Hoofdkantoor PTT Post / Dutch Postal Services Headquarters SHORT TERM PREDICTIONS A MONITORING SYSTEM by Michiel Helder and Marielle C.T.A Geurs Hoofdkanoor PTT Pos / Duch Posal Services Headquarers Keywords macro ime series shor erm predicions ARIMA-models faciliy

More information

ETD-BL-1T-OFF-CC-... Timer relay with off delay (with control contact) and adjustable time. INTERFACE Data sheet _en_01. 1 Description.

ETD-BL-1T-OFF-CC-... Timer relay with off delay (with control contact) and adjustable time. INTERFACE Data sheet _en_01. 1 Description. Timer relay wih off delay (wih conrol conac) and adjusable ime INTERFACE Daa shee 103617_en_01 1 Descripion PHOENIX CONTACT - 09/2009 Feaures Compac ime relay in he 6.2 mm housing in order o conrol ime

More information

Temperature Controller EXPERT-VT212 USER'S MANUAL

Temperature Controller EXPERT-VT212 USER'S MANUAL Temperaure Conroller USER'S MANUAL TABLE OF CONTENTS Page 1. PRECAUTIONS... 6 2. FEATURES... 7 3. LOCATION OF THE CONTROLS... 9 4. MOUNTING INSTRUCTIONS...12 4.1 CONNECTIONS... 12 5. CONTROLLER SETUP...14

More information

TRANSFORMER TEST SYSTEMS

TRANSFORMER TEST SYSTEMS TRANSFORMER TEST SYSTEMS 20203 TRANSFORMER TEST SYSTEMS FROM PHENIX Broad Range Covers Mos Applicaions PHENIX Technologies offers a complee line of Transformer Tes Sysems, from a small porable uni wih

More information

CMPSC 274: Transac0on Processing Lecture #6: Concurrency Control Protocols

CMPSC 274: Transac0on Processing Lecture #6: Concurrency Control Protocols CMPSC 274: Transac0on Processing Lecure #6: Concurrency Conrol Proocols Divy Agrawal Deparmen of Compuer Science UC Sana Barbara 4.4.1 Timesamp Ordering 4.4.2 Serializa0on Graph Tes0ng 4.4.3 Op0mis0c Proocols

More information

EP2200 Queueing theory and teletraffic systems

EP2200 Queueing theory and teletraffic systems EP2200 Queueing heory and eleraffic sysems Vikoria Fodor Laboraory of Communicaion Neworks School of Elecrical Engineering Lecure 1 If you wan o model neworks Or a comple daa flow A queue's he key o help

More information

Wireless LANs: MAC. Wireless LAN: MAC. IEEE protocol stack. Module W.lan MAC

Wireless LANs: MAC. Wireless LAN: MAC. IEEE protocol stack. Module W.lan MAC Wireless LANs: W.lan.3-2 Wireless LAN: 802.11MAC Dr.M.Y.Wu@CSE Shanghai Jiaoong Universiy Shanghai, China Module W.lan.3 Dr.W.Shu@ECE Universiy of New Mexico Albuquerque, NM, USA managemen PANs & Blueooh:

More information

! errors caused by signal attenuation, noise.!! receiver detects presence of errors:!

! errors caused by signal attenuation, noise.!! receiver detects presence of errors:! Daa Link Layer! The Daa Link layer can be furher subdivided ino:!.! Logical Link Conrol (LLC): error and flow conrol!.! Media Access Conrol (MAC): framing and media access! differen link proocols may provide

More information

CS 152 Computer Architecture and Engineering. Lecture 6 - Memory

CS 152 Computer Architecture and Engineering. Lecture 6 - Memory CS 152 Compuer Archiecure and Engineering Lecure 6 - Memory Krse Asanovic Elecrical Engineering and Compuer Sciences Universiy of California a Berkeley hp://www.eecs.berkeley.edu/~krse hp://ins.eecs.berkeley.edu/~cs152

More information

Video streaming over Vajda Tamás

Video streaming over Vajda Tamás Video sreaming over 802.11 Vajda Tamás Video No all bis are creaed equal Group of Picures (GoP) Video Sequence Slice Macroblock Picure (Frame) Inra (I) frames, Prediced (P) Frames or Bidirecional (B) Frames.

More information

NEWTON S SECOND LAW OF MOTION

NEWTON S SECOND LAW OF MOTION Course and Secion Dae Names NEWTON S SECOND LAW OF MOTION The acceleraion of an objec is defined as he rae of change of elociy. If he elociy changes by an amoun in a ime, hen he aerage acceleraion during

More information

Exercise 3: Bluetooth BR/EDR

Exercise 3: Bluetooth BR/EDR Wireless Communicaions, M. Rupf. Exercise 3: Blueooh BR/EDR Problem 1: Blueooh Daa Raes. Consider he ACL packe 3-DH5 wih a maximum user payload of 1021 byes. a) Deermine he maximum achievable daa rae in

More information

UX260 QUICK START GUIDE

UX260 QUICK START GUIDE UX260 QUICK START GUIDE Transferring Music Playing Music Blueooh Pairing Taking a Picure/ Recording a Video www.lgusa.com Geing o Know Your Phone Camera BACK SIDE Lef Sof Key Speakerphone Key Talk Key

More information

Page 1. Key Points from Last Lecture Frame format. EEC173B/ECS152C, Winter Wireless LANs

Page 1. Key Points from Last Lecture Frame format. EEC173B/ECS152C, Winter Wireless LANs EEC173/ECS152C, Winer 2006 Key Poins from Las Lecure Wireless LANs 802.11 Frame forma 802.11 MAC managemen Synchronizaion, Handoffs, Power MAC mehods: DCF & PCF CSMA/CA wih posiive ACK Exponenial backoff

More information

Improving the Efficiency of Dynamic Service Provisioning in Transport Networks with Scheduled Services

Improving the Efficiency of Dynamic Service Provisioning in Transport Networks with Scheduled Services Improving he Efficiency of Dynamic Service Provisioning in Transpor Neworks wih Scheduled Services Ralf Hülsermann, Monika Jäger and Andreas Gladisch Technologiezenrum, T-Sysems, Goslarer Ufer 35, D-1585

More information

NEO 1200 SPA CONTROL SYSTEM

NEO 1200 SPA CONTROL SYSTEM INSTRUCTION MANUAL NEO 200 SPA CONTROL SYSTEM The new sandard in Spa Conrol. NEO 00 CONTROL PANEL NEO 000 CONTROL PANEL C:.02 80-980.28 2200 E. Surgis Road, Oxnard, CA 93030 Phone 805.98.0262 Fax 805.98.9403

More information

3RP20, 3RP15 solid-state time relays

3RP20, 3RP15 solid-state time relays 7 3RP20, 3RP15 solid-sae ime relays Secion Subjec Page 7.1 Specificaions/regulaions/approvals 7-2 7.2 Device descripion 7-3 7.2.1 Device ypes 7-3 7.2.2 Insallaion 7-5 7.2.3 Special feaures 7-5 7.2.4 Noes

More information

Performance Characterisation of the MCNS DOCSIS 1.0 CATV Protocol with Prioritised First Come First Served Scheduling

Performance Characterisation of the MCNS DOCSIS 1.0 CATV Protocol with Prioritised First Come First Served Scheduling 1 Performance Characerisaion of he MCNS OCSIS 1.0 CTV Proocol wih Prioriised Firs Come Firs Served Scheduling V.Sdralia, C.Smyhe, P.Tzerefos, S.Cvekovic bsrac The Mulimedia Cable Neworks Sysems (MCNS)

More information

MB86297A Carmine Timing Analysis of the DDR Interface

MB86297A Carmine Timing Analysis of the DDR Interface Applicaion Noe MB86297A Carmine Timing Analysis of he DDR Inerface Fujisu Microelecronics Europe GmbH Hisory Dae Auhor Version Commen 05.02.2008 Anders Ramdahl 0.01 Firs draf 06.02.2008 Anders Ramdahl

More information

Lecture 18: Mix net Voting Systems

Lecture 18: Mix net Voting Systems 6.897: Advanced Topics in Crypography Apr 9, 2004 Lecure 18: Mix ne Voing Sysems Scribed by: Yael Tauman Kalai 1 Inroducion In he previous lecure, we defined he noion of an elecronic voing sysem, and specified

More information

4. Minimax and planning problems

4. Minimax and planning problems CS/ECE/ISyE 524 Inroducion o Opimizaion Spring 2017 18 4. Minima and planning problems ˆ Opimizing piecewise linear funcions ˆ Minima problems ˆ Eample: Chebyshev cener ˆ Muli-period planning problems

More information

Packet Scheduling in a Low-Latency Optical Interconnect with Electronic Buffers

Packet Scheduling in a Low-Latency Optical Interconnect with Electronic Buffers Packe cheduling in a Low-Laency Opical Inerconnec wih Elecronic Buffers Lin Liu Zhenghao Zhang Yuanyuan Yang Dep Elecrical & Compuer Engineering Compuer cience Deparmen Dep Elecrical & Compuer Engineering

More information

BEST DYNAMICS NAMICS CRM A COMPILATION OF TECH-TIPS TO HELP YOUR BUSINESS SUCCEED WITH DYNAMICS CRM

BEST DYNAMICS NAMICS CRM A COMPILATION OF TECH-TIPS TO HELP YOUR BUSINESS SUCCEED WITH DYNAMICS CRM DYNAMICS CR A Publicaion by elogic s fines Microsof Dynamics CRM Expers { ICS CRM BEST OF 2014 A COMPILATION OF TECH-TIPS TO HELP YOUR BUSINESS SUCCEED WITH DYNAMICS CRM NAMICS CRM { DYNAMICS M INTRODUCTION

More information

TLE9250V. 1 Overview. High Speed CAN FD Transceiver. Qualified for Automotive Applications according to AEC-Q100

TLE9250V. 1 Overview. High Speed CAN FD Transceiver. Qualified for Automotive Applications according to AEC-Q100 High Speed CAN FD Transceiver 1 Overview Qualified for Auomoive Applicaions according o AEC-Q100 Feaures Fully complian o ISO 11898-2 (2016) and SAE J2284-4/-5 Reference device and par of Ineroperabiliy

More information

A time-space consistency solution for hardware-in-the-loop simulation system

A time-space consistency solution for hardware-in-the-loop simulation system Inernaional Conference on Advanced Elecronic Science and Technology (AEST 206) A ime-space consisency soluion for hardware-in-he-loop simulaion sysem Zexin Jiang a Elecric Power Research Insiue of Guangdong

More information

Operating Instructions. Classic Light Balances AL/PL/PL-S Models

Operating Instructions. Classic Light Balances AL/PL/PL-S Models Operaing Insrucions Classic Ligh Balances AL/PL/PL-S Models Operaing insrucions in a nushell Press key briefly Press and hold key down unil he desired display appears auomaic sequence Swiching on On Swiching

More information

CS 152 Computer Architecture and Engineering. Lecture 6 - Memory

CS 152 Computer Architecture and Engineering. Lecture 6 - Memory CS 152 Compuer Archiecure and Engineering Lecure 6 - Memory Krse Asanovic Elecrical Engineering and Compuer Sciences Universiy of California a Berkeley hp://www.eecs.berkeley.edu/~krse hp://ins.eecs.berkeley.edu/~cs152

More information

Discrete Event Systems. Lecture 14: Discrete Control. Continuous System. Discrete Event System. Discrete Control Systems.

Discrete Event Systems. Lecture 14: Discrete Control. Continuous System. Discrete Event System. Discrete Control Systems. Lecure 14: Discree Conrol Discree Even Sysems [Chaper: Sequenial Conrol + These Slides] Discree Even Sysems Sae Machine-Based Formalisms Saechars Grafce Laboraory 2 Peri Nes Implemenaion No covered in

More information

Analyzing of RESPIRE, a novel approach to automatically blocking SYN flooding attacks

Analyzing of RESPIRE, a novel approach to automatically blocking SYN flooding attacks Analyzing of RESPIRE, a novel approach o auomaically blocking SYN flooding aacks ANDRÁS KORN, JUDIT GYIMESI, DR. GÁBOR FEHÉR Budapes Universiy of Technology and Economics, Deparmen of Telecommunicaion

More information

Timers CT Range. CT-S Range. Electronic timers. CT-S Range. Phone: Fax: Web: -

Timers CT Range. CT-S Range. Electronic timers. CT-S Range. Phone: Fax: Web:  - CT-S Range Timers CT-S Range Elecronic imers Characerisics J Diversiy: J 8 mulifuncion imers J 13 single-funcion imers J 8 swiching relays J Conrol supply volages: J Muli range: 24-48 V DC, J Wide range:

More information

PLCopen for efficiency in automation

PLCopen for efficiency in automation Technical Paper PLCopen Technical Commiee 2 Funcion Blocks for Moion Conrol Par 6 Fluid Power Exensions Version 2.0, Published DISCLAIMER OF WARRANTIES THIS DOCUMENT IS PROVIDED ON AN AS IS BASIS AND MAY

More information

Hybrid Equations (HyEQ) Toolbox v2.02 A Toolbox for Simulating Hybrid Systems in MATLAB/Simulink R

Hybrid Equations (HyEQ) Toolbox v2.02 A Toolbox for Simulating Hybrid Systems in MATLAB/Simulink R Hybrid Equaions (HyEQ) Toolbo v. A Toolbo for Simulaing Hybrid Sysems in MATLAB/Simulink R Ricardo G. Sanfelice Universiy of California Sana Cruz, CA 9564 USA David A. Copp Universiy of California Sana

More information

Low-Cost WLAN based. Dr. Christian Hoene. Computer Science Department, University of Tübingen, Germany

Low-Cost WLAN based. Dr. Christian Hoene. Computer Science Department, University of Tübingen, Germany Low-Cos WLAN based Time-of-fligh fligh Trilaeraion Precision Indoor Personnel Locaion and Tracking for Emergency Responders Third Annual Technology Workshop, Augus 5, 2008 Worceser Polyechnic Insiue, Worceser,

More information

Order code M F Type of relay

Order code M F Type of relay elay niversal MF for Curren Monioring elay niversal MF2 for Curren Monioring Sandard ype Large conac gap, swiching volage herefore 400 VAC Monioring of DC and AC currens Order Code Order code M F 2 0 40

More information

MATH Differential Equations September 15, 2008 Project 1, Fall 2008 Due: September 24, 2008

MATH Differential Equations September 15, 2008 Project 1, Fall 2008 Due: September 24, 2008 MATH 5 - Differenial Equaions Sepember 15, 8 Projec 1, Fall 8 Due: Sepember 4, 8 Lab 1.3 - Logisics Populaion Models wih Harvesing For his projec we consider lab 1.3 of Differenial Equaions pages 146 o

More information

Sartorius Cubis Series

Sartorius Cubis Series Brief Insrucions Sarorius Cubis Series Elecronic Precision and Analical Balances MSU Models 98648-017-12 Informaion for he User Conens Noes on using his manual....................... 3 Safe Insrucions.............................

More information

Less Pessimistic Worst-Case Delay Analysis for Packet-Switched Networks

Less Pessimistic Worst-Case Delay Analysis for Packet-Switched Networks Less Pessimisic Wors-Case Delay Analysis for Packe-Swiched Neworks Maias Wecksén Cenre for Research on Embedded Sysems P O Box 823 SE-31 18 Halmsad maias.wecksen@hh.se Magnus Jonsson Cenre for Research

More information

Restorable Dynamic Quality of Service Routing

Restorable Dynamic Quality of Service Routing QOS ROUTING Resorable Dynamic Qualiy of Service Rouing Murali Kodialam and T. V. Lakshman, Lucen Technologies ABSTRACT The focus of qualiy-of-service rouing has been on he rouing of a single pah saisfying

More information

Evaluation and Improvement of Multicast Service in b

Evaluation and Improvement of Multicast Service in b Evaluaion and Improvemen of Mulicas Service in 802.11b Chrisian Bravo 1 and Agusín González 2 1 Universidad Federico Sana María, Deparmen of Elecronics. Valparaíso, Chile chbravo@elo.ufsm.cl 2 Universidad

More information

EECS 487: Interactive Computer Graphics

EECS 487: Interactive Computer Graphics EECS 487: Ineracive Compuer Graphics Lecure 7: B-splines curves Raional Bézier and NURBS Cubic Splines A represenaion of cubic spline consiss of: four conrol poins (why four?) hese are compleely user specified

More information

Delayed reservation decision in optical burst switching networks with optical buffers. Title. Li, GM; Li, VOK; Li, CY; Wai, PKA

Delayed reservation decision in optical burst switching networks with optical buffers. Title. Li, GM; Li, VOK; Li, CY; Wai, PKA Tile Delayed reservaion decision in opical burs swiching neworks wih opical buffers Auhor(s) Li, GM; Li, VOK; Li, CY; Wai, PKA Ciaion The 3rd nernaional Conference on Communicaions and Neworking in China

More information

Optimal Crane Scheduling

Optimal Crane Scheduling Opimal Crane Scheduling Samid Hoda, John Hooker Laife Genc Kaya, Ben Peerson Carnegie Mellon Universiy Iiro Harjunkoski ABB Corporae Research EWO - 13 November 2007 1/16 Problem Track-mouned cranes move

More information

/85/ $ IEEE

/85/ $ IEEE 174 Saged Circui Swiching MAURICIO ARANGO, HUSSEIN BADR, AND DAVID GELERNTER Absrac -Saged circui swiching (S) is a message-swiching echnique ha combines a new proocol wih new communicaion hardware. Proocol

More information

CS422 Computer Networks

CS422 Computer Networks CS422 Compuer Neworks Lecure 2 Physical Layer Dr. Xiaobo Zhou Deparmen of Compuer Science CS422 PhysicalLayer.1 Quesions of Ineress How long will i ake o ransmi a message? How many bis are in he message

More information

I. INTRODUCTION. Keywords -- Web Server, Perceived User Latency, HTTP, Local Measuring. interchangeably.

I. INTRODUCTION. Keywords -- Web Server, Perceived User Latency, HTTP, Local Measuring. interchangeably. Evaluaing Web User Perceived Laency Using Server Side Measuremens Marik Marshak 1 and Hanoch Levy School of Compuer Science Tel Aviv Universiy, Tel-Aviv, Israel mmarshak@emc.com, hanoch@pos.au.ac.il 1

More information

An efficient approach to improve throughput for TCP vegas in ad hoc network

An efficient approach to improve throughput for TCP vegas in ad hoc network Inernaional Research Journal of Engineering and Technology (IRJET) e-issn: 395-0056 Volume: 0 Issue: 03 June-05 www.irje.ne p-issn: 395-007 An efficien approach o improve hroughpu for TCP vegas in ad hoc

More information

WORKSHOP SAFETY IN MOBILE APPLICATION

WORKSHOP SAFETY IN MOBILE APPLICATION WORKSHOP SAFETY IN MOBILE APPLICATION Renaa Mondelaers Seven Bellens SICK SEW Cerified Funcional Safey Applicaion Exper Technology Leader Smar Facory CFSAE by SGS/TÜV Saar MOBILE APPLICATION AVAILABLE

More information

Gauss-Jordan Algorithm

Gauss-Jordan Algorithm Gauss-Jordan Algorihm The Gauss-Jordan algorihm is a sep by sep procedure for solving a sysem of linear equaions which may conain any number of variables and any number of equaions. The algorihm is carried

More information

Shortest Path Algorithms. Lecture I: Shortest Path Algorithms. Example. Graphs and Matrices. Setting: Dr Kieran T. Herley.

Shortest Path Algorithms. Lecture I: Shortest Path Algorithms. Example. Graphs and Matrices. Setting: Dr Kieran T. Herley. Shores Pah Algorihms Background Seing: Lecure I: Shores Pah Algorihms Dr Kieran T. Herle Deparmen of Compuer Science Universi College Cork Ocober 201 direced graph, real edge weighs Le he lengh of a pah

More information