Higher Speed Ethernet

Transcription

1 1 Higher Speed Ethernet

2 Agenda 100 GbE Technology Requirements IEEE P802.3ba Standards Update 2

3 What is Driving the Need for 40 GbE and 100 GbE? 3 Research network trends 10 GbE WANs Cluster and grid computing Data center trends Lots of GbE and 10 GbE servers Cluster computing High-end servers pushing almost 8 Gbps Storage flows > 1 Gbps ISP / IX trends High bandwidth applications 10 GbE peering Government/Research Data Center Something has to aggregate all those 10 GbE links LAG is an interim solution Service Provider

4 Higher Speeds Drive Density Everyone Benefits! 4 Even if you don t need 100 GbE, you still benefit 100 GbE technology will drive 10 GbE port density up and cost down Just as 10 GbE did for GbE Assuming routers have the switching capacity we can support these line-rate combinations on a single line card 1 x 100 GbE port 10 x 10 GbE ports 100 x 1 GbE ports And even more oversubscribed port density

5 Higher Speeds Drive Density Peering Benefits! This is great for peering! 100 GbE IX peering fabrics 100 GbE WAN PHY (cheaper than SONET) Lower equipment cost with higher densities for peering Cheaper 10 GbE ports Really cheap GbE ports 5

6 Higher Speeds Drive Switch/ Router Requirements New capacity and density drive architectural requirements needed to support 100 GbE Massive hardware and software scalability >200 Gbps/slot fabric capacity for any reasonable 100 GbE port density (local switching capacity is useless here!) Support for several thousand interfaces Multi-processor, distributed architectures Really fast packet processing at line-rate 100 GbE is ~149Mpps or 1 packet every 6.7ns (10 GbE is only ~14.9Mpps or 1 packet every 67ns) 6

7 Higher Speeds Drive Switch/ Router Requirements Complete system resiliency Hitless forwarding at Tbps speeds Redundant hardware HA software, hitless upgrades DoS protection and system security Chassis design issues N+1 switching fabric Channel signaling for higher internal speeds Clean power routing architecture Reduced EMI Conducted through power Radiated into air Cabling interfaces 7

8 Anatomy of a 100 Gbps Solution: Slot Capacity Year System Introduced Gbps Gbps (in design now) 2009 Full Duplex Raw Slot Capacity 120 Gbps 500 Gbps Required For Reasonable 100 GbE Port Density 8

9 Anatomy of a 100 Gbps Solution: Line Card Components Ethernet PHYsical Layer Line drivers/receivers Encoders/decoders Timing Line Card Packet lookup memory CAM SRAM Packet buffer memory DRAM Switch Fabric 1 Media Interface PHY MAC Network Processor Fabric Interface Switch Fabric N Pluggable or fixed media interfaces (SFP, XFP, 9 ) Ethernet Media Access Control Framing Addressing Error handling Flow control Packet lookup, classification and forwarding functions Interfaces to switch fabrics

10 Anatomy of a 100 Gbps Solution: ASIC Selection Typical 10 Gb/s MAC today 64-bit wide MHz 90nm or 130nm silicon 90nm process geometry vs 130nm 100% more gates 25% better performance ½ power consumption 65nm and 45nm process geometry Expected to be available by 2010 Will give us more design options 10

11 Anatomy of a 100 Gbps Solution: Memory Selection 11 Memory technology is usually the last thought, but these are critical components Advanced Content-Addressable Memory (CAM) Less power per search Need 4 times more performance assuming 2 x 100 GbE ports on each network processor Enhanced flexible table management schemes Memories Use DRAMs with SERDES interfaces when performance allows to conserve cost Quad Data Rate III SRAMs for speed (PS and Xbox gaming industry is driving this technology) Force10 works with JEDEC (Joint Electron Device Engineering Council) to advance serial memory technology JEDEC is an international semiconductor engineering standardization body

12 Feasible Technology for 2010: Media Interfaces Increasing port densities and higher speed interfaces need new media interfaces Force10 participates in MSAs to design new pluggable media QSFP: quad SFP (four interfaces in one SFP) SFP+: smaller 10 GbE media New optics are needed for higher speed Ethernet SONET/SDH OC-768 optics available today but cost close to 30 x 10 GbE optics SFP XFP QSFP 12

13 Anatomy of a 100 Gbps Solution: Chassis Design 13 Chassis design issues to consider Backplane and channel signaling for higher internal speeds Lower system BER Connectors N+1 switch fabric Reduced EMI Clean power routing architecture Thermal and cooling Cable management All design aspects must also meet local regulatory standards

14 Anatomy of a 100 Gbps Solution: Designing for EMI Compatibility EMI is Electro-magnetic Interference, ie noise Too much noise interfere can cause bit errors, so we need to minimize the EMI Concerned about two types of EMI Conducted EMI through power Radiated EMI through air E300 Power Supply Radiated Emission for 30 MHz to 1 GHz 14

15 Anatomy of a 100 Gbps Solution: Thermal and Cooling System is already designed for cooling >400W/slot Front to back filtered airflow for carrier deployments 1+1 cooling redundancy Active health monitoring for fan status reporting 15

16 Agenda 100 GbE Technology Requirements IEEE P802.3ba Standards Update 16

17 The Push for Standards: Interplay Between the OIF & IEEE OIF defines multi-source agreements within the Telecom Industry Optics and Electronic Dispersion Compensation (EDC) for signal integrity SERDES definition Channel models and simulation tools the components inside the box IEEE 802 covers LAN/MAN Ethernet and define Ethernet over copper cables, fiber cables, and backplanes leverages efforts from OIF the signaling and protocols on the wire 17

18 Per IEEE-SA Standards Board Operations Manual, January 2005 At lectures, symposia, seminars, or educational courses, an individual presenting information on IEEE standards shall make it clear that his or her views should be considered the personal views of that individual rather than the formal position, explanation, or interpretation of the IEEE. 18

19 Recent Developments Defined architectures and nomenclature (100GBASE-ER4, etc) Adopted baseline proposals for all objectives Finished Draft 1.0 On schedule: the 40 GbE and 100 GbE standards will be delivered together in June 2010 Crystal ball says there is already demand for other PMDs outside the scope of 802.3ba (100 GbE serial, etc) Standard defines a flexible architecture that enables many implementations as technology changes Expect MSAs 19

20 Draft 1.0 is Here! Significant milestone, captures all objectives but not technically complete yet (292 pages long) Draft 2.0 will technically complete for WG ballot Gives people an idea of the technology and solutions for them to scope out implementation Technical specifications could still be modified and clarified as people start to implement Looks good on paper but stuff will come up Crossing Is and dotting Ts Careful balance between marketing timing and standards process/technical compliance 20

21 Summary of Reach Objectives and Physical Layer Specifications Reach 40 GbE 100 GbE Solution 1m Backplane 40GBASE-KR4 4 x 10 Gb/s (reuse 10GBASE-KR) 10m Copper Cable 40GBASE-CR4 100GBASE- CR10 n x 10 Gb/s (reuse 10GBASE-KR) 100m OM3 MMF 40GBASE-SR4 100GBASE-SR10 n x 10 Gb/s 10km SMF 40GBASE-LR4 100GBASE-LR4 4 x 10 Gb/s and 4 x 25 Gb/s 40km SMF 100GBASE-ER4 4 x 25 Gb/s 21

22 Overview of Architecture 40 GbE 100 GbE 10GBASE-R 64B/66B PCS runs at 40 Gb/s or 100 Gb/s serial rate MDI - Medium Dependant Interface PCS - Physical Coding Sublayer PHY - Physical Layer Device PMA - Physical Medium Attachment PMD - Physical Medium Dependent CGMII Gigabit Media Independent Interface XLGMII - 40 Gigabit Media Independent Interface CAUI Gigabit Attachment Unit Interface 22 XLAUI - 40 Gigabit Attachment Unit Interface Consistent with previous Ethernet rates, extension to 40 Gb/s and 100 Gb/s data rates Same frame format changes to the MAC New interface definitions

23 Provide appropriate support for OTN WIS (WAN Interface Sublayer) like we have for 10 GbE Define transparent mapping of 40 GbE into existing ODU3 Transcoding to be specified by the ITU-T SG15 Coordination between ITU-T SG15 and IEEE on control block types Define new ODU4 tier for 100 GbE Link fault signaling for 802.3ba Ethernet over OTN is feasible 23

24 40GBASE-KR4: 1m Backplane 1 Gigabit to 40 Gigabit Ethernet solution for backplanes Reuses 10GBASE-KR 4 x 10 Gb/s Same Tx / Rx electrical characteristics and testing Auto-negotiation Speed Capabilities (FEC, pause ability) Influence of EEE (Energy Efficient Ethernet) pending 24

25 40GBASE-CR4 and 100GBASE-CR10: 10m Copper Cable Reuses 10GBASE-KR 40GBASE-CR4: 4 x 10 Gb/s 100GBASE-CR10: 10 x 10 Gb/s Cable parameters based on 10GBASE- CX4 Auto-negotiation Speed Capabilities (FEC, pause ability) 4 x MDI QSFP: enables common form factor for fiber and copper 10 x MDI SFF-8092: enables common form factor for fiber and copper 25

26 40GBASE-SR4 and 100GBASE-SR10: 100m OM3 MMF 40GBASE-SR4 4 Tx / 4 Rx parallel lanes over OM3 parallel fibers connected to a high density SFF 100GBASE-SR10 10 Tx / 4 Rx parallel lanes over OM3 parallel fibers connected to a high density SFF Interest in going beyond 100m How far can the adopted proposal really go? 26

27 40GBASE-LR4: 10km SMF Uses ITU G CWDM grid for LAN applications (CWDM) specification Wavelengths 1270nm, 1290nm, 1310nm and 1330nm 27

28 100GBASE-LR4: 10km SMF Uses ITU G widely spaced DWDM grid for LAN applications (LAN WDM) specification Wavelengths 1295nm, 1300nm, 1305nm, and 1310nm Same grid as 40km Development of 25 Gb/s electrical signaling will drive 2nd generation 28

29 100GBASE-ER4: 40km SMF Uses ITU G widely spaced DWDM grid for LAN applications (LAN WDM) specification Wavelengths 1295nm, 1300nm, 1305nm, and 1310nm Same grid as 10km Development of 25 Gb/s electrical signaling will drive 2nd generation 29

30 Where are we now after ~3 years? 30 Ideas From Industry Feasibility and Research Call for Interest Study Group Task Force Working Group Ballot Sponsor Ballot Standards Board Approval Publication Industry Pioneering 1 Year IEEE 4 Years Ad Hoc Efforts CFI Jul 18, st Meeting Sep 20, st Meeting Jan 23, 2008 We Are Here D1.0! Q2 2010

31 IEEE P802.3ba Task Force Timeline March 2008 Plenary You Are Here Task Force Formation Baseline TF Review WG Ballot LMSC Ballot Standard Last Proposal Last Feature Last Technical Change N D J F M A M J J A S O N D J F M A M J J A S O N D J F M A M J J A S O N PAR Approved D1.0 D2.0 D3.0 TF Reviews WG Ballots LMSC Ballots 31 Legend IEEE 802 Plenary IEEE Interim IEEE-SA Standards Board

32 Future Meetings for 2008 and 2009 September 2008 Interim September 15 19, Seoul Review Draft 0.9 Resolve 40 GbE 10km SMF objective After September Interim Generate Draft 1.0 Begin Task Force review vember 2008 Plenary vember 9 14, Dallas Draft 1.0 comment resolution, work towards Draft 2.0 January 2009 Interim January 12 16, New Orleans March 2009 Plenary March 8 13, Vancouver 32

33 More Information is Here 33

34 803.3ba menclature Suffix Summary Speed 40G = 40Gb/s 100G = 100Gb/s Medium Coding Lanes Scheme Copper Optical Copper Optical K = Backplane C = Cable Assembly S = Short Reach (100m) L = Long Reach (10km) E = Extended Long Reach (40km) R = 64B/ 66B Block Coding n = 4 or 10 n = Number of Lanes or Wavelengths n=1 is not required as serial is implied Example: 100GBASE-ER4 34

35 DONE Overview of IEEE Standards Process (1/5)- Study Group Phase Idea 802 EC Form SG Check Point 802 EC Approve Check Point Call for Interest Form SG PAR Study Group Meetings 5 Criteria Objectives NesCom Approve SASB Approve Check Point Approved PAR RIP Check Point Approve Check Point 35 te: At "Check Point", either the activity is ended, or there may be various options that would allow reconsideration of the approval.

36 Overview of IEEE Standards Process (2/5) - Task Force Comment Phase Approved PAR D1.0 DONE W E A Task Force Meetings Task Force Review To WG Ballot R E Proposals Selected Objectives D1.(n+1) TF Review Done D2.0 A H E R E 36

37 Overview of IEEE Standards Process (3/5) - Working Group Ballot Phase A D2.(n+1) WG BALLOT TF Resolves Comments Forward to Sponsor Ballot A Substantive Changes 802 EC Forward to Sponsor Ballot A In Scope New Negatives D3.0 > 75% B 37 Check Point tes: At "Check Point", either the activity is ended, or there may be various options that would allow reconsideration of the approval. See Operating Rules and listed references for complete description

38 Overview of IEEE Standards Process (4/5)- Sponsor Ballot Phase B D3.(n+1) LMSC Sponsor BALLOT TF Resolves Comments Forward to RevCom B Substantive Changes 802 EC Forward to RevCom B In Scope New Negatives C > 75% tes: At "Check Point", either the activity is ended, or there may be various options that would allow reconsideration of the approval. 38 Check Point See Operating Rules and listed references for complete description

39 Overview of IEEE Standards Process (5/5) - Final Approvals / Standard Release C RevCom Review Approved Draft RevCom Approval B Publication Preparation Standard SASB Approval Check Point tes: At "Check Point", either the activity is ended, or there may be various options that would allow reconsideration of the approval. 39

40 40 Thank You